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authorJ Keerthy <j-keerthy@ti.com>2013-07-23 02:35:39 -0400
committerMike Turquette <mturquette@linaro.org>2014-01-17 15:36:27 -0500
commitc3be7acdeb5ce5bc857ee47664b0be36241e2402 (patch)
treeadba9fb80b6e97bf4b792f68b3bad55e7fe689b9
parent7d138d3aafea6e7252ae5ea1e80423335b6c70dc (diff)
ARM: dts: DRA7: Change apll_pcie_m2_ck to fixed factor clock
This patch changes apll_pcie_m2_ck to fixed factor clock as there are no configurable divider associated to m2. Signed-off-by: J Keerthy <j-keerthy@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
-rw-r--r--arch/arm/boot/dts/dra7xx-clocks.dtsi9
1 files changed, 3 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi
index d4e7410dc0cd..d616359baed1 100644
--- a/arch/arm/boot/dts/dra7xx-clocks.dtsi
+++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi
@@ -1183,13 +1183,10 @@
1183 1183
1184 apll_pcie_m2_ck: apll_pcie_m2_ck { 1184 apll_pcie_m2_ck: apll_pcie_m2_ck {
1185 #clock-cells = <0>; 1185 #clock-cells = <0>;
1186 compatible = "ti,divider-clock"; 1186 compatible = "fixed-factor-clock";
1187 clocks = <&apll_pcie_ck>; 1187 clocks = <&apll_pcie_ck>;
1188 ti,max-div = <127>; 1188 clock-mult = <1>;
1189 ti,autoidle-shift = <8>; 1189 clock-div = <1>;
1190 reg = <0x0224>;
1191 ti,index-starts-at-one;
1192 ti,invert-autoidle-bit;
1193 }; 1190 };
1194 1191
1195 dpll_per_ck: dpll_per_ck { 1192 dpll_per_ck: dpll_per_ck {