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authorKevin Hilman <khilman@ti.com>2011-03-16 20:20:35 -0400
committerKevin Hilman <khilman@ti.com>2011-09-15 14:39:09 -0400
commitc39263c33f9c94443aa9fc4fc2b1f1191666fccd (patch)
tree7a2db13a038df0cd125515727d98013b36c41966
parenta7460daf15239563b3e7bb862580f90da78541bd (diff)
OMAP2+: voltage: move prm_irqst_reg from VP into voltage domain
The prm_irqst_reg is not part of the VP. Move it up into the common voltage domain struct. Signed-off-by: Kevin Hilman <khilman@ti.com>
-rw-r--r--arch/arm/mach-omap2/voltage.c15
-rw-r--r--arch/arm/mach-omap2/voltage.h1
-rw-r--r--arch/arm/mach-omap2/voltagedomains3xxx_data.c2
-rw-r--r--arch/arm/mach-omap2/voltagedomains44xx_data.c3
-rw-r--r--arch/arm/mach-omap2/vp.h3
-rw-r--r--arch/arm/mach-omap2/vp3xxx_data.c2
-rw-r--r--arch/arm/mach-omap2/vp44xx_data.c3
7 files changed, 13 insertions, 16 deletions
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index 3151d7525f89..a366a6b30a62 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -426,23 +426,21 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd,
426 unsigned long target_volt) 426 unsigned long target_volt)
427{ 427{
428 u32 vpconfig; 428 u32 vpconfig;
429 u8 target_vsel, current_vsel, prm_irqst_reg; 429 u8 target_vsel, current_vsel;
430 int ret, timeout = 0; 430 int ret, timeout = 0;
431 431
432 ret = _pre_volt_scale(vdd, target_volt, &target_vsel, &current_vsel); 432 ret = _pre_volt_scale(vdd, target_volt, &target_vsel, &current_vsel);
433 if (ret) 433 if (ret)
434 return ret; 434 return ret;
435 435
436 prm_irqst_reg = vdd->vp_data->prm_irqst_data->prm_irqst_reg;
437
438 /* 436 /*
439 * Clear all pending TransactionDone interrupt/status. Typical latency 437 * Clear all pending TransactionDone interrupt/status. Typical latency
440 * is <3us 438 * is <3us
441 */ 439 */
442 while (timeout++ < VP_TRANXDONE_TIMEOUT) { 440 while (timeout++ < VP_TRANXDONE_TIMEOUT) {
443 vdd->write_reg(vdd->vp_data->prm_irqst_data->tranxdone_status, 441 vdd->write_reg(vdd->vp_data->prm_irqst_data->tranxdone_status,
444 vdd->prm_irqst_mod, prm_irqst_reg); 442 vdd->prm_irqst_mod, vdd->prm_irqst_reg);
445 if (!(vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) & 443 if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) &
446 vdd->vp_data->prm_irqst_data->tranxdone_status)) 444 vdd->vp_data->prm_irqst_data->tranxdone_status))
447 break; 445 break;
448 udelay(1); 446 udelay(1);
@@ -475,7 +473,8 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd,
475 * Depends on SMPSWAITTIMEMIN/MAX and voltage change 473 * Depends on SMPSWAITTIMEMIN/MAX and voltage change
476 */ 474 */
477 timeout = 0; 475 timeout = 0;
478 omap_test_timeout((vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) & 476 omap_test_timeout((vdd->read_reg(vdd->prm_irqst_mod,
477 vdd->prm_irqst_reg) &
479 vdd->vp_data->prm_irqst_data->tranxdone_status), 478 vdd->vp_data->prm_irqst_data->tranxdone_status),
480 VP_TRANXDONE_TIMEOUT, timeout); 479 VP_TRANXDONE_TIMEOUT, timeout);
481 if (timeout >= VP_TRANXDONE_TIMEOUT) 480 if (timeout >= VP_TRANXDONE_TIMEOUT)
@@ -492,8 +491,8 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd,
492 timeout = 0; 491 timeout = 0;
493 while (timeout++ < VP_TRANXDONE_TIMEOUT) { 492 while (timeout++ < VP_TRANXDONE_TIMEOUT) {
494 vdd->write_reg(vdd->vp_data->prm_irqst_data->tranxdone_status, 493 vdd->write_reg(vdd->vp_data->prm_irqst_data->tranxdone_status,
495 vdd->prm_irqst_mod, prm_irqst_reg); 494 vdd->prm_irqst_mod, vdd->prm_irqst_reg);
496 if (!(vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) & 495 if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) &
497 vdd->vp_data->prm_irqst_data->tranxdone_status)) 496 vdd->vp_data->prm_irqst_data->tranxdone_status))
498 break; 497 break;
499 udelay(1); 498 udelay(1);
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index ffdc55ee1644..db23d493f663 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -136,6 +136,7 @@ struct omap_vdd_info {
136 bool vp_enabled; 136 bool vp_enabled;
137 137
138 s16 prm_irqst_mod; 138 s16 prm_irqst_mod;
139 u8 prm_irqst_reg;
139 u32 (*read_reg) (u16 mod, u8 offset); 140 u32 (*read_reg) (u16 mod, u8 offset);
140 void (*write_reg) (u32 val, u16 mod, u8 offset); 141 void (*write_reg) (u32 val, u16 mod, u8 offset);
141 int (*volt_scale) (struct omap_vdd_info *vdd, 142 int (*volt_scale) (struct omap_vdd_info *vdd,
diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
index 0d30b7fe269b..f831f9adc881 100644
--- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
@@ -39,6 +39,7 @@ static const struct omap_vfsm_instance_data omap3_vdd1_vfsm_data = {
39 39
40static struct omap_vdd_info omap3_vdd1_info = { 40static struct omap_vdd_info omap3_vdd1_info = {
41 .prm_irqst_mod = OCP_MOD, 41 .prm_irqst_mod = OCP_MOD,
42 .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET,
42 .vp_data = &omap3_vp1_data, 43 .vp_data = &omap3_vp1_data,
43 .vc_data = &omap3_vc1_data, 44 .vc_data = &omap3_vc1_data,
44 .vfsm = &omap3_vdd1_vfsm_data, 45 .vfsm = &omap3_vdd1_vfsm_data,
@@ -55,6 +56,7 @@ static const struct omap_vfsm_instance_data omap3_vdd2_vfsm_data = {
55 56
56static struct omap_vdd_info omap3_vdd2_info = { 57static struct omap_vdd_info omap3_vdd2_info = {
57 .prm_irqst_mod = OCP_MOD, 58 .prm_irqst_mod = OCP_MOD,
59 .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET,
58 .vp_data = &omap3_vp2_data, 60 .vp_data = &omap3_vp2_data,
59 .vc_data = &omap3_vc2_data, 61 .vc_data = &omap3_vc2_data,
60 .vfsm = &omap3_vdd2_vfsm_data, 62 .vfsm = &omap3_vdd2_vfsm_data,
diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c
index 1c2d7d78de13..64dc265aa2ad 100644
--- a/arch/arm/mach-omap2/voltagedomains44xx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c
@@ -38,6 +38,7 @@ static const struct omap_vfsm_instance_data omap4_vdd_mpu_vfsm_data = {
38 38
39static struct omap_vdd_info omap4_vdd_mpu_info = { 39static struct omap_vdd_info omap4_vdd_mpu_info = {
40 .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, 40 .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST,
41 .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET,
41 .vp_data = &omap4_vp_mpu_data, 42 .vp_data = &omap4_vp_mpu_data,
42 .vc_data = &omap4_vc_mpu_data, 43 .vc_data = &omap4_vc_mpu_data,
43 .vfsm = &omap4_vdd_mpu_vfsm_data, 44 .vfsm = &omap4_vdd_mpu_vfsm_data,
@@ -52,6 +53,7 @@ static const struct omap_vfsm_instance_data omap4_vdd_iva_vfsm_data = {
52 53
53static struct omap_vdd_info omap4_vdd_iva_info = { 54static struct omap_vdd_info omap4_vdd_iva_info = {
54 .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, 55 .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST,
56 .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
55 .vp_data = &omap4_vp_iva_data, 57 .vp_data = &omap4_vp_iva_data,
56 .vc_data = &omap4_vc_iva_data, 58 .vc_data = &omap4_vc_iva_data,
57 .vfsm = &omap4_vdd_iva_vfsm_data, 59 .vfsm = &omap4_vdd_iva_vfsm_data,
@@ -66,6 +68,7 @@ static const struct omap_vfsm_instance_data omap4_vdd_core_vfsm_data = {
66 68
67static struct omap_vdd_info omap4_vdd_core_info = { 69static struct omap_vdd_info omap4_vdd_core_info = {
68 .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, 70 .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST,
71 .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
69 .vp_data = &omap4_vp_core_data, 72 .vp_data = &omap4_vp_core_data,
70 .vc_data = &omap4_vc_core_data, 73 .vc_data = &omap4_vc_core_data,
71 .vfsm = &omap4_vdd_core_vfsm_data, 74 .vfsm = &omap4_vdd_core_vfsm_data,
diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h
index d277da6c0378..5406b08463b6 100644
--- a/arch/arm/mach-omap2/vp.h
+++ b/arch/arm/mach-omap2/vp.h
@@ -70,16 +70,13 @@ struct omap_vp_common_data {
70 70
71/** 71/**
72 * struct omap_vp_prm_irqst_data - PRM_IRQSTATUS_MPU.VP_TRANXDONE_ST data 72 * struct omap_vp_prm_irqst_data - PRM_IRQSTATUS_MPU.VP_TRANXDONE_ST data
73 * @prm_irqst_reg: reg offset for PRM_IRQSTATUS_MPU from top of PRM
74 * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg 73 * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg
75 * 74 *
76 * XXX prm_irqst_reg does not belong here
77 * XXX Note that on OMAP3, VP_TRANXDONE interrupt may not work due to a 75 * XXX Note that on OMAP3, VP_TRANXDONE interrupt may not work due to a
78 * hardware bug 76 * hardware bug
79 * XXX This structure is probably not needed 77 * XXX This structure is probably not needed
80 */ 78 */
81struct omap_vp_prm_irqst_data { 79struct omap_vp_prm_irqst_data {
82 u8 prm_irqst_reg;
83 u32 tranxdone_status; 80 u32 tranxdone_status;
84}; 81};
85 82
diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c
index c9b3e64d4e4e..a8ea0451d0b4 100644
--- a/arch/arm/mach-omap2/vp3xxx_data.c
+++ b/arch/arm/mach-omap2/vp3xxx_data.c
@@ -51,7 +51,6 @@ static const struct omap_vp_common_data omap3_vp_common = {
51}; 51};
52 52
53static const struct omap_vp_prm_irqst_data omap3_vp1_prm_irqst_data = { 53static const struct omap_vp_prm_irqst_data omap3_vp1_prm_irqst_data = {
54 .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET,
55 .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK, 54 .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK,
56}; 55};
57 56
@@ -67,7 +66,6 @@ struct omap_vp_instance_data omap3_vp1_data = {
67}; 66};
68 67
69static const struct omap_vp_prm_irqst_data omap3_vp2_prm_irqst_data = { 68static const struct omap_vp_prm_irqst_data omap3_vp2_prm_irqst_data = {
70 .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET,
71 .tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK, 69 .tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK,
72}; 70};
73 71
diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c
index 1a0842e59e83..0957c24b1fa9 100644
--- a/arch/arm/mach-omap2/vp44xx_data.c
+++ b/arch/arm/mach-omap2/vp44xx_data.c
@@ -52,7 +52,6 @@ static const struct omap_vp_common_data omap4_vp_common = {
52}; 52};
53 53
54static const struct omap_vp_prm_irqst_data omap4_vp_mpu_prm_irqst_data = { 54static const struct omap_vp_prm_irqst_data omap4_vp_mpu_prm_irqst_data = {
55 .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET,
56 .tranxdone_status = OMAP4430_VP_MPU_TRANXDONE_ST_MASK, 55 .tranxdone_status = OMAP4430_VP_MPU_TRANXDONE_ST_MASK,
57}; 56};
58 57
@@ -68,7 +67,6 @@ struct omap_vp_instance_data omap4_vp_mpu_data = {
68}; 67};
69 68
70static const struct omap_vp_prm_irqst_data omap4_vp_iva_prm_irqst_data = { 69static const struct omap_vp_prm_irqst_data omap4_vp_iva_prm_irqst_data = {
71 .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
72 .tranxdone_status = OMAP4430_VP_IVA_TRANXDONE_ST_MASK, 70 .tranxdone_status = OMAP4430_VP_IVA_TRANXDONE_ST_MASK,
73}; 71};
74 72
@@ -84,7 +82,6 @@ struct omap_vp_instance_data omap4_vp_iva_data = {
84}; 82};
85 83
86static const struct omap_vp_prm_irqst_data omap4_vp_core_prm_irqst_data = { 84static const struct omap_vp_prm_irqst_data omap4_vp_core_prm_irqst_data = {
87 .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
88 .tranxdone_status = OMAP4430_VP_CORE_TRANXDONE_ST_MASK, 85 .tranxdone_status = OMAP4430_VP_CORE_TRANXDONE_ST_MASK,
89}; 86};
90 87