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authorKukjin Kim <kgene.kim@samsung.com>2011-10-04 07:14:06 -0400
committerKukjin Kim <kgene.kim@samsung.com>2011-10-04 07:14:06 -0400
commitc37b25046289e857918d25fd96aa441ea7929ad5 (patch)
tree2241c0b30738d26758dbe481605a962952e75024
parenta102a9ece5489e1718cd7543aa079082450ac3a2 (diff)
parent4c59de052e7167a3bcf3f32c5ea4c9a5ef07386a (diff)
Merge branch 'next-samsung-cleanup' into next-samsung-devel-2
Diffstat
-rw-r--r--arch/arm/mach-exynos4/Kconfig17
-rw-r--r--arch/arm/mach-exynos4/Makefile2
-rw-r--r--arch/arm/mach-exynos4/mach-smdkc210.c309
-rw-r--r--arch/arm/mach-exynos4/mach-smdkv310.c78
-rw-r--r--arch/arm/mach-s3c2410/Kconfig6
-rw-r--r--arch/arm/mach-s3c2410/Makefile1
-rw-r--r--arch/arm/mach-s3c2410/dma.c14
-rw-r--r--arch/arm/mach-s3c2410/gpio.c72
-rw-r--r--arch/arm/mach-s3c2410/include/mach/map.h52
-rw-r--r--arch/arm/mach-s3c2412/Kconfig1
-rw-r--r--arch/arm/mach-s3c2412/Makefile1
-rw-r--r--arch/arm/mach-s3c2412/dma.c18
-rw-r--r--arch/arm/mach-s3c2412/gpio.c62
-rw-r--r--arch/arm/mach-s3c2440/Kconfig2
-rw-r--r--arch/arm/mach-s3c2440/dma.c17
-rw-r--r--arch/arm/mach-s3c2443/dma.c27
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/map.h9
-rw-r--r--arch/arm/mach-s3c64xx/mach-crag6410.c3
-rw-r--r--arch/arm/mach-s3c64xx/mach-mini6410.c8
-rw-r--r--arch/arm/mach-s3c64xx/mach-real6410.c8
-rw-r--r--arch/arm/mach-s3c64xx/mach-smdk6410.c8
-rw-r--r--arch/arm/mach-s5p64x0/mach-smdk6440.c8
-rw-r--r--arch/arm/mach-s5p64x0/mach-smdk6450.c8
-rw-r--r--arch/arm/mach-s5pc100/mach-smdkc100.c8
-rw-r--r--arch/arm/mach-s5pv210/Kconfig6
-rw-r--r--arch/arm/mach-s5pv210/Makefile2
-rw-r--r--arch/arm/mach-s5pv210/mach-smdkv210.c8
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/map.h100
-rw-r--r--arch/arm/plat-s5p/include/plat/pll.h1
-rw-r--r--arch/arm/plat-samsung/dev-hsmmc.c19
-rw-r--r--arch/arm/plat-samsung/dev-hsmmc1.c19
-rw-r--r--arch/arm/plat-samsung/dev-hsmmc2.c19
-rw-r--r--arch/arm/plat-samsung/dev-hsmmc3.c19
-rw-r--r--arch/arm/plat-samsung/dev-ts.c9
-rw-r--r--arch/arm/plat-samsung/include/plat/dma-s3c24xx.h6
-rw-r--r--arch/arm/plat-samsung/include/plat/map-s3c.h84
-rw-r--r--arch/arm/plat-samsung/include/plat/map-s5p.h (renamed from arch/arm/plat-s5p/include/plat/map-s5p.h)6
-rw-r--r--arch/arm/plat-samsung/include/plat/sdhci.h7
-rw-r--r--arch/arm/plat-samsung/platformdata.c22
39 files changed, 264 insertions, 802 deletions
diff --git a/arch/arm/mach-exynos4/Kconfig b/arch/arm/mach-exynos4/Kconfig
index 0c77ab99fa16..bee8f77de2ab 100644
--- a/arch/arm/mach-exynos4/Kconfig
+++ b/arch/arm/mach-exynos4/Kconfig
@@ -113,22 +113,7 @@ menu "EXYNOS4 Machines"
113 113
114config MACH_SMDKC210 114config MACH_SMDKC210
115 bool "SMDKC210" 115 bool "SMDKC210"
116 select CPU_EXYNOS4210 116 select MACH_SMDKV310
117 select S5P_DEV_FIMD0
118 select S3C_DEV_RTC
119 select S3C_DEV_WDT
120 select S3C_DEV_I2C1
121 select S3C_DEV_HSMMC
122 select S3C_DEV_HSMMC1
123 select S3C_DEV_HSMMC2
124 select S3C_DEV_HSMMC3
125 select SAMSUNG_DEV_PWM
126 select SAMSUNG_DEV_BACKLIGHT
127 select EXYNOS4_DEV_PD
128 select EXYNOS4_DEV_SYSMMU
129 select EXYNOS4_SETUP_FIMD0
130 select EXYNOS4_SETUP_I2C1
131 select EXYNOS4_SETUP_SDHCI
132 help 117 help
133 Machine support for Samsung SMDKC210 118 Machine support for Samsung SMDKC210
134 119
diff --git a/arch/arm/mach-exynos4/Makefile b/arch/arm/mach-exynos4/Makefile
index b7fe1d7b0b1f..e3e93ea41385 100644
--- a/arch/arm/mach-exynos4/Makefile
+++ b/arch/arm/mach-exynos4/Makefile
@@ -25,7 +25,7 @@ obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
25 25
26# machine support 26# machine support
27 27
28obj-$(CONFIG_MACH_SMDKC210) += mach-smdkc210.o 28obj-$(CONFIG_MACH_SMDKC210) += mach-smdkv310.o
29obj-$(CONFIG_MACH_SMDKV310) += mach-smdkv310.o 29obj-$(CONFIG_MACH_SMDKV310) += mach-smdkv310.o
30obj-$(CONFIG_MACH_ARMLEX4210) += mach-armlex4210.o 30obj-$(CONFIG_MACH_ARMLEX4210) += mach-armlex4210.o
31obj-$(CONFIG_MACH_UNIVERSAL_C210) += mach-universal_c210.o 31obj-$(CONFIG_MACH_UNIVERSAL_C210) += mach-universal_c210.o
diff --git a/arch/arm/mach-exynos4/mach-smdkc210.c b/arch/arm/mach-exynos4/mach-smdkc210.c
deleted file mode 100644
index a7c65e05c1eb..000000000000
--- a/arch/arm/mach-exynos4/mach-smdkc210.c
+++ /dev/null
@@ -1,309 +0,0 @@
1/* linux/arch/arm/mach-exynos4/mach-smdkc210.c
2 *
3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/serial_core.h>
12#include <linux/delay.h>
13#include <linux/gpio.h>
14#include <linux/lcd.h>
15#include <linux/mmc/host.h>
16#include <linux/platform_device.h>
17#include <linux/smsc911x.h>
18#include <linux/io.h>
19#include <linux/i2c.h>
20#include <linux/pwm_backlight.h>
21
22#include <asm/mach/arch.h>
23#include <asm/mach-types.h>
24
25#include <video/platform_lcd.h>
26
27#include <plat/regs-serial.h>
28#include <plat/regs-srom.h>
29#include <plat/regs-fb-v4.h>
30#include <plat/exynos4.h>
31#include <plat/cpu.h>
32#include <plat/devs.h>
33#include <plat/fb.h>
34#include <plat/sdhci.h>
35#include <plat/iic.h>
36#include <plat/pd.h>
37#include <plat/gpio-cfg.h>
38#include <plat/backlight.h>
39
40#include <mach/map.h>
41
42/* Following are default values for UCON, ULCON and UFCON UART registers */
43#define SMDKC210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
44 S3C2410_UCON_RXILEVEL | \
45 S3C2410_UCON_TXIRQMODE | \
46 S3C2410_UCON_RXIRQMODE | \
47 S3C2410_UCON_RXFIFO_TOI | \
48 S3C2443_UCON_RXERR_IRQEN)
49
50#define SMDKC210_ULCON_DEFAULT S3C2410_LCON_CS8
51
52#define SMDKC210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
53 S5PV210_UFCON_TXTRIG4 | \
54 S5PV210_UFCON_RXTRIG4)
55
56static struct s3c2410_uartcfg smdkc210_uartcfgs[] __initdata = {
57 [0] = {
58 .hwport = 0,
59 .flags = 0,
60 .ucon = SMDKC210_UCON_DEFAULT,
61 .ulcon = SMDKC210_ULCON_DEFAULT,
62 .ufcon = SMDKC210_UFCON_DEFAULT,
63 },
64 [1] = {
65 .hwport = 1,
66 .flags = 0,
67 .ucon = SMDKC210_UCON_DEFAULT,
68 .ulcon = SMDKC210_ULCON_DEFAULT,
69 .ufcon = SMDKC210_UFCON_DEFAULT,
70 },
71 [2] = {
72 .hwport = 2,
73 .flags = 0,
74 .ucon = SMDKC210_UCON_DEFAULT,
75 .ulcon = SMDKC210_ULCON_DEFAULT,
76 .ufcon = SMDKC210_UFCON_DEFAULT,
77 },
78 [3] = {
79 .hwport = 3,
80 .flags = 0,
81 .ucon = SMDKC210_UCON_DEFAULT,
82 .ulcon = SMDKC210_ULCON_DEFAULT,
83 .ufcon = SMDKC210_UFCON_DEFAULT,
84 },
85};
86
87static struct s3c_sdhci_platdata smdkc210_hsmmc0_pdata __initdata = {
88 .cd_type = S3C_SDHCI_CD_GPIO,
89 .ext_cd_gpio = EXYNOS4_GPK0(2),
90 .ext_cd_gpio_invert = 1,
91 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
92#ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
93 .max_width = 8,
94 .host_caps = MMC_CAP_8_BIT_DATA,
95#endif
96};
97
98static struct s3c_sdhci_platdata smdkc210_hsmmc1_pdata __initdata = {
99 .cd_type = S3C_SDHCI_CD_GPIO,
100 .ext_cd_gpio = EXYNOS4_GPK0(2),
101 .ext_cd_gpio_invert = 1,
102 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
103};
104
105static struct s3c_sdhci_platdata smdkc210_hsmmc2_pdata __initdata = {
106 .cd_type = S3C_SDHCI_CD_GPIO,
107 .ext_cd_gpio = EXYNOS4_GPK2(2),
108 .ext_cd_gpio_invert = 1,
109 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
110#ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
111 .max_width = 8,
112 .host_caps = MMC_CAP_8_BIT_DATA,
113#endif
114};
115
116static struct s3c_sdhci_platdata smdkc210_hsmmc3_pdata __initdata = {
117 .cd_type = S3C_SDHCI_CD_GPIO,
118 .ext_cd_gpio = EXYNOS4_GPK2(2),
119 .ext_cd_gpio_invert = 1,
120 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
121};
122
123static void lcd_lte480wv_set_power(struct plat_lcd_data *pd,
124 unsigned int power)
125{
126 if (power) {
127#if !defined(CONFIG_BACKLIGHT_PWM)
128 gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_HIGH, "GPD0");
129 gpio_free(EXYNOS4_GPD0(1));
130#endif
131 /* fire nRESET on power up */
132 gpio_request(EXYNOS4_GPX0(6), "GPX0");
133
134 gpio_direction_output(EXYNOS4_GPX0(6), 1);
135 mdelay(100);
136
137 gpio_set_value(EXYNOS4_GPX0(6), 0);
138 mdelay(10);
139
140 gpio_set_value(EXYNOS4_GPX0(6), 1);
141 mdelay(10);
142
143 gpio_free(EXYNOS4_GPX0(6));
144 } else {
145#if !defined(CONFIG_BACKLIGHT_PWM)
146 gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_LOW, "GPD0");
147 gpio_free(EXYNOS4_GPD0(1));
148#endif
149 }
150}
151
152static struct plat_lcd_data smdkc210_lcd_lte480wv_data = {
153 .set_power = lcd_lte480wv_set_power,
154};
155
156static struct platform_device smdkc210_lcd_lte480wv = {
157 .name = "platform-lcd",
158 .dev.parent = &s5p_device_fimd0.dev,
159 .dev.platform_data = &smdkc210_lcd_lte480wv_data,
160};
161
162static struct s3c_fb_pd_win smdkc210_fb_win0 = {
163 .win_mode = {
164 .left_margin = 13,
165 .right_margin = 8,
166 .upper_margin = 7,
167 .lower_margin = 5,
168 .hsync_len = 3,
169 .vsync_len = 1,
170 .xres = 800,
171 .yres = 480,
172 },
173 .max_bpp = 32,
174 .default_bpp = 24,
175};
176
177static struct s3c_fb_platdata smdkc210_lcd0_pdata __initdata = {
178 .win[0] = &smdkc210_fb_win0,
179 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
180 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
181 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
182};
183
184static struct resource smdkc210_smsc911x_resources[] = {
185 [0] = {
186 .start = EXYNOS4_PA_SROM_BANK(1),
187 .end = EXYNOS4_PA_SROM_BANK(1) + SZ_64K - 1,
188 .flags = IORESOURCE_MEM,
189 },
190 [1] = {
191 .start = IRQ_EINT(5),
192 .end = IRQ_EINT(5),
193 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
194 },
195};
196
197static struct smsc911x_platform_config smsc9215_config = {
198 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
199 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
200 .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
201 .phy_interface = PHY_INTERFACE_MODE_MII,
202 .mac = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67},
203};
204
205static struct platform_device smdkc210_smsc911x = {
206 .name = "smsc911x",
207 .id = -1,
208 .num_resources = ARRAY_SIZE(smdkc210_smsc911x_resources),
209 .resource = smdkc210_smsc911x_resources,
210 .dev = {
211 .platform_data = &smsc9215_config,
212 },
213};
214
215static struct i2c_board_info i2c_devs1[] __initdata = {
216 {I2C_BOARD_INFO("wm8994", 0x1a),},
217};
218
219static struct platform_device *smdkc210_devices[] __initdata = {
220 &s3c_device_hsmmc0,
221 &s3c_device_hsmmc1,
222 &s3c_device_hsmmc2,
223 &s3c_device_hsmmc3,
224 &s3c_device_i2c1,
225 &s3c_device_rtc,
226 &s3c_device_wdt,
227 &exynos4_device_ac97,
228 &exynos4_device_i2s0,
229 &exynos4_device_pd[PD_MFC],
230 &exynos4_device_pd[PD_G3D],
231 &exynos4_device_pd[PD_LCD0],
232 &exynos4_device_pd[PD_LCD1],
233 &exynos4_device_pd[PD_CAM],
234 &exynos4_device_pd[PD_TV],
235 &exynos4_device_pd[PD_GPS],
236 &exynos4_device_sysmmu,
237 &samsung_asoc_dma,
238 &s5p_device_fimd0,
239 &smdkc210_lcd_lte480wv,
240 &smdkc210_smsc911x,
241};
242
243static void __init smdkc210_smsc911x_init(void)
244{
245 u32 cs1;
246
247 /* configure nCS1 width to 16 bits */
248 cs1 = __raw_readl(S5P_SROM_BW) &
249 ~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT);
250 cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) |
251 (1 << S5P_SROM_BW__WAITENABLE__SHIFT) |
252 (1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) <<
253 S5P_SROM_BW__NCS1__SHIFT;
254 __raw_writel(cs1, S5P_SROM_BW);
255
256 /* set timing for nCS1 suitable for ethernet chip */
257 __raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) |
258 (0x9 << S5P_SROM_BCX__TACP__SHIFT) |
259 (0xc << S5P_SROM_BCX__TCAH__SHIFT) |
260 (0x1 << S5P_SROM_BCX__TCOH__SHIFT) |
261 (0x6 << S5P_SROM_BCX__TACC__SHIFT) |
262 (0x1 << S5P_SROM_BCX__TCOS__SHIFT) |
263 (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
264}
265
266/* LCD Backlight data */
267static struct samsung_bl_gpio_info smdkc210_bl_gpio_info = {
268 .no = EXYNOS4_GPD0(1),
269 .func = S3C_GPIO_SFN(2),
270};
271
272static struct platform_pwm_backlight_data smdkc210_bl_data = {
273 .pwm_id = 1,
274 .pwm_period_ns = 1000,
275};
276
277static void __init smdkc210_map_io(void)
278{
279 s5p_init_io(NULL, 0, S5P_VA_CHIPID);
280 s3c24xx_init_clocks(24000000);
281 s3c24xx_init_uarts(smdkc210_uartcfgs, ARRAY_SIZE(smdkc210_uartcfgs));
282}
283
284static void __init smdkc210_machine_init(void)
285{
286 s3c_i2c1_set_platdata(NULL);
287 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
288
289 smdkc210_smsc911x_init();
290
291 s3c_sdhci0_set_platdata(&smdkc210_hsmmc0_pdata);
292 s3c_sdhci1_set_platdata(&smdkc210_hsmmc1_pdata);
293 s3c_sdhci2_set_platdata(&smdkc210_hsmmc2_pdata);
294 s3c_sdhci3_set_platdata(&smdkc210_hsmmc3_pdata);
295
296 samsung_bl_set(&smdkc210_bl_gpio_info, &smdkc210_bl_data);
297 s5p_fimd0_set_platdata(&smdkc210_lcd0_pdata);
298
299 platform_add_devices(smdkc210_devices, ARRAY_SIZE(smdkc210_devices));
300}
301
302MACHINE_START(SMDKC210, "SMDKC210")
303 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
304 .boot_params = S5P_PA_SDRAM + 0x100,
305 .init_irq = exynos4_init_irq,
306 .map_io = smdkc210_map_io,
307 .init_machine = smdkc210_machine_init,
308 .timer = &exynos4_timer,
309MACHINE_END
diff --git a/arch/arm/mach-exynos4/mach-smdkv310.c b/arch/arm/mach-exynos4/mach-smdkv310.c
index ea4149556860..a16eb569a3e6 100644
--- a/arch/arm/mach-exynos4/mach-smdkv310.c
+++ b/arch/arm/mach-exynos4/mach-smdkv310.c
@@ -9,7 +9,9 @@
9*/ 9*/
10 10
11#include <linux/serial_core.h> 11#include <linux/serial_core.h>
12#include <linux/delay.h>
12#include <linux/gpio.h> 13#include <linux/gpio.h>
14#include <linux/lcd.h>
13#include <linux/mmc/host.h> 15#include <linux/mmc/host.h>
14#include <linux/platform_device.h> 16#include <linux/platform_device.h>
15#include <linux/smsc911x.h> 17#include <linux/smsc911x.h>
@@ -21,11 +23,14 @@
21#include <asm/mach/arch.h> 23#include <asm/mach/arch.h>
22#include <asm/mach-types.h> 24#include <asm/mach-types.h>
23 25
26#include <video/platform_lcd.h>
24#include <plat/regs-serial.h> 27#include <plat/regs-serial.h>
25#include <plat/regs-srom.h> 28#include <plat/regs-srom.h>
29#include <plat/regs-fb-v4.h>
26#include <plat/exynos4.h> 30#include <plat/exynos4.h>
27#include <plat/cpu.h> 31#include <plat/cpu.h>
28#include <plat/devs.h> 32#include <plat/devs.h>
33#include <plat/fb.h>
29#include <plat/keypad.h> 34#include <plat/keypad.h>
30#include <plat/sdhci.h> 35#include <plat/sdhci.h>
31#include <plat/iic.h> 36#include <plat/iic.h>
@@ -112,6 +117,67 @@ static struct s3c_sdhci_platdata smdkv310_hsmmc3_pdata __initdata = {
112 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, 117 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
113}; 118};
114 119
120static void lcd_lte480wv_set_power(struct plat_lcd_data *pd,
121 unsigned int power)
122{
123 if (power) {
124#if !defined(CONFIG_BACKLIGHT_PWM)
125 gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_HIGH, "GPD0");
126 gpio_free(EXYNOS4_GPD0(1));
127#endif
128 /* fire nRESET on power up */
129 gpio_request(EXYNOS4_GPX0(6), "GPX0");
130
131 gpio_direction_output(EXYNOS4_GPX0(6), 1);
132 mdelay(100);
133
134 gpio_set_value(EXYNOS4_GPX0(6), 0);
135 mdelay(10);
136
137 gpio_set_value(EXYNOS4_GPX0(6), 1);
138 mdelay(10);
139
140 gpio_free(EXYNOS4_GPX0(6));
141 } else {
142#if !defined(CONFIG_BACKLIGHT_PWM)
143 gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_LOW, "GPD0");
144 gpio_free(EXYNOS4_GPD0(1));
145#endif
146 }
147}
148
149static struct plat_lcd_data smdkv310_lcd_lte480wv_data = {
150 .set_power = lcd_lte480wv_set_power,
151};
152
153static struct platform_device smdkv310_lcd_lte480wv = {
154 .name = "platform-lcd",
155 .dev.parent = &s5p_device_fimd0.dev,
156 .dev.platform_data = &smdkv310_lcd_lte480wv_data,
157};
158
159static struct s3c_fb_pd_win smdkv310_fb_win0 = {
160 .win_mode = {
161 .left_margin = 13,
162 .right_margin = 8,
163 .upper_margin = 7,
164 .lower_margin = 5,
165 .hsync_len = 3,
166 .vsync_len = 1,
167 .xres = 800,
168 .yres = 480,
169 },
170 .max_bpp = 32,
171 .default_bpp = 24,
172};
173
174static struct s3c_fb_platdata smdkv310_lcd0_pdata __initdata = {
175 .win[0] = &smdkv310_fb_win0,
176 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
177 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
178 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
179};
180
115static struct resource smdkv310_smsc911x_resources[] = { 181static struct resource smdkv310_smsc911x_resources[] = {
116 [0] = { 182 [0] = {
117 .start = EXYNOS4_PA_SROM_BANK(1), 183 .start = EXYNOS4_PA_SROM_BANK(1),
@@ -188,6 +254,8 @@ static struct platform_device *smdkv310_devices[] __initdata = {
188 &exynos4_device_sysmmu, 254 &exynos4_device_sysmmu,
189 &samsung_asoc_dma, 255 &samsung_asoc_dma,
190 &samsung_asoc_idma, 256 &samsung_asoc_idma,
257 &s5p_device_fimd0,
258 &smdkv310_lcd_lte480wv,
191 &smdkv310_smsc911x, 259 &smdkv310_smsc911x,
192 &exynos4_device_ahci, 260 &exynos4_device_ahci,
193}; 261};
@@ -248,6 +316,7 @@ static void __init smdkv310_machine_init(void)
248 samsung_keypad_set_platdata(&smdkv310_keypad_data); 316 samsung_keypad_set_platdata(&smdkv310_keypad_data);
249 317
250 samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data); 318 samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data);
319 s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata);
251 320
252 platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices)); 321 platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
253} 322}
@@ -261,3 +330,12 @@ MACHINE_START(SMDKV310, "SMDKV310")
261 .init_machine = smdkv310_machine_init, 330 .init_machine = smdkv310_machine_init,
262 .timer = &exynos4_timer, 331 .timer = &exynos4_timer,
263MACHINE_END 332MACHINE_END
333
334MACHINE_START(SMDKC210, "SMDKC210")
335 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
336 .boot_params = S5P_PA_SDRAM + 0x100,
337 .init_irq = exynos4_init_irq,
338 .map_io = smdkv310_map_io,
339 .init_machine = smdkv310_machine_init,
340 .timer = &exynos4_timer,
341MACHINE_END
diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig
index 7245a55795dc..3700cf32af0f 100644
--- a/arch/arm/mach-s3c2410/Kconfig
+++ b/arch/arm/mach-s3c2410/Kconfig
@@ -8,7 +8,6 @@ config CPU_S3C2410
8 select CPU_ARM920T 8 select CPU_ARM920T
9 select S3C_GPIO_PULL_UP 9 select S3C_GPIO_PULL_UP
10 select S3C2410_CLOCK 10 select S3C2410_CLOCK
11 select S3C2410_GPIO
12 select CPU_LLSERIAL_S3C2410 11 select CPU_LLSERIAL_S3C2410
13 select S3C2410_PM if PM 12 select S3C2410_PM if PM
14 select S3C2410_CPUFREQ if CPU_FREQ_S3C24XX 13 select S3C2410_CPUFREQ if CPU_FREQ_S3C24XX
@@ -28,11 +27,6 @@ config S3C2410_PM
28 help 27 help
29 Power Management code common to S3C2410 and better 28 Power Management code common to S3C2410 and better
30 29
31config S3C2410_GPIO
32 bool
33 help
34 GPIO code for S3C2410 and similar processors
35
36config SIMTEC_NOR 30config SIMTEC_NOR
37 bool 31 bool
38 help 32 help
diff --git a/arch/arm/mach-s3c2410/Makefile b/arch/arm/mach-s3c2410/Makefile
index 81695353d8f4..782fd81144e9 100644
--- a/arch/arm/mach-s3c2410/Makefile
+++ b/arch/arm/mach-s3c2410/Makefile
@@ -13,7 +13,6 @@ obj-$(CONFIG_CPU_S3C2410) += s3c2410.o
13obj-$(CONFIG_CPU_S3C2410_DMA) += dma.o 13obj-$(CONFIG_CPU_S3C2410_DMA) += dma.o
14obj-$(CONFIG_CPU_S3C2410_DMA) += dma.o 14obj-$(CONFIG_CPU_S3C2410_DMA) += dma.o
15obj-$(CONFIG_S3C2410_PM) += pm.o sleep.o 15obj-$(CONFIG_S3C2410_PM) += pm.o sleep.o
16obj-$(CONFIG_S3C2410_GPIO) += gpio.o
17obj-$(CONFIG_S3C2410_CPUFREQ) += cpu-freq.o 16obj-$(CONFIG_S3C2410_CPUFREQ) += cpu-freq.o
18obj-$(CONFIG_S3C2410_PLLTABLE) += pll.o 17obj-$(CONFIG_S3C2410_PLLTABLE) += pll.o
19 18
diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c
index 0d8e043804c2..dbe43df8cfec 100644
--- a/arch/arm/mach-s3c2410/dma.c
+++ b/arch/arm/mach-s3c2410/dma.c
@@ -47,38 +47,26 @@ static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = {
47 .channels[0] = S3C2410_DCON_CH0_SDI | DMA_CH_VALID, 47 .channels[0] = S3C2410_DCON_CH0_SDI | DMA_CH_VALID,
48 .channels[2] = S3C2410_DCON_CH2_SDI | DMA_CH_VALID, 48 .channels[2] = S3C2410_DCON_CH2_SDI | DMA_CH_VALID,
49 .channels[3] = S3C2410_DCON_CH3_SDI | DMA_CH_VALID, 49 .channels[3] = S3C2410_DCON_CH3_SDI | DMA_CH_VALID,
50 .hw_addr.to = S3C2410_PA_IIS + S3C2410_IISFIFO,
51 .hw_addr.from = S3C2410_PA_IIS + S3C2410_IISFIFO,
52 }, 50 },
53 [DMACH_SPI0] = { 51 [DMACH_SPI0] = {
54 .name = "spi0", 52 .name = "spi0",
55 .channels[1] = S3C2410_DCON_CH1_SPI | DMA_CH_VALID, 53 .channels[1] = S3C2410_DCON_CH1_SPI | DMA_CH_VALID,
56 .hw_addr.to = S3C2410_PA_SPI + S3C2410_SPTDAT,
57 .hw_addr.from = S3C2410_PA_SPI + S3C2410_SPRDAT,
58 }, 54 },
59 [DMACH_SPI1] = { 55 [DMACH_SPI1] = {
60 .name = "spi1", 56 .name = "spi1",
61 .channels[3] = S3C2410_DCON_CH3_SPI | DMA_CH_VALID, 57 .channels[3] = S3C2410_DCON_CH3_SPI | DMA_CH_VALID,
62 .hw_addr.to = S3C2410_PA_SPI + 0x20 + S3C2410_SPTDAT,
63 .hw_addr.from = S3C2410_PA_SPI + 0x20 + S3C2410_SPRDAT,
64 }, 58 },
65 [DMACH_UART0] = { 59 [DMACH_UART0] = {
66 .name = "uart0", 60 .name = "uart0",
67 .channels[0] = S3C2410_DCON_CH0_UART0 | DMA_CH_VALID, 61 .channels[0] = S3C2410_DCON_CH0_UART0 | DMA_CH_VALID,
68 .hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH,
69 .hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH,
70 }, 62 },
71 [DMACH_UART1] = { 63 [DMACH_UART1] = {
72 .name = "uart1", 64 .name = "uart1",
73 .channels[1] = S3C2410_DCON_CH1_UART1 | DMA_CH_VALID, 65 .channels[1] = S3C2410_DCON_CH1_UART1 | DMA_CH_VALID,
74 .hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH,
75 .hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH,
76 }, 66 },
77 [DMACH_UART2] = { 67 [DMACH_UART2] = {
78 .name = "uart2", 68 .name = "uart2",
79 .channels[3] = S3C2410_DCON_CH3_UART2 | DMA_CH_VALID, 69 .channels[3] = S3C2410_DCON_CH3_UART2 | DMA_CH_VALID,
80 .hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH,
81 .hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH,
82 }, 70 },
83 [DMACH_TIMER] = { 71 [DMACH_TIMER] = {
84 .name = "timer", 72 .name = "timer",
@@ -90,12 +78,10 @@ static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = {
90 .name = "i2s-sdi", 78 .name = "i2s-sdi",
91 .channels[1] = S3C2410_DCON_CH1_I2SSDI | DMA_CH_VALID, 79 .channels[1] = S3C2410_DCON_CH1_I2SSDI | DMA_CH_VALID,
92 .channels[2] = S3C2410_DCON_CH2_I2SSDI | DMA_CH_VALID, 80 .channels[2] = S3C2410_DCON_CH2_I2SSDI | DMA_CH_VALID,
93 .hw_addr.from = S3C2410_PA_IIS + S3C2410_IISFIFO,
94 }, 81 },
95 [DMACH_I2S_OUT] = { 82 [DMACH_I2S_OUT] = {
96 .name = "i2s-sdo", 83 .name = "i2s-sdo",
97 .channels[2] = S3C2410_DCON_CH2_I2SSDO | DMA_CH_VALID, 84 .channels[2] = S3C2410_DCON_CH2_I2SSDO | DMA_CH_VALID,
98 .hw_addr.to = S3C2410_PA_IIS + S3C2410_IISFIFO,
99 }, 85 },
100 [DMACH_USB_EP1] = { 86 [DMACH_USB_EP1] = {
101 .name = "usb-ep1", 87 .name = "usb-ep1",
diff --git a/arch/arm/mach-s3c2410/gpio.c b/arch/arm/mach-s3c2410/gpio.c
deleted file mode 100644
index 9664e011dae2..000000000000
--- a/arch/arm/mach-s3c2410/gpio.c
+++ /dev/null
@@ -1,72 +0,0 @@
1/* linux/arch/arm/mach-s3c2410/gpio.c
2 *
3 * Copyright (c) 2004-2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C2410 GPIO support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#include <linux/kernel.h>
24#include <linux/init.h>
25#include <linux/module.h>
26#include <linux/interrupt.h>
27#include <linux/ioport.h>
28#include <linux/io.h>
29
30#include <mach/hardware.h>
31#include <mach/gpio-fns.h>
32#include <asm/irq.h>
33
34#include <mach/regs-gpio.h>
35
36int s3c2410_gpio_irqfilter(unsigned int pin, unsigned int on,
37 unsigned int config)
38{
39 void __iomem *reg = S3C24XX_EINFLT0;
40 unsigned long flags;
41 unsigned long val;
42
43 if (pin < S3C2410_GPG(8) || pin > S3C2410_GPG(15))
44 return -EINVAL;
45
46 config &= 0xff;
47
48 pin -= S3C2410_GPG(8);
49 reg += pin & ~3;
50
51 local_irq_save(flags);
52
53 /* update filter width and clock source */
54
55 val = __raw_readl(reg);
56 val &= ~(0xff << ((pin & 3) * 8));
57 val |= config << ((pin & 3) * 8);
58 __raw_writel(val, reg);
59
60 /* update filter enable */
61
62 val = __raw_readl(S3C24XX_EXTINT2);
63 val &= ~(1 << ((pin * 4) + 3));
64 val |= on << ((pin * 4) + 3);
65 __raw_writel(val, S3C24XX_EXTINT2);
66
67 local_irq_restore(flags);
68
69 return 0;
70}
71
72EXPORT_SYMBOL(s3c2410_gpio_irqfilter);
diff --git a/arch/arm/mach-s3c2410/include/mach/map.h b/arch/arm/mach-s3c2410/include/mach/map.h
index 425552d84b60..4cf495f813a7 100644
--- a/arch/arm/mach-s3c2410/include/mach/map.h
+++ b/arch/arm/mach-s3c2410/include/mach/map.h
@@ -14,9 +14,53 @@
14#define __ASM_ARCH_MAP_H 14#define __ASM_ARCH_MAP_H
15 15
16#include <plat/map-base.h> 16#include <plat/map-base.h>
17#include <plat/map.h>
18 17
19#define S3C2410_ADDR(x) S3C_ADDR(x) 18/*
19 * S3C2410 UART offset is 0x4000 but the other SoCs are 0x400.
20 * So need to define it, and here is to avoid redefinition warning.
21 */
22#define S3C_UART_OFFSET (0x4000)
23
24#include <plat/map-s3c.h>
25
26/*
27 * interrupt controller is the first thing we put in, to make
28 * the assembly code for the irq detection easier
29 */
30#define S3C2410_PA_IRQ (0x4A000000)
31#define S3C24XX_SZ_IRQ SZ_1M
32
33/* memory controller registers */
34#define S3C2410_PA_MEMCTRL (0x48000000)
35#define S3C24XX_SZ_MEMCTRL SZ_1M
36
37/* UARTs */
38#define S3C_VA_UARTx(uart) (S3C_VA_UART + ((uart * S3C_UART_OFFSET)))
39
40/* Timers */
41#define S3C2410_PA_TIMER (0x51000000)
42#define S3C24XX_SZ_TIMER SZ_1M
43
44/* Clock and Power management */
45#define S3C24XX_SZ_CLKPWR SZ_1M
46
47/* USB Device port */
48#define S3C2410_PA_USBDEV (0x52000000)
49#define S3C24XX_SZ_USBDEV SZ_1M
50
51/* Watchdog */
52#define S3C2410_PA_WATCHDOG (0x53000000)
53#define S3C24XX_SZ_WATCHDOG SZ_1M
54
55/* Standard size definitions for peripheral blocks. */
56
57#define S3C24XX_SZ_UART SZ_1M
58#define S3C24XX_SZ_IIS SZ_1M
59#define S3C24XX_SZ_ADC SZ_1M
60#define S3C24XX_SZ_SPI SZ_1M
61#define S3C24XX_SZ_SDI SZ_1M
62#define S3C24XX_SZ_NAND SZ_1M
63#define S3C24XX_SZ_GPIO SZ_1M
20 64
21/* USB host controller */ 65/* USB host controller */
22#define S3C2410_PA_USBHOST (0x49000000) 66#define S3C2410_PA_USBHOST (0x49000000)
@@ -75,10 +119,8 @@
75 119
76/* S3C2412 memory and IO controls */ 120/* S3C2412 memory and IO controls */
77#define S3C2412_PA_SSMC (0x4F000000) 121#define S3C2412_PA_SSMC (0x4F000000)
78#define S3C2412_VA_SSMC S3C_ADDR_CPU(0x00000000)
79 122
80#define S3C2412_PA_EBI (0x48800000) 123#define S3C2412_PA_EBI (0x48800000)
81#define S3C2412_VA_EBI S3C_ADDR_CPU(0x00010000)
82 124
83/* physical addresses of all the chip-select areas */ 125/* physical addresses of all the chip-select areas */
84 126
@@ -100,12 +142,10 @@
100#define S3C24XX_PA_DMA S3C2410_PA_DMA 142#define S3C24XX_PA_DMA S3C2410_PA_DMA
101#define S3C24XX_PA_CLKPWR S3C2410_PA_CLKPWR 143#define S3C24XX_PA_CLKPWR S3C2410_PA_CLKPWR
102#define S3C24XX_PA_LCD S3C2410_PA_LCD 144#define S3C24XX_PA_LCD S3C2410_PA_LCD
103#define S3C24XX_PA_UART S3C2410_PA_UART
104#define S3C24XX_PA_TIMER S3C2410_PA_TIMER 145#define S3C24XX_PA_TIMER S3C2410_PA_TIMER
105#define S3C24XX_PA_USBDEV S3C2410_PA_USBDEV 146#define S3C24XX_PA_USBDEV S3C2410_PA_USBDEV
106#define S3C24XX_PA_WATCHDOG S3C2410_PA_WATCHDOG 147#define S3C24XX_PA_WATCHDOG S3C2410_PA_WATCHDOG
107#define S3C24XX_PA_IIS S3C2410_PA_IIS 148#define S3C24XX_PA_IIS S3C2410_PA_IIS
108#define S3C24XX_PA_GPIO S3C2410_PA_GPIO
109#define S3C24XX_PA_RTC S3C2410_PA_RTC 149#define S3C24XX_PA_RTC S3C2410_PA_RTC
110#define S3C24XX_PA_ADC S3C2410_PA_ADC 150#define S3C24XX_PA_ADC S3C2410_PA_ADC
111#define S3C24XX_PA_SPI S3C2410_PA_SPI 151#define S3C24XX_PA_SPI S3C2410_PA_SPI
diff --git a/arch/arm/mach-s3c2412/Kconfig b/arch/arm/mach-s3c2412/Kconfig
index c2cf4e569989..b8b9029e9f2d 100644
--- a/arch/arm/mach-s3c2412/Kconfig
+++ b/arch/arm/mach-s3c2412/Kconfig
@@ -9,7 +9,6 @@ config CPU_S3C2412
9 select CPU_LLSERIAL_S3C2440 9 select CPU_LLSERIAL_S3C2440
10 select S3C2412_PM if PM 10 select S3C2412_PM if PM
11 select S3C2412_DMA if S3C2410_DMA 11 select S3C2412_DMA if S3C2410_DMA
12 select S3C2410_GPIO
13 help 12 help
14 Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line 13 Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line
15 14
diff --git a/arch/arm/mach-s3c2412/Makefile b/arch/arm/mach-s3c2412/Makefile
index 6c48a91ea39e..7e4d95fa8a97 100644
--- a/arch/arm/mach-s3c2412/Makefile
+++ b/arch/arm/mach-s3c2412/Makefile
@@ -12,7 +12,6 @@ obj- :=
12obj-$(CONFIG_CPU_S3C2412) += s3c2412.o 12obj-$(CONFIG_CPU_S3C2412) += s3c2412.o
13obj-$(CONFIG_CPU_S3C2412) += irq.o 13obj-$(CONFIG_CPU_S3C2412) += irq.o
14obj-$(CONFIG_CPU_S3C2412) += clock.o 14obj-$(CONFIG_CPU_S3C2412) += clock.o
15obj-$(CONFIG_CPU_S3C2412) += gpio.o
16obj-$(CONFIG_S3C2412_DMA) += dma.o 15obj-$(CONFIG_S3C2412_DMA) += dma.o
17obj-$(CONFIG_S3C2412_PM) += pm.o 16obj-$(CONFIG_S3C2412_PM) += pm.o
18obj-$(CONFIG_S3C2412_PM_SLEEP) += sleep.o 17obj-$(CONFIG_S3C2412_PM_SLEEP) += sleep.o
diff --git a/arch/arm/mach-s3c2412/dma.c b/arch/arm/mach-s3c2412/dma.c
index 7abecfca0b7e..c61e3261615d 100644
--- a/arch/arm/mach-s3c2412/dma.c
+++ b/arch/arm/mach-s3c2412/dma.c
@@ -50,64 +50,46 @@ static struct s3c24xx_dma_map __initdata s3c2412_dma_mappings[] = {
50 .name = "sdi", 50 .name = "sdi",
51 .channels = MAP(S3C2412_DMAREQSEL_SDI), 51 .channels = MAP(S3C2412_DMAREQSEL_SDI),
52 .channels_rx = MAP(S3C2412_DMAREQSEL_SDI), 52 .channels_rx = MAP(S3C2412_DMAREQSEL_SDI),
53 .hw_addr.to = S3C2410_PA_SDI + S3C2410_SDIDATA,
54 .hw_addr.from = S3C2410_PA_SDI + S3C2410_SDIDATA,
55 }, 53 },
56 [DMACH_SPI0] = { 54 [DMACH_SPI0] = {
57 .name = "spi0", 55 .name = "spi0",
58 .channels = MAP(S3C2412_DMAREQSEL_SPI0TX), 56 .channels = MAP(S3C2412_DMAREQSEL_SPI0TX),
59 .channels_rx = MAP(S3C2412_DMAREQSEL_SPI0RX), 57 .channels_rx = MAP(S3C2412_DMAREQSEL_SPI0RX),
60 .hw_addr.to = S3C2410_PA_SPI + S3C2410_SPTDAT,
61 .hw_addr.from = S3C2410_PA_SPI + S3C2410_SPRDAT,
62 }, 58 },
63 [DMACH_SPI1] = { 59 [DMACH_SPI1] = {
64 .name = "spi1", 60 .name = "spi1",
65 .channels = MAP(S3C2412_DMAREQSEL_SPI1TX), 61 .channels = MAP(S3C2412_DMAREQSEL_SPI1TX),
66 .channels_rx = MAP(S3C2412_DMAREQSEL_SPI1RX), 62 .channels_rx = MAP(S3C2412_DMAREQSEL_SPI1RX),
67 .hw_addr.to = S3C2410_PA_SPI + S3C2412_SPI1 + S3C2410_SPTDAT,
68 .hw_addr.from = S3C2410_PA_SPI + S3C2412_SPI1 + S3C2410_SPRDAT,
69 }, 63 },
70 [DMACH_UART0] = { 64 [DMACH_UART0] = {
71 .name = "uart0", 65 .name = "uart0",
72 .channels = MAP(S3C2412_DMAREQSEL_UART0_0), 66 .channels = MAP(S3C2412_DMAREQSEL_UART0_0),
73 .channels_rx = MAP(S3C2412_DMAREQSEL_UART0_0), 67 .channels_rx = MAP(S3C2412_DMAREQSEL_UART0_0),
74 .hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH,
75 .hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH,
76 }, 68 },
77 [DMACH_UART1] = { 69 [DMACH_UART1] = {
78 .name = "uart1", 70 .name = "uart1",
79 .channels = MAP(S3C2412_DMAREQSEL_UART1_0), 71 .channels = MAP(S3C2412_DMAREQSEL_UART1_0),
80 .channels_rx = MAP(S3C2412_DMAREQSEL_UART1_0), 72 .channels_rx = MAP(S3C2412_DMAREQSEL_UART1_0),
81 .hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH,
82 .hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH,
83 }, 73 },
84 [DMACH_UART2] = { 74 [DMACH_UART2] = {
85 .name = "uart2", 75 .name = "uart2",
86 .channels = MAP(S3C2412_DMAREQSEL_UART2_0), 76 .channels = MAP(S3C2412_DMAREQSEL_UART2_0),
87 .channels_rx = MAP(S3C2412_DMAREQSEL_UART2_0), 77 .channels_rx = MAP(S3C2412_DMAREQSEL_UART2_0),
88 .hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH,
89 .hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH,
90 }, 78 },
91 [DMACH_UART0_SRC2] = { 79 [DMACH_UART0_SRC2] = {
92 .name = "uart0", 80 .name = "uart0",
93 .channels = MAP(S3C2412_DMAREQSEL_UART0_1), 81 .channels = MAP(S3C2412_DMAREQSEL_UART0_1),
94 .channels_rx = MAP(S3C2412_DMAREQSEL_UART0_1), 82 .channels_rx = MAP(S3C2412_DMAREQSEL_UART0_1),
95 .hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH,
96 .hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH,
97 }, 83 },
98 [DMACH_UART1_SRC2] = { 84 [DMACH_UART1_SRC2] = {
99 .name = "uart1", 85 .name = "uart1",
100 .channels = MAP(S3C2412_DMAREQSEL_UART1_1), 86 .channels = MAP(S3C2412_DMAREQSEL_UART1_1),
101 .channels_rx = MAP(S3C2412_DMAREQSEL_UART1_1), 87 .channels_rx = MAP(S3C2412_DMAREQSEL_UART1_1),
102 .hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH,
103 .hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH,
104 }, 88 },
105 [DMACH_UART2_SRC2] = { 89 [DMACH_UART2_SRC2] = {
106 .name = "uart2", 90 .name = "uart2",
107 .channels = MAP(S3C2412_DMAREQSEL_UART2_1), 91 .channels = MAP(S3C2412_DMAREQSEL_UART2_1),
108 .channels_rx = MAP(S3C2412_DMAREQSEL_UART2_1), 92 .channels_rx = MAP(S3C2412_DMAREQSEL_UART2_1),
109 .hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH,
110 .hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH,
111 }, 93 },
112 [DMACH_TIMER] = { 94 [DMACH_TIMER] = {
113 .name = "timer", 95 .name = "timer",
diff --git a/arch/arm/mach-s3c2412/gpio.c b/arch/arm/mach-s3c2412/gpio.c
deleted file mode 100644
index 3404a876b33e..000000000000
--- a/arch/arm/mach-s3c2412/gpio.c
+++ /dev/null
@@ -1,62 +0,0 @@
1/* linux/arch/arm/mach-s3c2412/gpio.c
2 *
3 * Copyright (c) 2007 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * http://armlinux.simtec.co.uk/.
7 *
8 * S3C2412/S3C2413 specific GPIO support
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/kernel.h>
16#include <linux/types.h>
17#include <linux/module.h>
18#include <linux/interrupt.h>
19#include <linux/gpio.h>
20
21#include <asm/mach/arch.h>
22#include <asm/mach/map.h>
23
24#include <mach/regs-gpio.h>
25#include <mach/hardware.h>
26
27#include <plat/gpio-core.h>
28
29int s3c2412_gpio_set_sleepcfg(unsigned int pin, unsigned int state)
30{
31 struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin);
32 unsigned long offs = pin - chip->chip.base;
33 unsigned long flags;
34 unsigned long slpcon;
35
36 offs *= 2;
37
38 if (pin < S3C2410_GPB(0))
39 return -EINVAL;
40
41 if (pin >= S3C2410_GPF(0) &&
42 pin <= S3C2410_GPG(16))
43 return -EINVAL;
44
45 if (pin > S3C2410_GPH(16))
46 return -EINVAL;
47
48 local_irq_save(flags);
49
50 slpcon = __raw_readl(chip->base + 0x0C);
51
52 slpcon &= ~(3 << offs);
53 slpcon |= state << offs;
54
55 __raw_writel(slpcon, chip->base + 0x0C);
56
57 local_irq_restore(flags);
58
59 return 0;
60}
61
62EXPORT_SYMBOL(s3c2412_gpio_set_sleepcfg);
diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig
index 50825a3f91cc..c461fb8e15c0 100644
--- a/arch/arm/mach-s3c2440/Kconfig
+++ b/arch/arm/mach-s3c2440/Kconfig
@@ -8,7 +8,6 @@ config CPU_S3C2440
8 select S3C_GPIO_PULL_UP 8 select S3C_GPIO_PULL_UP
9 select S3C2410_CLOCK 9 select S3C2410_CLOCK
10 select S3C2410_PM if PM 10 select S3C2410_PM if PM
11 select S3C2410_GPIO
12 select S3C2440_DMA if S3C2410_DMA 11 select S3C2440_DMA if S3C2410_DMA
13 select CPU_S3C244X 12 select CPU_S3C244X
14 select CPU_LLSERIAL_S3C2440 13 select CPU_LLSERIAL_S3C2440
@@ -20,7 +19,6 @@ config CPU_S3C2442
20 select CPU_ARM920T 19 select CPU_ARM920T
21 select S3C_GPIO_PULL_DOWN 20 select S3C_GPIO_PULL_DOWN
22 select S3C2410_CLOCK 21 select S3C2410_CLOCK
23 select S3C2410_GPIO
24 select S3C2410_PM if PM 22 select S3C2410_PM if PM
25 select CPU_S3C244X 23 select CPU_S3C244X
26 select CPU_LLSERIAL_S3C2440 24 select CPU_LLSERIAL_S3C2440
diff --git a/arch/arm/mach-s3c2440/dma.c b/arch/arm/mach-s3c2440/dma.c
index 3b0529f54e9c..0e73f8f9d132 100644
--- a/arch/arm/mach-s3c2440/dma.c
+++ b/arch/arm/mach-s3c2440/dma.c
@@ -48,38 +48,26 @@ static struct s3c24xx_dma_map __initdata s3c2440_dma_mappings[] = {
48 .channels[1] = S3C2440_DCON_CH1_SDI | DMA_CH_VALID, 48 .channels[1] = S3C2440_DCON_CH1_SDI | DMA_CH_VALID,
49 .channels[2] = S3C2410_DCON_CH2_SDI | DMA_CH_VALID, 49 .channels[2] = S3C2410_DCON_CH2_SDI | DMA_CH_VALID,
50 .channels[3] = S3C2410_DCON_CH3_SDI | DMA_CH_VALID, 50 .channels[3] = S3C2410_DCON_CH3_SDI | DMA_CH_VALID,
51 .hw_addr.to = S3C2410_PA_IIS + S3C2410_IISFIFO,
52 .hw_addr.from = S3C2410_PA_IIS + S3C2410_IISFIFO,
53 }, 51 },
54 [DMACH_SPI0] = { 52 [DMACH_SPI0] = {
55 .name = "spi0", 53 .name = "spi0",
56 .channels[1] = S3C2410_DCON_CH1_SPI | DMA_CH_VALID, 54 .channels[1] = S3C2410_DCON_CH1_SPI | DMA_CH_VALID,
57 .hw_addr.to = S3C2410_PA_SPI + S3C2410_SPTDAT,
58 .hw_addr.from = S3C2410_PA_SPI + S3C2410_SPRDAT,
59 }, 55 },
60 [DMACH_SPI1] = { 56 [DMACH_SPI1] = {
61 .name = "spi1", 57 .name = "spi1",
62 .channels[3] = S3C2410_DCON_CH3_SPI | DMA_CH_VALID, 58 .channels[3] = S3C2410_DCON_CH3_SPI | DMA_CH_VALID,
63 .hw_addr.to = S3C2410_PA_SPI + 0x20 + S3C2410_SPTDAT,
64 .hw_addr.from = S3C2410_PA_SPI + 0x20 + S3C2410_SPRDAT,
65 }, 59 },
66 [DMACH_UART0] = { 60 [DMACH_UART0] = {
67 .name = "uart0", 61 .name = "uart0",
68 .channels[0] = S3C2410_DCON_CH0_UART0 | DMA_CH_VALID, 62 .channels[0] = S3C2410_DCON_CH0_UART0 | DMA_CH_VALID,
69 .hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH,
70 .hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH,
71 }, 63 },
72 [DMACH_UART1] = { 64 [DMACH_UART1] = {
73 .name = "uart1", 65 .name = "uart1",
74 .channels[1] = S3C2410_DCON_CH1_UART1 | DMA_CH_VALID, 66 .channels[1] = S3C2410_DCON_CH1_UART1 | DMA_CH_VALID,
75 .hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH,
76 .hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH,
77 }, 67 },
78 [DMACH_UART2] = { 68 [DMACH_UART2] = {
79 .name = "uart2", 69 .name = "uart2",
80 .channels[3] = S3C2410_DCON_CH3_UART2 | DMA_CH_VALID, 70 .channels[3] = S3C2410_DCON_CH3_UART2 | DMA_CH_VALID,
81 .hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH,
82 .hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH,
83 }, 71 },
84 [DMACH_TIMER] = { 72 [DMACH_TIMER] = {
85 .name = "timer", 73 .name = "timer",
@@ -91,31 +79,26 @@ static struct s3c24xx_dma_map __initdata s3c2440_dma_mappings[] = {
91 .name = "i2s-sdi", 79 .name = "i2s-sdi",
92 .channels[1] = S3C2410_DCON_CH1_I2SSDI | DMA_CH_VALID, 80 .channels[1] = S3C2410_DCON_CH1_I2SSDI | DMA_CH_VALID,
93 .channels[2] = S3C2410_DCON_CH2_I2SSDI | DMA_CH_VALID, 81 .channels[2] = S3C2410_DCON_CH2_I2SSDI | DMA_CH_VALID,
94 .hw_addr.from = S3C2410_PA_IIS + S3C2410_IISFIFO,
95 }, 82 },
96 [DMACH_I2S_OUT] = { 83 [DMACH_I2S_OUT] = {
97 .name = "i2s-sdo", 84 .name = "i2s-sdo",
98 .channels[0] = S3C2440_DCON_CH0_I2SSDO | DMA_CH_VALID, 85 .channels[0] = S3C2440_DCON_CH0_I2SSDO | DMA_CH_VALID,
99 .channels[2] = S3C2410_DCON_CH2_I2SSDO | DMA_CH_VALID, 86 .channels[2] = S3C2410_DCON_CH2_I2SSDO | DMA_CH_VALID,
100 .hw_addr.to = S3C2410_PA_IIS + S3C2410_IISFIFO,
101 }, 87 },
102 [DMACH_PCM_IN] = { 88 [DMACH_PCM_IN] = {
103 .name = "pcm-in", 89 .name = "pcm-in",
104 .channels[0] = S3C2440_DCON_CH0_PCMIN | DMA_CH_VALID, 90 .channels[0] = S3C2440_DCON_CH0_PCMIN | DMA_CH_VALID,
105 .channels[2] = S3C2440_DCON_CH2_PCMIN | DMA_CH_VALID, 91 .channels[2] = S3C2440_DCON_CH2_PCMIN | DMA_CH_VALID,
106 .hw_addr.from = S3C2440_PA_AC97 + S3C_AC97_PCM_DATA,
107 }, 92 },
108 [DMACH_PCM_OUT] = { 93 [DMACH_PCM_OUT] = {
109 .name = "pcm-out", 94 .name = "pcm-out",
110 .channels[1] = S3C2440_DCON_CH1_PCMOUT | DMA_CH_VALID, 95 .channels[1] = S3C2440_DCON_CH1_PCMOUT | DMA_CH_VALID,
111 .channels[3] = S3C2440_DCON_CH3_PCMOUT | DMA_CH_VALID, 96 .channels[3] = S3C2440_DCON_CH3_PCMOUT | DMA_CH_VALID,
112 .hw_addr.to = S3C2440_PA_AC97 + S3C_AC97_PCM_DATA,
113 }, 97 },
114 [DMACH_MIC_IN] = { 98 [DMACH_MIC_IN] = {
115 .name = "mic-in", 99 .name = "mic-in",
116 .channels[2] = S3C2440_DCON_CH2_MICIN | DMA_CH_VALID, 100 .channels[2] = S3C2440_DCON_CH2_MICIN | DMA_CH_VALID,
117 .channels[3] = S3C2440_DCON_CH3_MICIN | DMA_CH_VALID, 101 .channels[3] = S3C2440_DCON_CH3_MICIN | DMA_CH_VALID,
118 .hw_addr.from = S3C2440_PA_AC97 + S3C_AC97_MIC_DATA,
119 }, 102 },
120 [DMACH_USB_EP1] = { 103 [DMACH_USB_EP1] = {
121 .name = "usb-ep1", 104 .name = "usb-ep1",
diff --git a/arch/arm/mach-s3c2443/dma.c b/arch/arm/mach-s3c2443/dma.c
index 3f658685ec16..fe52151d2e84 100644
--- a/arch/arm/mach-s3c2443/dma.c
+++ b/arch/arm/mach-s3c2443/dma.c
@@ -54,68 +54,46 @@ static struct s3c24xx_dma_map __initdata s3c2443_dma_mappings[] = {
54 [DMACH_SDI] = { 54 [DMACH_SDI] = {
55 .name = "sdi", 55 .name = "sdi",
56 .channels = MAP(S3C2443_DMAREQSEL_SDI), 56 .channels = MAP(S3C2443_DMAREQSEL_SDI),
57 .hw_addr.to = S3C2410_PA_IIS + S3C2410_IISFIFO,
58 .hw_addr.from = S3C2410_PA_IIS + S3C2410_IISFIFO,
59 }, 57 },
60 [DMACH_SPI0] = { 58 [DMACH_SPI0] = {
61 .name = "spi0", 59 .name = "spi0",
62 .channels = MAP(S3C2443_DMAREQSEL_SPI0TX), 60 .channels = MAP(S3C2443_DMAREQSEL_SPI0TX),
63 .hw_addr.to = S3C2410_PA_SPI + S3C2410_SPTDAT,
64 .hw_addr.from = S3C2410_PA_SPI + S3C2410_SPRDAT,
65 }, 61 },
66 [DMACH_SPI1] = { 62 [DMACH_SPI1] = {
67 .name = "spi1", 63 .name = "spi1",
68 .channels = MAP(S3C2443_DMAREQSEL_SPI1TX), 64 .channels = MAP(S3C2443_DMAREQSEL_SPI1TX),
69 .hw_addr.to = S3C2410_PA_SPI + 0x20 + S3C2410_SPTDAT,
70 .hw_addr.from = S3C2410_PA_SPI + 0x20 + S3C2410_SPRDAT,
71 }, 65 },
72 [DMACH_UART0] = { 66 [DMACH_UART0] = {
73 .name = "uart0", 67 .name = "uart0",
74 .channels = MAP(S3C2443_DMAREQSEL_UART0_0), 68 .channels = MAP(S3C2443_DMAREQSEL_UART0_0),
75 .hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH,
76 .hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH,
77 }, 69 },
78 [DMACH_UART1] = { 70 [DMACH_UART1] = {
79 .name = "uart1", 71 .name = "uart1",
80 .channels = MAP(S3C2443_DMAREQSEL_UART1_0), 72 .channels = MAP(S3C2443_DMAREQSEL_UART1_0),
81 .hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH,
82 .hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH,
83 }, 73 },
84 [DMACH_UART2] = { 74 [DMACH_UART2] = {
85 .name = "uart2", 75 .name = "uart2",
86 .channels = MAP(S3C2443_DMAREQSEL_UART2_0), 76 .channels = MAP(S3C2443_DMAREQSEL_UART2_0),
87 .hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH,
88 .hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH,
89 }, 77 },
90 [DMACH_UART3] = { 78 [DMACH_UART3] = {
91 .name = "uart3", 79 .name = "uart3",
92 .channels = MAP(S3C2443_DMAREQSEL_UART3_0), 80 .channels = MAP(S3C2443_DMAREQSEL_UART3_0),
93 .hw_addr.to = S3C2443_PA_UART3 + S3C2410_UTXH,
94 .hw_addr.from = S3C2443_PA_UART3 + S3C2410_URXH,
95 }, 81 },
96 [DMACH_UART0_SRC2] = { 82 [DMACH_UART0_SRC2] = {
97 .name = "uart0", 83 .name = "uart0",
98 .channels = MAP(S3C2443_DMAREQSEL_UART0_1), 84 .channels = MAP(S3C2443_DMAREQSEL_UART0_1),
99 .hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH,
100 .hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH,
101 }, 85 },
102 [DMACH_UART1_SRC2] = { 86 [DMACH_UART1_SRC2] = {
103 .name = "uart1", 87 .name = "uart1",
104 .channels = MAP(S3C2443_DMAREQSEL_UART1_1), 88 .channels = MAP(S3C2443_DMAREQSEL_UART1_1),
105 .hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH,
106 .hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH,
107 }, 89 },
108 [DMACH_UART2_SRC2] = { 90 [DMACH_UART2_SRC2] = {
109 .name = "uart2", 91 .name = "uart2",
110 .channels = MAP(S3C2443_DMAREQSEL_UART2_1), 92 .channels = MAP(S3C2443_DMAREQSEL_UART2_1),
111 .hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH,
112 .hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH,
113 }, 93 },
114 [DMACH_UART3_SRC2] = { 94 [DMACH_UART3_SRC2] = {
115 .name = "uart3", 95 .name = "uart3",
116 .channels = MAP(S3C2443_DMAREQSEL_UART3_1), 96 .channels = MAP(S3C2443_DMAREQSEL_UART3_1),
117 .hw_addr.to = S3C2443_PA_UART3 + S3C2410_UTXH,
118 .hw_addr.from = S3C2443_PA_UART3 + S3C2410_URXH,
119 }, 97 },
120 [DMACH_TIMER] = { 98 [DMACH_TIMER] = {
121 .name = "timer", 99 .name = "timer",
@@ -124,27 +102,22 @@ static struct s3c24xx_dma_map __initdata s3c2443_dma_mappings[] = {
124 [DMACH_I2S_IN] = { 102 [DMACH_I2S_IN] = {
125 .name = "i2s-sdi", 103 .name = "i2s-sdi",
126 .channels = MAP(S3C2443_DMAREQSEL_I2SRX), 104 .channels = MAP(S3C2443_DMAREQSEL_I2SRX),
127 .hw_addr.from = S3C2410_PA_IIS + S3C2410_IISFIFO,
128 }, 105 },
129 [DMACH_I2S_OUT] = { 106 [DMACH_I2S_OUT] = {
130 .name = "i2s-sdo", 107 .name = "i2s-sdo",
131 .channels = MAP(S3C2443_DMAREQSEL_I2STX), 108 .channels = MAP(S3C2443_DMAREQSEL_I2STX),
132 .hw_addr.to = S3C2410_PA_IIS + S3C2410_IISFIFO,
133 }, 109 },
134 [DMACH_PCM_IN] = { 110 [DMACH_PCM_IN] = {
135 .name = "pcm-in", 111 .name = "pcm-in",
136 .channels = MAP(S3C2443_DMAREQSEL_PCMIN), 112 .channels = MAP(S3C2443_DMAREQSEL_PCMIN),
137 .hw_addr.from = S3C2440_PA_AC97 + S3C_AC97_PCM_DATA,
138 }, 113 },
139 [DMACH_PCM_OUT] = { 114 [DMACH_PCM_OUT] = {
140 .name = "pcm-out", 115 .name = "pcm-out",
141 .channels = MAP(S3C2443_DMAREQSEL_PCMOUT), 116 .channels = MAP(S3C2443_DMAREQSEL_PCMOUT),
142 .hw_addr.to = S3C2440_PA_AC97 + S3C_AC97_PCM_DATA,
143 }, 117 },
144 [DMACH_MIC_IN] = { 118 [DMACH_MIC_IN] = {
145 .name = "mic-in", 119 .name = "mic-in",
146 .channels = MAP(S3C2443_DMAREQSEL_MICIN), 120 .channels = MAP(S3C2443_DMAREQSEL_MICIN),
147 .hw_addr.from = S3C2440_PA_AC97 + S3C_AC97_MIC_DATA,
148 }, 121 },
149}; 122};
150 123
diff --git a/arch/arm/mach-s3c64xx/include/mach/map.h b/arch/arm/mach-s3c64xx/include/mach/map.h
index a1f13f02c841..23a1d71e4d53 100644
--- a/arch/arm/mach-s3c64xx/include/mach/map.h
+++ b/arch/arm/mach-s3c64xx/include/mach/map.h
@@ -16,6 +16,7 @@
16#define __ASM_ARCH_MAP_H __FILE__ 16#define __ASM_ARCH_MAP_H __FILE__
17 17
18#include <plat/map-base.h> 18#include <plat/map-base.h>
19#include <plat/map-s3c.h>
19 20
20/* 21/*
21 * Post-mux Chip Select Regions Xm0CSn_ 22 * Post-mux Chip Select Regions Xm0CSn_
@@ -83,7 +84,6 @@
83#define S3C64XX_PA_IIC1 (0x7F00F000) 84#define S3C64XX_PA_IIC1 (0x7F00F000)
84 85
85#define S3C64XX_PA_GPIO (0x7F008000) 86#define S3C64XX_PA_GPIO (0x7F008000)
86#define S3C64XX_VA_GPIO S3C_ADDR_CPU(0x00000000)
87#define S3C64XX_SZ_GPIO SZ_4K 87#define S3C64XX_SZ_GPIO SZ_4K
88 88
89#define S3C64XX_PA_SDRAM (0x50000000) 89#define S3C64XX_PA_SDRAM (0x50000000)
@@ -94,16 +94,10 @@
94#define S3C64XX_PA_VIC1 (0x71300000) 94#define S3C64XX_PA_VIC1 (0x71300000)
95 95
96#define S3C64XX_PA_MODEM (0x74108000) 96#define S3C64XX_PA_MODEM (0x74108000)
97#define S3C64XX_VA_MODEM S3C_ADDR_CPU(0x00100000)
98 97
99#define S3C64XX_PA_USBHOST (0x74300000) 98#define S3C64XX_PA_USBHOST (0x74300000)
100 99
101#define S3C64XX_PA_USB_HSPHY (0x7C100000) 100#define S3C64XX_PA_USB_HSPHY (0x7C100000)
102#define S3C64XX_VA_USB_HSPHY S3C_ADDR_CPU(0x00200000)
103
104/* place VICs close together */
105#define VA_VIC0 (S3C_VA_IRQ + 0x00)
106#define VA_VIC1 (S3C_VA_IRQ + 0x10000)
107 101
108/* compatibiltiy defines. */ 102/* compatibiltiy defines. */
109#define S3C_PA_TIMER S3C64XX_PA_TIMER 103#define S3C_PA_TIMER S3C64XX_PA_TIMER
@@ -119,7 +113,6 @@
119#define S3C_PA_FB S3C64XX_PA_FB 113#define S3C_PA_FB S3C64XX_PA_FB
120#define S3C_PA_USBHOST S3C64XX_PA_USBHOST 114#define S3C_PA_USBHOST S3C64XX_PA_USBHOST
121#define S3C_PA_USB_HSOTG S3C64XX_PA_USB_HSOTG 115#define S3C_PA_USB_HSOTG S3C64XX_PA_USB_HSOTG
122#define S3C_VA_USB_HSPHY S3C64XX_VA_USB_HSPHY
123#define S3C_PA_RTC S3C64XX_PA_RTC 116#define S3C_PA_RTC S3C64XX_PA_RTC
124#define S3C_PA_WDT S3C64XX_PA_WATCHDOG 117#define S3C_PA_WDT S3C64XX_PA_WATCHDOG
125 118
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c
index af0c2fe1ea37..f32ec68002ef 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -329,9 +329,6 @@ static struct platform_device *crag6410_devices[] __initdata = {
329 &s3c_device_fb, 329 &s3c_device_fb,
330 &s3c_device_ohci, 330 &s3c_device_ohci,
331 &s3c_device_usb_hsotg, 331 &s3c_device_usb_hsotg,
332 &s3c_device_adc,
333 &s3c_device_rtc,
334 &s3c_device_ts,
335 &s3c_device_timer[0], 332 &s3c_device_timer[0],
336 &s3c64xx_device_iis0, 333 &s3c64xx_device_iis0,
337 &s3c64xx_device_iis1, 334 &s3c64xx_device_iis1,
diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c
index 527f49bd1b57..8f34a3c10497 100644
--- a/arch/arm/mach-s3c64xx/mach-mini6410.c
+++ b/arch/arm/mach-s3c64xx/mach-mini6410.c
@@ -205,12 +205,6 @@ static struct platform_device mini6410_lcd_powerdev = {
205 .dev.platform_data = &mini6410_lcd_power_data, 205 .dev.platform_data = &mini6410_lcd_power_data,
206}; 206};
207 207
208static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
209 .delay = 10000,
210 .presc = 49,
211 .oversampling_shift = 2,
212};
213
214static struct platform_device *mini6410_devices[] __initdata = { 208static struct platform_device *mini6410_devices[] __initdata = {
215 &mini6410_device_eth, 209 &mini6410_device_eth,
216 &s3c_device_hsmmc0, 210 &s3c_device_hsmmc0,
@@ -319,7 +313,7 @@ static void __init mini6410_machine_init(void)
319 313
320 s3c_nand_set_platdata(&mini6410_nand_info); 314 s3c_nand_set_platdata(&mini6410_nand_info);
321 s3c_fb_set_platdata(&mini6410_lcd_pdata); 315 s3c_fb_set_platdata(&mini6410_lcd_pdata);
322 s3c24xx_ts_set_platdata(&s3c_ts_platform); 316 s3c24xx_ts_set_platdata(NULL);
323 317
324 /* configure nCS1 width to 16 bits */ 318 /* configure nCS1 width to 16 bits */
325 319
diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c
index 95b04b1729e3..1f5abfae4eac 100644
--- a/arch/arm/mach-s3c64xx/mach-real6410.c
+++ b/arch/arm/mach-s3c64xx/mach-real6410.c
@@ -198,12 +198,6 @@ static struct platform_device *real6410_devices[] __initdata = {
198 &s3c_device_ohci, 198 &s3c_device_ohci,
199}; 199};
200 200
201static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
202 .delay = 10000,
203 .presc = 49,
204 .oversampling_shift = 2,
205};
206
207static void __init real6410_map_io(void) 201static void __init real6410_map_io(void)
208{ 202{
209 u32 tmp; 203 u32 tmp;
@@ -300,7 +294,7 @@ static void __init real6410_machine_init(void)
300 294
301 s3c_fb_set_platdata(&real6410_lcd_pdata); 295 s3c_fb_set_platdata(&real6410_lcd_pdata);
302 s3c_nand_set_platdata(&real6410_nand_info); 296 s3c_nand_set_platdata(&real6410_nand_info);
303 s3c24xx_ts_set_platdata(&s3c_ts_platform); 297 s3c24xx_ts_set_platdata(NULL);
304 298
305 /* configure nCS1 width to 16 bits */ 299 /* configure nCS1 width to 16 bits */
306 300
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c
index a9f3183e0290..d831c97833ba 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -619,12 +619,6 @@ static struct i2c_board_info i2c_devs1[] __initdata = {
619 { I2C_BOARD_INFO("24c128", 0x57), }, /* Samsung S524AD0XD1 */ 619 { I2C_BOARD_INFO("24c128", 0x57), }, /* Samsung S524AD0XD1 */
620}; 620};
621 621
622static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
623 .delay = 10000,
624 .presc = 49,
625 .oversampling_shift = 2,
626};
627
628/* LCD Backlight data */ 622/* LCD Backlight data */
629static struct samsung_bl_gpio_info smdk6410_bl_gpio_info = { 623static struct samsung_bl_gpio_info smdk6410_bl_gpio_info = {
630 .no = S3C64XX_GPF(15), 624 .no = S3C64XX_GPF(15),
@@ -666,7 +660,7 @@ static void __init smdk6410_machine_init(void)
666 660
667 samsung_keypad_set_platdata(&smdk6410_keypad_data); 661 samsung_keypad_set_platdata(&smdk6410_keypad_data);
668 662
669 s3c24xx_ts_set_platdata(&s3c_ts_platform); 663 s3c24xx_ts_set_platdata(NULL);
670 664
671 /* configure nCS1 width to 16 bits */ 665 /* configure nCS1 width to 16 bits */
672 666
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c
index 346f8dfa6f35..340f30f4a3da 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6440.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c
@@ -129,12 +129,6 @@ static struct i2c_board_info smdk6440_i2c_devs1[] __initdata = {
129 /* To be populated */ 129 /* To be populated */
130}; 130};
131 131
132static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
133 .delay = 10000,
134 .presc = 49,
135 .oversampling_shift = 2,
136};
137
138/* LCD Backlight data */ 132/* LCD Backlight data */
139static struct samsung_bl_gpio_info smdk6440_bl_gpio_info = { 133static struct samsung_bl_gpio_info smdk6440_bl_gpio_info = {
140 .no = S5P6440_GPF(15), 134 .no = S5P6440_GPF(15),
@@ -155,7 +149,7 @@ static void __init smdk6440_map_io(void)
155 149
156static void __init smdk6440_machine_init(void) 150static void __init smdk6440_machine_init(void)
157{ 151{
158 s3c24xx_ts_set_platdata(&s3c_ts_platform); 152 s3c24xx_ts_set_platdata(NULL);
159 153
160 s3c_i2c0_set_platdata(&s5p6440_i2c0_data); 154 s3c_i2c0_set_platdata(&s5p6440_i2c0_data);
161 s3c_i2c1_set_platdata(&s5p6440_i2c1_data); 155 s3c_i2c1_set_platdata(&s5p6440_i2c1_data);
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c
index 33f2adf8f3fe..ee0da14665b6 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6450.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c
@@ -148,12 +148,6 @@ static struct i2c_board_info smdk6450_i2c_devs1[] __initdata = {
148 { I2C_BOARD_INFO("24c128", 0x57), },/* Samsung S524AD0XD1 EEPROM */ 148 { I2C_BOARD_INFO("24c128", 0x57), },/* Samsung S524AD0XD1 EEPROM */
149}; 149};
150 150
151static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
152 .delay = 10000,
153 .presc = 49,
154 .oversampling_shift = 2,
155};
156
157/* LCD Backlight data */ 151/* LCD Backlight data */
158static struct samsung_bl_gpio_info smdk6450_bl_gpio_info = { 152static struct samsung_bl_gpio_info smdk6450_bl_gpio_info = {
159 .no = S5P6450_GPF(15), 153 .no = S5P6450_GPF(15),
@@ -174,7 +168,7 @@ static void __init smdk6450_map_io(void)
174 168
175static void __init smdk6450_machine_init(void) 169static void __init smdk6450_machine_init(void)
176{ 170{
177 s3c24xx_ts_set_platdata(&s3c_ts_platform); 171 s3c24xx_ts_set_platdata(NULL);
178 172
179 s3c_i2c0_set_platdata(&s5p6450_i2c0_data); 173 s3c_i2c0_set_platdata(&s5p6450_i2c0_data);
180 s3c_i2c1_set_platdata(&s5p6450_i2c1_data); 174 s3c_i2c1_set_platdata(&s5p6450_i2c1_data);
diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c
index 227d8908aab6..0b70762ebf1a 100644
--- a/arch/arm/mach-s5pc100/mach-smdkc100.c
+++ b/arch/arm/mach-s5pc100/mach-smdkc100.c
@@ -203,12 +203,6 @@ static struct platform_device *smdkc100_devices[] __initdata = {
203 &s5pc100_device_spdif, 203 &s5pc100_device_spdif,
204}; 204};
205 205
206static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
207 .delay = 10000,
208 .presc = 49,
209 .oversampling_shift = 2,
210};
211
212/* LCD Backlight data */ 206/* LCD Backlight data */
213static struct samsung_bl_gpio_info smdkc100_bl_gpio_info = { 207static struct samsung_bl_gpio_info smdkc100_bl_gpio_info = {
214 .no = S5PC100_GPD(0), 208 .no = S5PC100_GPD(0),
@@ -228,7 +222,7 @@ static void __init smdkc100_map_io(void)
228 222
229static void __init smdkc100_machine_init(void) 223static void __init smdkc100_machine_init(void)
230{ 224{
231 s3c24xx_ts_set_platdata(&s3c_ts_platform); 225 s3c24xx_ts_set_platdata(NULL);
232 226
233 /* I2C */ 227 /* I2C */
234 s3c_i2c0_set_platdata(NULL); 228 s3c_i2c0_set_platdata(NULL);
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig
index 69dd87cd8e22..aaeb44a73716 100644
--- a/arch/arm/mach-s5pv210/Kconfig
+++ b/arch/arm/mach-s5pv210/Kconfig
@@ -14,7 +14,6 @@ config CPU_S5PV210
14 select S3C_PL330_DMA 14 select S3C_PL330_DMA
15 select S5P_EXT_INT 15 select S5P_EXT_INT
16 select S5P_HRT 16 select S5P_HRT
17 select S5PV210_PM if PM
18 help 17 help
19 Enable S5PV210 CPU support 18 Enable S5PV210 CPU support
20 19
@@ -169,9 +168,4 @@ config MACH_TORBRECK
169 168
170endmenu 169endmenu
171 170
172config S5PV210_PM
173 bool
174 help
175 Power Management code common to S5PV210
176
177endif 171endif
diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile
index 599a3c0e8f6c..ef7e4668d670 100644
--- a/arch/arm/mach-s5pv210/Makefile
+++ b/arch/arm/mach-s5pv210/Makefile
@@ -14,7 +14,7 @@ obj- :=
14 14
15obj-$(CONFIG_CPU_S5PV210) += cpu.o init.o clock.o dma.o 15obj-$(CONFIG_CPU_S5PV210) += cpu.o init.o clock.o dma.o
16obj-$(CONFIG_CPU_S5PV210) += setup-i2c0.o 16obj-$(CONFIG_CPU_S5PV210) += setup-i2c0.o
17obj-$(CONFIG_S5PV210_PM) += pm.o sleep.o 17obj-$(CONFIG_PM) += pm.o sleep.o
18 18
19# machine support 19# machine support
20 20
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
index 5e011fc6720d..4b27bcaf676a 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -265,12 +265,6 @@ static struct i2c_board_info smdkv210_i2c_devs2[] __initdata = {
265 /* To Be Updated */ 265 /* To Be Updated */
266}; 266};
267 267
268static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
269 .delay = 10000,
270 .presc = 49,
271 .oversampling_shift = 2,
272};
273
274/* LCD Backlight data */ 268/* LCD Backlight data */
275static struct samsung_bl_gpio_info smdkv210_bl_gpio_info = { 269static struct samsung_bl_gpio_info smdkv210_bl_gpio_info = {
276 .no = S5PV210_GPD0(3), 270 .no = S5PV210_GPD0(3),
@@ -296,7 +290,7 @@ static void __init smdkv210_machine_init(void)
296 smdkv210_dm9000_init(); 290 smdkv210_dm9000_init();
297 291
298 samsung_keypad_set_platdata(&smdkv210_keypad_data); 292 samsung_keypad_set_platdata(&smdkv210_keypad_data);
299 s3c24xx_ts_set_platdata(&s3c_ts_platform); 293 s3c24xx_ts_set_platdata(NULL);
300 294
301 s3c_i2c0_set_platdata(NULL); 295 s3c_i2c0_set_platdata(NULL);
302 s3c_i2c1_set_platdata(NULL); 296 s3c_i2c1_set_platdata(NULL);
diff --git a/arch/arm/plat-s3c24xx/include/plat/map.h b/arch/arm/plat-s3c24xx/include/plat/map.h
deleted file mode 100644
index bd534d32b993..000000000000
--- a/arch/arm/plat-s3c24xx/include/plat/map.h
+++ /dev/null
@@ -1,100 +0,0 @@
1/* linux/include/asm-arm/plat-s3c24xx/map.h
2 *
3 * Copyright (c) 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C24XX - Memory map definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_PLAT_S3C24XX_MAP_H
14#define __ASM_PLAT_S3C24XX_MAP_H
15
16/* interrupt controller is the first thing we put in, to make
17 * the assembly code for the irq detection easier
18 */
19#define S3C24XX_VA_IRQ S3C_VA_IRQ
20#define S3C2410_PA_IRQ (0x4A000000)
21#define S3C24XX_SZ_IRQ SZ_1M
22
23/* memory controller registers */
24#define S3C24XX_VA_MEMCTRL S3C_VA_MEM
25#define S3C2410_PA_MEMCTRL (0x48000000)
26#define S3C24XX_SZ_MEMCTRL SZ_1M
27
28/* UARTs */
29#define S3C24XX_VA_UART S3C_VA_UART
30#define S3C2410_PA_UART (0x50000000)
31#define S3C24XX_SZ_UART SZ_1M
32#define S3C_UART_OFFSET (0x4000)
33
34#define S3C_VA_UARTx(uart) (S3C_VA_UART + ((uart * S3C_UART_OFFSET)))
35
36/* Timers */
37#define S3C24XX_VA_TIMER S3C_VA_TIMER
38#define S3C2410_PA_TIMER (0x51000000)
39#define S3C24XX_SZ_TIMER SZ_1M
40
41/* Clock and Power management */
42#define S3C24XX_VA_CLKPWR S3C_VA_SYS
43#define S3C24XX_SZ_CLKPWR SZ_1M
44
45/* USB Device port */
46#define S3C2410_PA_USBDEV (0x52000000)
47#define S3C24XX_SZ_USBDEV SZ_1M
48
49/* Watchdog */
50#define S3C24XX_VA_WATCHDOG S3C_VA_WATCHDOG
51#define S3C2410_PA_WATCHDOG (0x53000000)
52#define S3C24XX_SZ_WATCHDOG SZ_1M
53
54/* Standard size definitions for peripheral blocks. */
55
56#define S3C24XX_SZ_IIS SZ_1M
57#define S3C24XX_SZ_ADC SZ_1M
58#define S3C24XX_SZ_SPI SZ_1M
59#define S3C24XX_SZ_SDI SZ_1M
60#define S3C24XX_SZ_NAND SZ_1M
61
62/* GPIO ports */
63
64/* the calculation for the VA of this must ensure that
65 * it is the same distance apart from the UART in the
66 * phsyical address space, as the initial mapping for the IO
67 * is done as a 1:1 mapping. This puts it (currently) at
68 * 0xFA800000, which is not in the way of any current mapping
69 * by the base system.
70*/
71
72#define S3C2410_PA_GPIO (0x56000000)
73#define S3C24XX_VA_GPIO ((S3C24XX_PA_GPIO - S3C24XX_PA_UART) + S3C24XX_VA_UART)
74#define S3C24XX_SZ_GPIO SZ_1M
75
76
77/* ISA style IO, for each machine to sort out mappings for, if it
78 * implements it. We reserve two 16M regions for ISA.
79 */
80
81#define S3C24XX_VA_ISA_WORD S3C2410_ADDR(0x02000000)
82#define S3C24XX_VA_ISA_BYTE S3C2410_ADDR(0x03000000)
83
84/* deal with the registers that move under the 2412/2413 */
85
86#if defined(CONFIG_CPU_S3C2412) || defined(CONFIG_CPU_S3C2413)
87#ifndef __ASSEMBLY__
88extern void __iomem *s3c24xx_va_gpio2;
89#endif
90#ifdef CONFIG_CPU_S3C2412_ONLY
91#define S3C24XX_VA_GPIO2 (S3C24XX_VA_GPIO + 0x10)
92#else
93#define S3C24XX_VA_GPIO2 s3c24xx_va_gpio2
94#endif
95#else
96#define s3c24xx_va_gpio2 S3C24XX_VA_GPIO
97#define S3C24XX_VA_GPIO2 S3C24XX_VA_GPIO
98#endif
99
100#endif /* __ASM_PLAT_S3C24XX_MAP_H */
diff --git a/arch/arm/plat-s5p/include/plat/pll.h b/arch/arm/plat-s5p/include/plat/pll.h
index bf28fadee7ae..ebc142c5c84c 100644
--- a/arch/arm/plat-s5p/include/plat/pll.h
+++ b/arch/arm/plat-s5p/include/plat/pll.h
@@ -72,7 +72,6 @@ static inline unsigned long s5p_get_pll46xx(unsigned long baseclk,
72 mdiv = (pll_con0 >> PLL46XX_MDIV_SHIFT) & PLL46XX_MDIV_MASK; 72 mdiv = (pll_con0 >> PLL46XX_MDIV_SHIFT) & PLL46XX_MDIV_MASK;
73 pdiv = (pll_con0 >> PLL46XX_PDIV_SHIFT) & PLL46XX_PDIV_MASK; 73 pdiv = (pll_con0 >> PLL46XX_PDIV_SHIFT) & PLL46XX_PDIV_MASK;
74 sdiv = (pll_con0 >> PLL46XX_SDIV_SHIFT) & PLL46XX_SDIV_MASK; 74 sdiv = (pll_con0 >> PLL46XX_SDIV_SHIFT) & PLL46XX_SDIV_MASK;
75 kdiv = pll_con1 & PLL46XX_KDIV_MASK;
76 75
77 if (pll_type == pll_4650c) 76 if (pll_type == pll_4650c)
78 kdiv = pll_con1 & PLL4650C_KDIV_MASK; 77 kdiv = pll_con1 & PLL4650C_KDIV_MASK;
diff --git a/arch/arm/plat-samsung/dev-hsmmc.c b/arch/arm/plat-samsung/dev-hsmmc.c
index db7a65c7f127..06825c4276de 100644
--- a/arch/arm/plat-samsung/dev-hsmmc.c
+++ b/arch/arm/plat-samsung/dev-hsmmc.c
@@ -58,22 +58,5 @@ struct platform_device s3c_device_hsmmc0 = {
58 58
59void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd) 59void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
60{ 60{
61 struct s3c_sdhci_platdata *set = &s3c_hsmmc0_def_platdata; 61 s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
62
63 set->cd_type = pd->cd_type;
64 set->ext_cd_init = pd->ext_cd_init;
65 set->ext_cd_cleanup = pd->ext_cd_cleanup;
66 set->ext_cd_gpio = pd->ext_cd_gpio;
67 set->ext_cd_gpio_invert = pd->ext_cd_gpio_invert;
68
69 if (pd->max_width)
70 set->max_width = pd->max_width;
71 if (pd->cfg_gpio)
72 set->cfg_gpio = pd->cfg_gpio;
73 if (pd->cfg_card)
74 set->cfg_card = pd->cfg_card;
75 if (pd->host_caps)
76 set->host_caps |= pd->host_caps;
77 if (pd->clk_type)
78 set->clk_type = pd->clk_type;
79} 62}
diff --git a/arch/arm/plat-samsung/dev-hsmmc1.c b/arch/arm/plat-samsung/dev-hsmmc1.c
index 2497321f08d7..4524ef440010 100644
--- a/arch/arm/plat-samsung/dev-hsmmc1.c
+++ b/arch/arm/plat-samsung/dev-hsmmc1.c
@@ -58,22 +58,5 @@ struct platform_device s3c_device_hsmmc1 = {
58 58
59void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd) 59void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
60{ 60{
61 struct s3c_sdhci_platdata *set = &s3c_hsmmc1_def_platdata; 61 s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
62
63 set->cd_type = pd->cd_type;
64 set->ext_cd_init = pd->ext_cd_init;
65 set->ext_cd_cleanup = pd->ext_cd_cleanup;
66 set->ext_cd_gpio = pd->ext_cd_gpio;
67 set->ext_cd_gpio_invert = pd->ext_cd_gpio_invert;
68
69 if (pd->max_width)
70 set->max_width = pd->max_width;
71 if (pd->cfg_gpio)
72 set->cfg_gpio = pd->cfg_gpio;
73 if (pd->cfg_card)
74 set->cfg_card = pd->cfg_card;
75 if (pd->host_caps)
76 set->host_caps |= pd->host_caps;
77 if (pd->clk_type)
78 set->clk_type = pd->clk_type;
79} 62}
diff --git a/arch/arm/plat-samsung/dev-hsmmc2.c b/arch/arm/plat-samsung/dev-hsmmc2.c
index f60aedba417c..9cede9615e48 100644
--- a/arch/arm/plat-samsung/dev-hsmmc2.c
+++ b/arch/arm/plat-samsung/dev-hsmmc2.c
@@ -59,22 +59,5 @@ struct platform_device s3c_device_hsmmc2 = {
59 59
60void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd) 60void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
61{ 61{
62 struct s3c_sdhci_platdata *set = &s3c_hsmmc2_def_platdata; 62 s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
63
64 set->cd_type = pd->cd_type;
65 set->ext_cd_init = pd->ext_cd_init;
66 set->ext_cd_cleanup = pd->ext_cd_cleanup;
67 set->ext_cd_gpio = pd->ext_cd_gpio;
68 set->ext_cd_gpio_invert = pd->ext_cd_gpio_invert;
69
70 if (pd->max_width)
71 set->max_width = pd->max_width;
72 if (pd->cfg_gpio)
73 set->cfg_gpio = pd->cfg_gpio;
74 if (pd->cfg_card)
75 set->cfg_card = pd->cfg_card;
76 if (pd->host_caps)
77 set->host_caps |= pd->host_caps;
78 if (pd->clk_type)
79 set->clk_type = pd->clk_type;
80} 63}
diff --git a/arch/arm/plat-samsung/dev-hsmmc3.c b/arch/arm/plat-samsung/dev-hsmmc3.c
index ede776f20e62..0358ef4a8f66 100644
--- a/arch/arm/plat-samsung/dev-hsmmc3.c
+++ b/arch/arm/plat-samsung/dev-hsmmc3.c
@@ -62,22 +62,5 @@ struct platform_device s3c_device_hsmmc3 = {
62 62
63void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd) 63void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
64{ 64{
65 struct s3c_sdhci_platdata *set = &s3c_hsmmc3_def_platdata; 65 s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
66
67 set->cd_type = pd->cd_type;
68 set->ext_cd_init = pd->ext_cd_init;
69 set->ext_cd_cleanup = pd->ext_cd_cleanup;
70 set->ext_cd_gpio = pd->ext_cd_gpio;
71 set->ext_cd_gpio_invert = pd->ext_cd_gpio_invert;
72
73 if (pd->max_width)
74 set->max_width = pd->max_width;
75 if (pd->cfg_gpio)
76 set->cfg_gpio = pd->cfg_gpio;
77 if (pd->cfg_card)
78 set->cfg_card = pd->cfg_card;
79 if (pd->host_caps)
80 set->host_caps |= pd->host_caps;
81 if (pd->clk_type)
82 set->clk_type = pd->clk_type;
83} 66}
diff --git a/arch/arm/plat-samsung/dev-ts.c b/arch/arm/plat-samsung/dev-ts.c
index 82543f0248ac..5f3d46a9bd88 100644
--- a/arch/arm/plat-samsung/dev-ts.c
+++ b/arch/arm/plat-samsung/dev-ts.c
@@ -43,8 +43,17 @@ struct platform_device s3c_device_ts = {
43 .resource = s3c_ts_resource, 43 .resource = s3c_ts_resource,
44}; 44};
45 45
46static struct s3c2410_ts_mach_info default_ts_data __initdata = {
47 .delay = 10000,
48 .presc = 49,
49 .oversampling_shift = 2,
50};
51
46void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd) 52void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
47{ 53{
54 if (!pd)
55 pd = &default_ts_data;
56
48 s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info), 57 s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
49 &s3c_device_ts); 58 &s3c_device_ts);
50} 59}
diff --git a/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h b/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h
index 336d5ac02035..ab9bce637cbd 100644
--- a/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h
+++ b/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h
@@ -18,11 +18,6 @@ extern struct s3c2410_dma_chan s3c2410_chans[S3C_DMA_CHANNELS];
18#define DMA_CH_VALID (1<<31) 18#define DMA_CH_VALID (1<<31)
19#define DMA_CH_NEVER (1<<30) 19#define DMA_CH_NEVER (1<<30)
20 20
21struct s3c24xx_dma_addr {
22 unsigned long from;
23 unsigned long to;
24};
25
26/* struct s3c24xx_dma_map 21/* struct s3c24xx_dma_map
27 * 22 *
28 * this holds the mapping information for the channel selected 23 * this holds the mapping information for the channel selected
@@ -31,7 +26,6 @@ struct s3c24xx_dma_addr {
31 26
32struct s3c24xx_dma_map { 27struct s3c24xx_dma_map {
33 const char *name; 28 const char *name;
34 struct s3c24xx_dma_addr hw_addr;
35 29
36 unsigned long channels[S3C_DMA_CHANNELS]; 30 unsigned long channels[S3C_DMA_CHANNELS];
37 unsigned long channels_rx[S3C_DMA_CHANNELS]; 31 unsigned long channels_rx[S3C_DMA_CHANNELS];
diff --git a/arch/arm/plat-samsung/include/plat/map-s3c.h b/arch/arm/plat-samsung/include/plat/map-s3c.h
new file mode 100644
index 000000000000..7d048759b772
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/map-s3c.h
@@ -0,0 +1,84 @@
1/* linux/arch/arm/plat-samsung/include/plat/map-s3c.h
2 *
3 * Copyright (c) 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C24XX - Memory map definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_PLAT_MAP_S3C_H
14#define __ASM_PLAT_MAP_S3C_H __FILE__
15
16#define S3C24XX_VA_IRQ S3C_VA_IRQ
17#define S3C24XX_VA_MEMCTRL S3C_VA_MEM
18#define S3C24XX_VA_UART S3C_VA_UART
19
20#define S3C24XX_VA_TIMER S3C_VA_TIMER
21#define S3C24XX_VA_CLKPWR S3C_VA_SYS
22#define S3C24XX_VA_WATCHDOG S3C_VA_WATCHDOG
23
24#define S3C2412_VA_SSMC S3C_ADDR_CPU(0x00000000)
25#define S3C2412_VA_EBI S3C_ADDR_CPU(0x00010000)
26
27#define S3C2410_PA_UART (0x50000000)
28#define S3C24XX_PA_UART S3C2410_PA_UART
29
30#ifndef S3C_UART_OFFSET
31#define S3C_UART_OFFSET (0x400)
32#endif
33
34/*
35 * GPIO ports
36 *
37 * the calculation for the VA of this must ensure that
38 * it is the same distance apart from the UART in the
39 * phsyical address space, as the initial mapping for the IO
40 * is done as a 1:1 mapping. This puts it (currently) at
41 * 0xFA800000, which is not in the way of any current mapping
42 * by the base system.
43*/
44
45#define S3C2410_PA_GPIO (0x56000000)
46#define S3C24XX_PA_GPIO S3C2410_PA_GPIO
47
48#define S3C24XX_VA_GPIO ((S3C24XX_PA_GPIO - S3C24XX_PA_UART) + S3C24XX_VA_UART)
49#define S3C64XX_VA_GPIO S3C_ADDR_CPU(0x00000000)
50
51#define S3C64XX_VA_MODEM S3C_ADDR_CPU(0x00100000)
52#define S3C64XX_VA_USB_HSPHY S3C_ADDR_CPU(0x00200000)
53
54#define S3C_VA_USB_HSPHY S3C64XX_VA_USB_HSPHY
55
56/*
57 * ISA style IO, for each machine to sort out mappings for,
58 * if it implements it. We reserve two 16M regions for ISA.
59 */
60
61#define S3C2410_ADDR(x) S3C_ADDR(x)
62
63#define S3C24XX_VA_ISA_WORD S3C2410_ADDR(0x02000000)
64#define S3C24XX_VA_ISA_BYTE S3C2410_ADDR(0x03000000)
65
66/* deal with the registers that move under the 2412/2413 */
67
68#if defined(CONFIG_CPU_S3C2412) || defined(CONFIG_CPU_S3C2413)
69#ifndef __ASSEMBLY__
70extern void __iomem *s3c24xx_va_gpio2;
71#endif
72#ifdef CONFIG_CPU_S3C2412_ONLY
73#define S3C24XX_VA_GPIO2 (S3C24XX_VA_GPIO + 0x10)
74#else
75#define S3C24XX_VA_GPIO2 s3c24xx_va_gpio2
76#endif
77#else
78#define s3c24xx_va_gpio2 S3C24XX_VA_GPIO
79#define S3C24XX_VA_GPIO2 S3C24XX_VA_GPIO
80#endif
81
82#include <plat/map-s5p.h>
83
84#endif /* __ASM_PLAT_MAP_S3C_H */
diff --git a/arch/arm/plat-s5p/include/plat/map-s5p.h b/arch/arm/plat-samsung/include/plat/map-s5p.h
index 36d3551173b2..c2d7bdae5891 100644
--- a/arch/arm/plat-s5p/include/plat/map-s5p.h
+++ b/arch/arm/plat-samsung/include/plat/map-s5p.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s5p/include/plat/map-s5p.h 1/* linux/arch/arm/plat-samsung/include/plat/map-s5p.h
2 * 2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd. 3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/ 4 * http://www.samsung.com/
@@ -40,8 +40,6 @@
40#define S5P_VA_GIC_CPU S3C_ADDR(0x02810000) 40#define S5P_VA_GIC_CPU S3C_ADDR(0x02810000)
41#define S5P_VA_GIC_DIST S3C_ADDR(0x02820000) 41#define S5P_VA_GIC_DIST S3C_ADDR(0x02820000)
42 42
43#define S3C_VA_USB_HSPHY S3C_ADDR(0x02900000)
44
45#define VA_VIC(x) (S3C_VA_IRQ + ((x) * 0x10000)) 43#define VA_VIC(x) (S3C_VA_IRQ + ((x) * 0x10000))
46#define VA_VIC0 VA_VIC(0) 44#define VA_VIC0 VA_VIC(0)
47#define VA_VIC1 VA_VIC(1) 45#define VA_VIC1 VA_VIC(1)
@@ -58,4 +56,6 @@
58#define S3C_UART_OFFSET (0x400) 56#define S3C_UART_OFFSET (0x400)
59#endif 57#endif
60 58
59#include <plat/map-s3c.h>
60
61#endif /* __ASM_PLAT_MAP_S5P_H */ 61#endif /* __ASM_PLAT_MAP_S5P_H */
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h
index 058e09654fe8..4a6552066c7e 100644
--- a/arch/arm/plat-samsung/include/plat/sdhci.h
+++ b/arch/arm/plat-samsung/include/plat/sdhci.h
@@ -86,6 +86,13 @@ struct s3c_sdhci_platdata {
86 struct mmc_card *card); 86 struct mmc_card *card);
87}; 87};
88 88
89/* s3c_sdhci_set_platdata() - common helper for setting SDHCI platform data
90 * @pd: The default platform data for this device.
91 * @set: Pointer to the platform data to fill in.
92 */
93extern void s3c_sdhci_set_platdata(struct s3c_sdhci_platdata *pd,
94 struct s3c_sdhci_platdata *set);
95
89/** 96/**
90 * s3c_sdhci0_set_platdata - Set platform data for S3C SDHCI device. 97 * s3c_sdhci0_set_platdata - Set platform data for S3C SDHCI device.
91 * @pd: Platform data to register to device. 98 * @pd: Platform data to register to device.
diff --git a/arch/arm/plat-samsung/platformdata.c b/arch/arm/plat-samsung/platformdata.c
index 7cf2e1e3b20f..6de1a3825927 100644
--- a/arch/arm/plat-samsung/platformdata.c
+++ b/arch/arm/plat-samsung/platformdata.c
@@ -14,6 +14,7 @@
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15 15
16#include <plat/devs.h> 16#include <plat/devs.h>
17#include <plat/sdhci.h>
17 18
18void __init *s3c_set_platdata(void *pd, size_t pdsize, 19void __init *s3c_set_platdata(void *pd, size_t pdsize,
19 struct platform_device *pdev) 20 struct platform_device *pdev)
@@ -35,3 +36,24 @@ void __init *s3c_set_platdata(void *pd, size_t pdsize,
35 pdev->dev.platform_data = npd; 36 pdev->dev.platform_data = npd;
36 return npd; 37 return npd;
37} 38}
39
40void s3c_sdhci_set_platdata(struct s3c_sdhci_platdata *pd,
41 struct s3c_sdhci_platdata *set)
42{
43 set->cd_type = pd->cd_type;
44 set->ext_cd_init = pd->ext_cd_init;
45 set->ext_cd_cleanup = pd->ext_cd_cleanup;
46 set->ext_cd_gpio = pd->ext_cd_gpio;
47 set->ext_cd_gpio_invert = pd->ext_cd_gpio_invert;
48
49 if (pd->max_width)
50 set->max_width = pd->max_width;
51 if (pd->cfg_gpio)
52 set->cfg_gpio = pd->cfg_gpio;
53 if (pd->cfg_card)
54 set->cfg_card = pd->cfg_card;
55 if (pd->host_caps)
56 set->host_caps |= pd->host_caps;
57 if (pd->clk_type)
58 set->clk_type = pd->clk_type;
59}
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-17 01:44:27 -0400