diff options
author | David Daney <david.daney@cavium.com> | 2013-08-19 15:10:34 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2013-08-20 13:17:40 -0400 |
commit | c26d421987d5595ef1758d42dbce02308d10e17e (patch) | |
tree | 02174d65c3f51628a845d24fc5485afbf2e179e2 | |
parent | e5d081f4686f9c6be8ab3d34dfcdb0afdbbdeefd (diff) |
MIPS: Handle OCTEON BBIT instructions in FPU emulator.
The branch emulation needs to handle the OCTEON BBIT instructions,
otherwise we get SIGILL instead of emulation.
Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5726/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r-- | arch/mips/math-emu/cp1emu.c | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c index e773659ccf9f..46048d24328c 100644 --- a/arch/mips/math-emu/cp1emu.c +++ b/arch/mips/math-emu/cp1emu.c | |||
@@ -803,6 +803,32 @@ static int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn, | |||
803 | dec_insn.next_pc_inc; | 803 | dec_insn.next_pc_inc; |
804 | return 1; | 804 | return 1; |
805 | break; | 805 | break; |
806 | #ifdef CONFIG_CPU_CAVIUM_OCTEON | ||
807 | case lwc2_op: /* This is bbit0 on Octeon */ | ||
808 | if ((regs->regs[insn.i_format.rs] & (1ull<<insn.i_format.rt)) == 0) | ||
809 | *contpc = regs->cp0_epc + 4 + (insn.i_format.simmediate << 2); | ||
810 | else | ||
811 | *contpc = regs->cp0_epc + 8; | ||
812 | return 1; | ||
813 | case ldc2_op: /* This is bbit032 on Octeon */ | ||
814 | if ((regs->regs[insn.i_format.rs] & (1ull<<(insn.i_format.rt + 32))) == 0) | ||
815 | *contpc = regs->cp0_epc + 4 + (insn.i_format.simmediate << 2); | ||
816 | else | ||
817 | *contpc = regs->cp0_epc + 8; | ||
818 | return 1; | ||
819 | case swc2_op: /* This is bbit1 on Octeon */ | ||
820 | if (regs->regs[insn.i_format.rs] & (1ull<<insn.i_format.rt)) | ||
821 | *contpc = regs->cp0_epc + 4 + (insn.i_format.simmediate << 2); | ||
822 | else | ||
823 | *contpc = regs->cp0_epc + 8; | ||
824 | return 1; | ||
825 | case sdc2_op: /* This is bbit132 on Octeon */ | ||
826 | if (regs->regs[insn.i_format.rs] & (1ull<<(insn.i_format.rt + 32))) | ||
827 | *contpc = regs->cp0_epc + 4 + (insn.i_format.simmediate << 2); | ||
828 | else | ||
829 | *contpc = regs->cp0_epc + 8; | ||
830 | return 1; | ||
831 | #endif | ||
806 | case cop0_op: | 832 | case cop0_op: |
807 | case cop1_op: | 833 | case cop1_op: |
808 | case cop2_op: | 834 | case cop2_op: |