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authorMichael Chan <mchan@broadcom.com>2010-10-11 19:12:28 -0400
committerDavid S. Miller <davem@davemloft.net>2010-10-11 19:12:28 -0400
commitc239f279e571a272c1b32a1e84b8fa037b68f49c (patch)
tree9c70c7739c3bb25725f65035548aa84ee8584dc2
parent22fa159d37efbfe781bbb99279efe83f58b87d29 (diff)
bnx2: Enable AER on PCIE devices only
To prevent unnecessary error message. pci_save_state() is also moved to the end of ->probe() so that all PCI config, including AER state, will be saved. Update version to 2.0.18. Signed-off-by: Michael Chan <mchan@broadcom.com> Reviewed-by: Benjamin Li <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/bnx2.c36
1 files changed, 22 insertions, 14 deletions
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
index 56f3dfe70038..ae894bca4afb 100644
--- a/drivers/net/bnx2.c
+++ b/drivers/net/bnx2.c
@@ -59,8 +59,8 @@
59#include "bnx2_fw.h" 59#include "bnx2_fw.h"
60 60
61#define DRV_MODULE_NAME "bnx2" 61#define DRV_MODULE_NAME "bnx2"
62#define DRV_MODULE_VERSION "2.0.17" 62#define DRV_MODULE_VERSION "2.0.18"
63#define DRV_MODULE_RELDATE "July 18, 2010" 63#define DRV_MODULE_RELDATE "Oct 7, 2010"
64#define FW_MIPS_FILE_06 "bnx2/bnx2-mips-06-6.0.15.fw" 64#define FW_MIPS_FILE_06 "bnx2/bnx2-mips-06-6.0.15.fw"
65#define FW_RV2P_FILE_06 "bnx2/bnx2-rv2p-06-6.0.15.fw" 65#define FW_RV2P_FILE_06 "bnx2/bnx2-rv2p-06-6.0.15.fw"
66#define FW_MIPS_FILE_09 "bnx2/bnx2-mips-09-6.0.17.fw" 66#define FW_MIPS_FILE_09 "bnx2/bnx2-mips-09-6.0.17.fw"
@@ -7915,16 +7915,7 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
7915 goto err_out_disable; 7915 goto err_out_disable;
7916 } 7916 }
7917 7917
7918 /* AER (Advanced Error Reporting) hooks */
7919 err = pci_enable_pcie_error_reporting(pdev);
7920 if (err) {
7921 dev_err(&pdev->dev, "pci_enable_pcie_error_reporting failed "
7922 "0x%x\n", err);
7923 /* non-fatal, continue */
7924 }
7925
7926 pci_set_master(pdev); 7918 pci_set_master(pdev);
7927 pci_save_state(pdev);
7928 7919
7929 bp->pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM); 7920 bp->pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
7930 if (bp->pm_cap == 0) { 7921 if (bp->pm_cap == 0) {
@@ -7979,6 +7970,15 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
7979 bp->flags |= BNX2_FLAG_PCIE; 7970 bp->flags |= BNX2_FLAG_PCIE;
7980 if (CHIP_REV(bp) == CHIP_REV_Ax) 7971 if (CHIP_REV(bp) == CHIP_REV_Ax)
7981 bp->flags |= BNX2_FLAG_JUMBO_BROKEN; 7972 bp->flags |= BNX2_FLAG_JUMBO_BROKEN;
7973
7974 /* AER (Advanced Error Reporting) hooks */
7975 err = pci_enable_pcie_error_reporting(pdev);
7976 if (err) {
7977 dev_err(&pdev->dev, "pci_enable_pcie_error_reporting "
7978 "failed 0x%x\n", err);
7979 /* non-fatal, continue */
7980 }
7981
7982 } else { 7982 } else {
7983 bp->pcix_cap = pci_find_capability(pdev, PCI_CAP_ID_PCIX); 7983 bp->pcix_cap = pci_find_capability(pdev, PCI_CAP_ID_PCIX);
7984 if (bp->pcix_cap == 0) { 7984 if (bp->pcix_cap == 0) {
@@ -8235,16 +8235,20 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
8235 bp->timer.data = (unsigned long) bp; 8235 bp->timer.data = (unsigned long) bp;
8236 bp->timer.function = bnx2_timer; 8236 bp->timer.function = bnx2_timer;
8237 8237
8238 pci_save_state(pdev);
8239
8238 return 0; 8240 return 0;
8239 8241
8240err_out_unmap: 8242err_out_unmap:
8243 if (bp->flags & BNX2_FLAG_PCIE)
8244 pci_disable_pcie_error_reporting(pdev);
8245
8241 if (bp->regview) { 8246 if (bp->regview) {
8242 iounmap(bp->regview); 8247 iounmap(bp->regview);
8243 bp->regview = NULL; 8248 bp->regview = NULL;
8244 } 8249 }
8245 8250
8246err_out_release: 8251err_out_release:
8247 pci_disable_pcie_error_reporting(pdev);
8248 pci_release_regions(pdev); 8252 pci_release_regions(pdev);
8249 8253
8250err_out_disable: 8254err_out_disable:
@@ -8434,9 +8438,10 @@ bnx2_remove_one(struct pci_dev *pdev)
8434 8438
8435 kfree(bp->temp_stats_blk); 8439 kfree(bp->temp_stats_blk);
8436 8440
8437 free_netdev(dev); 8441 if (bp->flags & BNX2_FLAG_PCIE)
8442 pci_disable_pcie_error_reporting(pdev);
8438 8443
8439 pci_disable_pcie_error_reporting(pdev); 8444 free_netdev(dev);
8440 8445
8441 pci_release_regions(pdev); 8446 pci_release_regions(pdev);
8442 pci_disable_device(pdev); 8447 pci_disable_device(pdev);
@@ -8550,6 +8555,9 @@ static pci_ers_result_t bnx2_io_slot_reset(struct pci_dev *pdev)
8550 } 8555 }
8551 rtnl_unlock(); 8556 rtnl_unlock();
8552 8557
8558 if (!(bp->flags & BNX2_FLAG_PCIE))
8559 return result;
8560
8553 err = pci_cleanup_aer_uncorrect_error_status(pdev); 8561 err = pci_cleanup_aer_uncorrect_error_status(pdev);
8554 if (err) { 8562 if (err) {
8555 dev_err(&pdev->dev, 8563 dev_err(&pdev->dev,