diff options
author | Jani Nikula <jani.nikula@intel.com> | 2014-07-03 22:00:37 -0400 |
---|---|---|
committer | Takashi Iwai <tiwai@suse.de> | 2014-07-04 01:46:09 -0400 |
commit | c149dcb5c60bfea8871f16dfcc0690255eeb825f (patch) | |
tree | f117d9197504d5b02fa0d66d685c556ed30b5489 | |
parent | a12137e779e17413f87026202a890f8143858259 (diff) |
drm/i915: provide interface for audio driver to query cdclk
For Haswell and Broadwell, if the display power well has been disabled,
the display audio controller divider values EM4 M VALUE and EM5 N VALUE
will have been lost. The CDCLK frequency is required for reprogramming them
to generate 24MHz HD-A link BCLK. So provide a private interface for the
audio driver to query CDCLK.
This is a stopgap solution until a more generic interface between audio
and display drivers has been implemented.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
-rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 21 | ||||
-rw-r--r-- | include/drm/i915_powerwell.h | 1 |
2 files changed, 22 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 6463f0201cf2..409d62676854 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c | |||
@@ -6053,6 +6053,27 @@ int i915_release_power_well(void) | |||
6053 | } | 6053 | } |
6054 | EXPORT_SYMBOL_GPL(i915_release_power_well); | 6054 | EXPORT_SYMBOL_GPL(i915_release_power_well); |
6055 | 6055 | ||
6056 | /* | ||
6057 | * Private interface for the audio driver to get CDCLK in kHz. | ||
6058 | * | ||
6059 | * Caller must request power well using i915_request_power_well() prior to | ||
6060 | * making the call. | ||
6061 | */ | ||
6062 | int i915_get_cdclk_freq(void) | ||
6063 | { | ||
6064 | struct drm_i915_private *dev_priv; | ||
6065 | |||
6066 | if (!hsw_pwr) | ||
6067 | return -ENODEV; | ||
6068 | |||
6069 | dev_priv = container_of(hsw_pwr, struct drm_i915_private, | ||
6070 | power_domains); | ||
6071 | |||
6072 | return intel_ddi_get_cdclk_freq(dev_priv); | ||
6073 | } | ||
6074 | EXPORT_SYMBOL_GPL(i915_get_cdclk_freq); | ||
6075 | |||
6076 | |||
6056 | #define POWER_DOMAIN_MASK (BIT(POWER_DOMAIN_NUM) - 1) | 6077 | #define POWER_DOMAIN_MASK (BIT(POWER_DOMAIN_NUM) - 1) |
6057 | 6078 | ||
6058 | #define HSW_ALWAYS_ON_POWER_DOMAINS ( \ | 6079 | #define HSW_ALWAYS_ON_POWER_DOMAINS ( \ |
diff --git a/include/drm/i915_powerwell.h b/include/drm/i915_powerwell.h index 2baba9996094..baa6f11b1837 100644 --- a/include/drm/i915_powerwell.h +++ b/include/drm/i915_powerwell.h | |||
@@ -32,5 +32,6 @@ | |||
32 | /* For use by hda_i915 driver */ | 32 | /* For use by hda_i915 driver */ |
33 | extern int i915_request_power_well(void); | 33 | extern int i915_request_power_well(void); |
34 | extern int i915_release_power_well(void); | 34 | extern int i915_release_power_well(void); |
35 | extern int i915_get_cdclk_freq(void); | ||
35 | 36 | ||
36 | #endif /* _I915_POWERWELL_H_ */ | 37 | #endif /* _I915_POWERWELL_H_ */ |