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authorChing Huang <ching2048@areca.com.tw>2014-08-19 03:20:31 -0400
committerChristoph Hellwig <hch@lst.de>2014-09-16 12:40:03 -0400
commitc10b1d544aaaf98ab1792845c106471ee1ee0c05 (patch)
tree7d2ee1a7ea6b61ab1103c2fa92c4c2dff32d50a7
parentbb263c4ecbb186fe394c6c9acc32d8c59b6a7bdd (diff)
arcmsr: fix sparse warnings and errors
Fix sparse utility checking errors and warnings. Signed-off-by: Ching Huang <ching2048@areca.com.tw> Reviewed-by: Tomas Henzl <thenzl@redhat.com> Signed-off-by: Christoph Hellwig <hch@lst.de>
-rw-r--r--drivers/scsi/arcmsr/arcmsr_hba.c78
1 files changed, 40 insertions, 38 deletions
diff --git a/drivers/scsi/arcmsr/arcmsr_hba.c b/drivers/scsi/arcmsr/arcmsr_hba.c
index 1576805efc7d..34a43edcf078 100644
--- a/drivers/scsi/arcmsr/arcmsr_hba.c
+++ b/drivers/scsi/arcmsr/arcmsr_hba.c
@@ -78,7 +78,7 @@ MODULE_VERSION(ARCMSR_DRIVER_VERSION);
78#define ARCMSR_SLEEPTIME 10 78#define ARCMSR_SLEEPTIME 10
79#define ARCMSR_RETRYCOUNT 12 79#define ARCMSR_RETRYCOUNT 12
80 80
81wait_queue_head_t wait_q; 81static wait_queue_head_t wait_q;
82static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, 82static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
83 struct scsi_cmnd *cmd); 83 struct scsi_cmnd *cmd);
84static int arcmsr_iop_confirm(struct AdapterControlBlock *acb); 84static int arcmsr_iop_confirm(struct AdapterControlBlock *acb);
@@ -353,7 +353,7 @@ static uint8_t arcmsr_hbaB_wait_msgint_ready(struct AdapterControlBlock *acb)
353 353
354static uint8_t arcmsr_hbaC_wait_msgint_ready(struct AdapterControlBlock *pACB) 354static uint8_t arcmsr_hbaC_wait_msgint_ready(struct AdapterControlBlock *pACB)
355{ 355{
356 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC; 356 struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
357 int i; 357 int i;
358 358
359 for (i = 0; i < 2000; i++) { 359 for (i = 0; i < 2000; i++) {
@@ -403,7 +403,7 @@ static void arcmsr_hbaB_flush_cache(struct AdapterControlBlock *acb)
403 403
404static void arcmsr_hbaC_flush_cache(struct AdapterControlBlock *pACB) 404static void arcmsr_hbaC_flush_cache(struct AdapterControlBlock *pACB)
405{ 405{
406 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC; 406 struct MessageUnit_C __iomem *reg = pACB->pmuC;
407 int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */ 407 int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */
408 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0); 408 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
409 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell); 409 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
@@ -827,7 +827,7 @@ static uint8_t arcmsr_hbaB_abort_allcmd(struct AdapterControlBlock *acb)
827} 827}
828static uint8_t arcmsr_hbaC_abort_allcmd(struct AdapterControlBlock *pACB) 828static uint8_t arcmsr_hbaC_abort_allcmd(struct AdapterControlBlock *pACB)
829{ 829{
830 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC; 830 struct MessageUnit_C __iomem *reg = pACB->pmuC;
831 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0); 831 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
832 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell); 832 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
833 if (!arcmsr_hbaC_wait_msgint_ready(pACB)) { 833 if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
@@ -915,7 +915,7 @@ static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb)
915 } 915 }
916 break; 916 break;
917 case ACB_ADAPTER_TYPE_C:{ 917 case ACB_ADAPTER_TYPE_C:{
918 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; 918 struct MessageUnit_C __iomem *reg = acb->pmuC;
919 /* disable all outbound interrupt */ 919 /* disable all outbound interrupt */
920 orig_mask = readl(&reg->host_int_mask); /* disable outbound message0 int */ 920 orig_mask = readl(&reg->host_int_mask); /* disable outbound message0 int */
921 writel(orig_mask|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask); 921 writel(orig_mask|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
@@ -1039,8 +1039,9 @@ static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb)
1039 /*clear all outbound posted Q*/ 1039 /*clear all outbound posted Q*/
1040 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); /* clear doorbell interrupt */ 1040 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); /* clear doorbell interrupt */
1041 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) { 1041 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) {
1042 if ((flag_ccb = readl(&reg->done_qbuffer[i])) != 0) { 1042 flag_ccb = reg->done_qbuffer[i];
1043 writel(0, &reg->done_qbuffer[i]); 1043 if (flag_ccb != 0) {
1044 reg->done_qbuffer[i] = 0;
1044 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/ 1045 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/
1045 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 1046 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1046 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 1047 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
@@ -1053,7 +1054,7 @@ static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb)
1053 } 1054 }
1054 break; 1055 break;
1055 case ACB_ADAPTER_TYPE_C: { 1056 case ACB_ADAPTER_TYPE_C: {
1056 struct MessageUnit_C *reg = acb->pmuC; 1057 struct MessageUnit_C __iomem *reg = acb->pmuC;
1057 struct ARCMSR_CDB *pARCMSR_CDB; 1058 struct ARCMSR_CDB *pARCMSR_CDB;
1058 uint32_t flag_ccb, ccb_cdb_phy; 1059 uint32_t flag_ccb, ccb_cdb_phy;
1059 bool error; 1060 bool error;
@@ -1171,7 +1172,7 @@ static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
1171 } 1172 }
1172 break; 1173 break;
1173 case ACB_ADAPTER_TYPE_C: { 1174 case ACB_ADAPTER_TYPE_C: {
1174 struct MessageUnit_C *reg = acb->pmuC; 1175 struct MessageUnit_C __iomem *reg = acb->pmuC;
1175 mask = ~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK|ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK); 1176 mask = ~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK|ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK);
1176 writel(intmask_org & mask, &reg->host_int_mask); 1177 writel(intmask_org & mask, &reg->host_int_mask);
1177 acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f; 1178 acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f;
@@ -1257,12 +1258,12 @@ static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandContr
1257 uint32_t ending_index, index = reg->postq_index; 1258 uint32_t ending_index, index = reg->postq_index;
1258 1259
1259 ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE); 1260 ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE);
1260 writel(0, &reg->post_qbuffer[ending_index]); 1261 reg->post_qbuffer[ending_index] = 0;
1261 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) { 1262 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) {
1262 writel(cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE, 1263 reg->post_qbuffer[index] =
1263 &reg->post_qbuffer[index]); 1264 cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE;
1264 } else { 1265 } else {
1265 writel(cdb_phyaddr, &reg->post_qbuffer[index]); 1266 reg->post_qbuffer[index] = cdb_phyaddr;
1266 } 1267 }
1267 index++; 1268 index++;
1268 index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */ 1269 index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */
@@ -1271,7 +1272,7 @@ static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandContr
1271 } 1272 }
1272 break; 1273 break;
1273 case ACB_ADAPTER_TYPE_C: { 1274 case ACB_ADAPTER_TYPE_C: {
1274 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)acb->pmuC; 1275 struct MessageUnit_C __iomem *phbcmu = acb->pmuC;
1275 uint32_t ccb_post_stamp, arc_cdb_size; 1276 uint32_t ccb_post_stamp, arc_cdb_size;
1276 1277
1277 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size; 1278 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size;
@@ -1313,7 +1314,7 @@ static void arcmsr_hbaB_stop_bgrb(struct AdapterControlBlock *acb)
1313 1314
1314static void arcmsr_hbaC_stop_bgrb(struct AdapterControlBlock *pACB) 1315static void arcmsr_hbaC_stop_bgrb(struct AdapterControlBlock *pACB)
1315{ 1316{
1316 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC; 1317 struct MessageUnit_C __iomem *reg = pACB->pmuC;
1317 pACB->acb_flags &= ~ACB_F_MSG_START_BGRB; 1318 pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1318 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0); 1319 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
1319 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell); 1320 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
@@ -1347,7 +1348,7 @@ static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb)
1347 dma_free_coherent(&acb->pdev->dev, acb->uncache_size, acb->dma_coherent, acb->dma_coherent_handle); 1348 dma_free_coherent(&acb->pdev->dev, acb->uncache_size, acb->dma_coherent, acb->dma_coherent_handle);
1348} 1349}
1349 1350
1350void arcmsr_iop_message_read(struct AdapterControlBlock *acb) 1351static void arcmsr_iop_message_read(struct AdapterControlBlock *acb)
1351{ 1352{
1352 switch (acb->adapter_type) { 1353 switch (acb->adapter_type) {
1353 case ACB_ADAPTER_TYPE_A: { 1354 case ACB_ADAPTER_TYPE_A: {
@@ -1419,7 +1420,7 @@ struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb)
1419 } 1420 }
1420 break; 1421 break;
1421 case ACB_ADAPTER_TYPE_C: { 1422 case ACB_ADAPTER_TYPE_C: {
1422 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)acb->pmuC; 1423 struct MessageUnit_C __iomem *phbcmu = acb->pmuC;
1423 qbuffer = (struct QBUFFER __iomem *)&phbcmu->message_rbuffer; 1424 qbuffer = (struct QBUFFER __iomem *)&phbcmu->message_rbuffer;
1424 } 1425 }
1425 } 1426 }
@@ -1443,7 +1444,7 @@ static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBloc
1443 } 1444 }
1444 break; 1445 break;
1445 case ACB_ADAPTER_TYPE_C: { 1446 case ACB_ADAPTER_TYPE_C: {
1446 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; 1447 struct MessageUnit_C __iomem *reg = acb->pmuC;
1447 pqbuffer = (struct QBUFFER __iomem *)&reg->message_wbuffer; 1448 pqbuffer = (struct QBUFFER __iomem *)&reg->message_wbuffer;
1448 } 1449 }
1449 1450
@@ -1640,7 +1641,7 @@ static void arcmsr_hbaA_doorbell_isr(struct AdapterControlBlock *acb)
1640static void arcmsr_hbaC_doorbell_isr(struct AdapterControlBlock *pACB) 1641static void arcmsr_hbaC_doorbell_isr(struct AdapterControlBlock *pACB)
1641{ 1642{
1642 uint32_t outbound_doorbell; 1643 uint32_t outbound_doorbell;
1643 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC; 1644 struct MessageUnit_C __iomem *reg = pACB->pmuC;
1644 /* 1645 /*
1645 ******************************************************************* 1646 *******************************************************************
1646 ** Maybe here we need to check wrqbuffer_lock is lock or not 1647 ** Maybe here we need to check wrqbuffer_lock is lock or not
@@ -1686,8 +1687,8 @@ static void arcmsr_hbaB_postqueue_isr(struct AdapterControlBlock *acb)
1686 struct CommandControlBlock *pCCB; 1687 struct CommandControlBlock *pCCB;
1687 bool error; 1688 bool error;
1688 index = reg->doneq_index; 1689 index = reg->doneq_index;
1689 while ((flag_ccb = readl(&reg->done_qbuffer[index])) != 0) { 1690 while ((flag_ccb = reg->done_qbuffer[index]) != 0) {
1690 writel(0, &reg->done_qbuffer[index]); 1691 reg->done_qbuffer[index] = 0;
1691 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/ 1692 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/
1692 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 1693 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1693 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 1694 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
@@ -1700,13 +1701,13 @@ static void arcmsr_hbaB_postqueue_isr(struct AdapterControlBlock *acb)
1700 1701
1701static void arcmsr_hbaC_postqueue_isr(struct AdapterControlBlock *acb) 1702static void arcmsr_hbaC_postqueue_isr(struct AdapterControlBlock *acb)
1702{ 1703{
1703 struct MessageUnit_C *phbcmu; 1704 struct MessageUnit_C __iomem *phbcmu;
1704 struct ARCMSR_CDB *arcmsr_cdb; 1705 struct ARCMSR_CDB *arcmsr_cdb;
1705 struct CommandControlBlock *ccb; 1706 struct CommandControlBlock *ccb;
1706 uint32_t flag_ccb, ccb_cdb_phy, throttling = 0; 1707 uint32_t flag_ccb, ccb_cdb_phy, throttling = 0;
1707 int error; 1708 int error;
1708 1709
1709 phbcmu = (struct MessageUnit_C *)acb->pmuC; 1710 phbcmu = acb->pmuC;
1710 /* areca cdb command done */ 1711 /* areca cdb command done */
1711 /* Use correct offset and size for syncing */ 1712 /* Use correct offset and size for syncing */
1712 1713
@@ -1739,7 +1740,7 @@ static void arcmsr_hbaC_postqueue_isr(struct AdapterControlBlock *acb)
1739*/ 1740*/
1740static void arcmsr_hbaA_message_isr(struct AdapterControlBlock *acb) 1741static void arcmsr_hbaA_message_isr(struct AdapterControlBlock *acb)
1741{ 1742{
1742 struct MessageUnit_A *reg = acb->pmuA; 1743 struct MessageUnit_A __iomem *reg = acb->pmuA;
1743 /*clear interrupt and message state*/ 1744 /*clear interrupt and message state*/
1744 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, &reg->outbound_intstatus); 1745 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, &reg->outbound_intstatus);
1745 schedule_work(&acb->arcmsr_do_message_isr_bh); 1746 schedule_work(&acb->arcmsr_do_message_isr_bh);
@@ -1763,7 +1764,7 @@ static void arcmsr_hbaB_message_isr(struct AdapterControlBlock *acb)
1763*/ 1764*/
1764static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *acb) 1765static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *acb)
1765{ 1766{
1766 struct MessageUnit_C *reg = acb->pmuC; 1767 struct MessageUnit_C __iomem *reg = acb->pmuC;
1767 /*clear interrupt and message state*/ 1768 /*clear interrupt and message state*/
1768 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &reg->outbound_doorbell_clear); 1769 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &reg->outbound_doorbell_clear);
1769 schedule_work(&acb->arcmsr_do_message_isr_bh); 1770 schedule_work(&acb->arcmsr_do_message_isr_bh);
@@ -1824,7 +1825,7 @@ static int arcmsr_hbaB_handle_isr(struct AdapterControlBlock *acb)
1824static int arcmsr_hbaC_handle_isr(struct AdapterControlBlock *pACB) 1825static int arcmsr_hbaC_handle_isr(struct AdapterControlBlock *pACB)
1825{ 1826{
1826 uint32_t host_interrupt_status; 1827 uint32_t host_interrupt_status;
1827 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC; 1828 struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
1828 /* 1829 /*
1829 ********************************************* 1830 *********************************************
1830 ** check outbound intstatus 1831 ** check outbound intstatus
@@ -2230,7 +2231,7 @@ static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock
2230 list_del_init(&ccb->list); 2231 list_del_init(&ccb->list);
2231 }else{ 2232 }else{
2232 spin_unlock_irqrestore(&acb->ccblist_lock, flags); 2233 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
2233 return 0; 2234 return NULL;
2234 } 2235 }
2235 spin_unlock_irqrestore(&acb->ccblist_lock, flags); 2236 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
2236 return ccb; 2237 return ccb;
@@ -2468,11 +2469,11 @@ static bool arcmsr_hbaB_get_config(struct AdapterControlBlock *acb)
2468static bool arcmsr_hbaC_get_config(struct AdapterControlBlock *pACB) 2469static bool arcmsr_hbaC_get_config(struct AdapterControlBlock *pACB)
2469{ 2470{
2470 uint32_t intmask_org, Index, firmware_state = 0; 2471 uint32_t intmask_org, Index, firmware_state = 0;
2471 struct MessageUnit_C *reg = pACB->pmuC; 2472 struct MessageUnit_C __iomem *reg = pACB->pmuC;
2472 char *acb_firm_model = pACB->firm_model; 2473 char *acb_firm_model = pACB->firm_model;
2473 char *acb_firm_version = pACB->firm_version; 2474 char *acb_firm_version = pACB->firm_version;
2474 char *iop_firm_model = (char *)(&reg->msgcode_rwbuffer[15]); /*firm_model,15,60-67*/ 2475 char __iomem *iop_firm_model = (char __iomem *)(&reg->msgcode_rwbuffer[15]); /*firm_model,15,60-67*/
2475 char *iop_firm_version = (char *)(&reg->msgcode_rwbuffer[17]); /*firm_version,17,68-83*/ 2476 char __iomem *iop_firm_version = (char __iomem *)(&reg->msgcode_rwbuffer[17]); /*firm_version,17,68-83*/
2476 int count; 2477 int count;
2477 /* disable all outbound interrupt */ 2478 /* disable all outbound interrupt */
2478 intmask_org = readl(&reg->host_int_mask); /* disable outbound message0 int */ 2479 intmask_org = readl(&reg->host_int_mask); /* disable outbound message0 int */
@@ -2620,7 +2621,8 @@ static int arcmsr_hbaB_polling_ccbdone(struct AdapterControlBlock *acb,
2620 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); 2621 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
2621 while(1){ 2622 while(1){
2622 index = reg->doneq_index; 2623 index = reg->doneq_index;
2623 if ((flag_ccb = readl(&reg->done_qbuffer[index])) == 0) { 2624 flag_ccb = reg->done_qbuffer[index];
2625 if (flag_ccb == 0) {
2624 if (poll_ccb_done){ 2626 if (poll_ccb_done){
2625 rtn = SUCCESS; 2627 rtn = SUCCESS;
2626 break; 2628 break;
@@ -2633,7 +2635,7 @@ static int arcmsr_hbaB_polling_ccbdone(struct AdapterControlBlock *acb,
2633 goto polling_hbb_ccb_retry; 2635 goto polling_hbb_ccb_retry;
2634 } 2636 }
2635 } 2637 }
2636 writel(0, &reg->done_qbuffer[index]); 2638 reg->done_qbuffer[index] = 0;
2637 index++; 2639 index++;
2638 /*if last index number set it to 0 */ 2640 /*if last index number set it to 0 */
2639 index %= ARCMSR_MAX_HBB_POSTQUEUE; 2641 index %= ARCMSR_MAX_HBB_POSTQUEUE;
@@ -2671,7 +2673,7 @@ static int arcmsr_hbaB_polling_ccbdone(struct AdapterControlBlock *acb,
2671static int arcmsr_hbaC_polling_ccbdone(struct AdapterControlBlock *acb, 2673static int arcmsr_hbaC_polling_ccbdone(struct AdapterControlBlock *acb,
2672 struct CommandControlBlock *poll_ccb) 2674 struct CommandControlBlock *poll_ccb)
2673{ 2675{
2674 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; 2676 struct MessageUnit_C __iomem *reg = acb->pmuC;
2675 uint32_t flag_ccb, ccb_cdb_phy; 2677 uint32_t flag_ccb, ccb_cdb_phy;
2676 struct ARCMSR_CDB *arcmsr_cdb; 2678 struct ARCMSR_CDB *arcmsr_cdb;
2677 bool error; 2679 bool error;
@@ -2834,7 +2836,7 @@ static int arcmsr_iop_confirm(struct AdapterControlBlock *acb)
2834 break; 2836 break;
2835 case ACB_ADAPTER_TYPE_C: { 2837 case ACB_ADAPTER_TYPE_C: {
2836 if (cdb_phyaddr_hi32 != 0) { 2838 if (cdb_phyaddr_hi32 != 0) {
2837 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; 2839 struct MessageUnit_C __iomem *reg = acb->pmuC;
2838 2840
2839 printk(KERN_NOTICE "arcmsr%d: cdb_phyaddr_hi32=0x%x\n", 2841 printk(KERN_NOTICE "arcmsr%d: cdb_phyaddr_hi32=0x%x\n",
2840 acb->adapter_index, cdb_phyaddr_hi32); 2842 acb->adapter_index, cdb_phyaddr_hi32);
@@ -2875,7 +2877,7 @@ static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb)
2875 } 2877 }
2876 break; 2878 break;
2877 case ACB_ADAPTER_TYPE_C: { 2879 case ACB_ADAPTER_TYPE_C: {
2878 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; 2880 struct MessageUnit_C __iomem *reg = acb->pmuC;
2879 do { 2881 do {
2880 firmware_state = readl(&reg->outbound_msgaddr1); 2882 firmware_state = readl(&reg->outbound_msgaddr1);
2881 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0); 2883 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0);
@@ -2907,7 +2909,7 @@ static void arcmsr_hbaA_request_device_map(struct AdapterControlBlock *acb)
2907 2909
2908static void arcmsr_hbaB_request_device_map(struct AdapterControlBlock *acb) 2910static void arcmsr_hbaB_request_device_map(struct AdapterControlBlock *acb)
2909{ 2911{
2910 struct MessageUnit_B __iomem *reg = acb->pmuB; 2912 struct MessageUnit_B *reg = acb->pmuB;
2911 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){ 2913 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){
2912 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 2914 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
2913 return; 2915 return;
@@ -2992,7 +2994,7 @@ static void arcmsr_hbaB_start_bgrb(struct AdapterControlBlock *acb)
2992 2994
2993static void arcmsr_hbaC_start_bgrb(struct AdapterControlBlock *pACB) 2995static void arcmsr_hbaC_start_bgrb(struct AdapterControlBlock *pACB)
2994{ 2996{
2995 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC; 2997 struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
2996 pACB->acb_flags |= ACB_F_MSG_START_BGRB; 2998 pACB->acb_flags |= ACB_F_MSG_START_BGRB;
2997 writel(ARCMSR_INBOUND_MESG0_START_BGRB, &phbcmu->inbound_msgaddr0); 2999 writel(ARCMSR_INBOUND_MESG0_START_BGRB, &phbcmu->inbound_msgaddr0);
2998 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &phbcmu->inbound_doorbell); 3000 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &phbcmu->inbound_doorbell);
@@ -3039,7 +3041,7 @@ static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb)
3039 } 3041 }
3040 break; 3042 break;
3041 case ACB_ADAPTER_TYPE_C: { 3043 case ACB_ADAPTER_TYPE_C: {
3042 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; 3044 struct MessageUnit_C __iomem *reg = acb->pmuC;
3043 uint32_t outbound_doorbell, i; 3045 uint32_t outbound_doorbell, i;
3044 /* empty doorbell Qbuffer if door bell ringed */ 3046 /* empty doorbell Qbuffer if door bell ringed */
3045 outbound_doorbell = readl(&reg->outbound_doorbell); 3047 outbound_doorbell = readl(&reg->outbound_doorbell);