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authorBen Gamari <ben@smart-cactus.org>2015-03-18 14:37:45 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2015-03-26 05:50:52 -0400
commitc0ab6bb0597363532f178f3cd7b7fb527eef39e2 (patch)
treec3fd5f2e41bde5ea39a833aaabaee4a569741e71
parent76cb03e7d5d7ba49175784dce961696da66c44cc (diff)
usb/misc/usb3503: Always read refclk frequency from DT
This is necessary to set REF_SEL appropriately in uses where refclk is always available. Signed-off-by: Ben Gamari <ben@smart-cactus.org> Acked-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--drivers/usb/misc/usb3503.c47
1 files changed, 24 insertions, 23 deletions
diff --git a/drivers/usb/misc/usb3503.c b/drivers/usb/misc/usb3503.c
index 258d2f546e43..64ff5b91752d 100644
--- a/drivers/usb/misc/usb3503.c
+++ b/drivers/usb/misc/usb3503.c
@@ -186,8 +186,31 @@ static int usb3503_probe(struct usb3503 *hub)
186 hub->mode = pdata->initial_mode; 186 hub->mode = pdata->initial_mode;
187 } else if (np) { 187 } else if (np) {
188 struct clk *clk; 188 struct clk *clk;
189 u32 rate = 0;
189 hub->port_off_mask = 0; 190 hub->port_off_mask = 0;
190 191
192 if (!of_property_read_u32(np, "refclk-frequency", &rate)) {
193 switch (rate) {
194 case 38400000:
195 case 26000000:
196 case 19200000:
197 case 12000000:
198 hub->secondary_ref_clk = 0;
199 break;
200 case 24000000:
201 case 27000000:
202 case 25000000:
203 case 50000000:
204 hub->secondary_ref_clk = 1;
205 break;
206 default:
207 dev_err(dev,
208 "unsupported reference clock rate (%d)\n",
209 (int) rate);
210 return -EINVAL;
211 }
212 }
213
191 clk = devm_clk_get(dev, "refclk"); 214 clk = devm_clk_get(dev, "refclk");
192 if (IS_ERR(clk) && PTR_ERR(clk) != -ENOENT) { 215 if (IS_ERR(clk) && PTR_ERR(clk) != -ENOENT) {
193 dev_err(dev, "unable to request refclk (%ld)\n", 216 dev_err(dev, "unable to request refclk (%ld)\n",
@@ -196,31 +219,9 @@ static int usb3503_probe(struct usb3503 *hub)
196 } 219 }
197 220
198 if (!IS_ERR(clk)) { 221 if (!IS_ERR(clk)) {
199 u32 rate = 0;
200 hub->clk = clk; 222 hub->clk = clk;
201 223
202 if (!of_property_read_u32(np, "refclk-frequency", 224 if (rate != 0) {
203 &rate)) {
204
205 switch (rate) {
206 case 38400000:
207 case 26000000:
208 case 19200000:
209 case 12000000:
210 hub->secondary_ref_clk = 0;
211 break;
212 case 24000000:
213 case 27000000:
214 case 25000000:
215 case 50000000:
216 hub->secondary_ref_clk = 1;
217 break;
218 default:
219 dev_err(dev,
220 "unsupported reference clock rate (%d)\n",
221 (int) rate);
222 return -EINVAL;
223 }
224 err = clk_set_rate(hub->clk, rate); 225 err = clk_set_rate(hub->clk, rate);
225 if (err) { 226 if (err) {
226 dev_err(dev, 227 dev_err(dev,