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authorChristian Hemp <c.hemp@phytec.de>2014-11-14 08:32:24 -0500
committerShawn Guo <shawn.guo@linaro.org>2014-11-23 02:08:14 -0500
commitc082fd422e66df8e2492e27219192a773ccb72e5 (patch)
treedfb519b89d15a86685339aa8d02c7e6bac46cfbd
parent0019d18213924a9cd10fda59e2c8b83ece54fd58 (diff)
ARM: dts: imx6: phyFLEX: Set correct interrupt for pmic
The PMIC interrupt was changed from modul revision 1 to 2. Revision 1 was declared as a prototype and is not in series by any customers. Signed-off-by: Christian Hemp <c.hemp@phytec.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-rw-r--r--arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
index af3065336969..8d718b55a07f 100644
--- a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
@@ -107,8 +107,8 @@
107 pmic@58 { 107 pmic@58 {
108 compatible = "dlg,da9063"; 108 compatible = "dlg,da9063";
109 reg = <0x58>; 109 reg = <0x58>;
110 interrupt-parent = <&gpio4>; 110 interrupt-parent = <&gpio2>;
111 interrupts = <17 0x8>; /* active-low GPIO4_17 */ 111 interrupts = <9 0x8>; /* active-low GPIO2_9 */
112 112
113 regulators { 113 regulators {
114 vddcore_reg: bcore1 { 114 vddcore_reg: bcore1 {
@@ -205,7 +205,7 @@
205 fsl,pins = < 205 fsl,pins = <
206 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000 206 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
207 MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000 /* SPI NOR chipselect */ 207 MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000 /* SPI NOR chipselect */
208 MX6QDL_PAD_DI0_PIN15__GPIO4_IO17 0x80000000 /* PMIC interrupt */ 208 MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x80000000 /* PMIC interrupt */
209 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* Green LED */ 209 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* Green LED */
210 MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x80000000 /* Red LED */ 210 MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x80000000 /* Red LED */
211 >; 211 >;