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authorMatthew Wilcox <willy@wil.cx>2009-01-21 19:19:19 -0500
committerJesse Barnes <jbarnes@virtuousgeek.org>2009-01-27 12:53:25 -0500
commitbffac3c593eba1f9da3efd0199e49ea6558a40ce (patch)
treef2f91533d36172cef57cca43c8050ec265b978d8
parent476e7faefc43f106a90b5c96166c59b75de19d30 (diff)
PCI MSI: Fix undefined shift by 32
Add an msi_mask() function which returns the correct bitmask for the number of MSI interrupts you have. This fixes an undefined bug in msi_capability_init(). Signed-off-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-rw-r--r--drivers/pci/msi.c13
1 files changed, 11 insertions, 2 deletions
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index 896a15d70f5b..44f15ff70c1d 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -103,6 +103,16 @@ static void msix_set_enable(struct pci_dev *dev, int enable)
103 } 103 }
104} 104}
105 105
106/*
107 * Essentially, this is ((1 << (1 << x)) - 1), but without the
108 * undefinedness of a << 32.
109 */
110static inline __attribute_const__ u32 msi_mask(unsigned x)
111{
112 static const u32 mask[] = { 1, 2, 4, 0xf, 0xff, 0xffff, 0xffffffff };
113 return mask[x];
114}
115
106static void msix_flush_writes(struct irq_desc *desc) 116static void msix_flush_writes(struct irq_desc *desc)
107{ 117{
108 struct msi_desc *entry; 118 struct msi_desc *entry;
@@ -407,8 +417,7 @@ static int msi_capability_init(struct pci_dev *dev)
407 417
408 /* All MSIs are unmasked by default, Mask them all */ 418 /* All MSIs are unmasked by default, Mask them all */
409 pci_read_config_dword(dev, base, &maskbits); 419 pci_read_config_dword(dev, base, &maskbits);
410 temp = (1 << multi_msi_capable(control)); 420 temp = msi_mask((control & PCI_MSI_FLAGS_QMASK) >> 1);
411 temp = ((temp - 1) & ~temp);
412 maskbits |= temp; 421 maskbits |= temp;
413 pci_write_config_dword(dev, base, maskbits); 422 pci_write_config_dword(dev, base, maskbits);
414 entry->msi_attrib.maskbits_mask = temp; 423 entry->msi_attrib.maskbits_mask = temp;