diff options
author | Thomas Schwinge <thomas@codesourcery.com> | 2012-03-09 11:38:52 -0500 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2012-03-28 01:28:30 -0400 |
commit | bfc906d885762cd5e9381c1815b18bd7753cedf5 (patch) | |
tree | fe60a567f5e2eb19b565f1c8256f7a96fd8acbba | |
parent | 49d4bcaddca977fffdea8b0b71f6e5da96dac78e (diff) |
SH: pci-sh7780: enable big-endian operation.
If in big-endian mode, switch the PCI bus, too.
Tested on both litte-endian and big-endian sh7785lcr.
Signed-off-by: Thomas Schwinge <thomas@codesourcery.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: linux-sh@vger.kernel.org
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r-- | arch/sh/drivers/pci/pci-sh7780.c | 15 |
1 files changed, 12 insertions, 3 deletions
diff --git a/arch/sh/drivers/pci/pci-sh7780.c b/arch/sh/drivers/pci/pci-sh7780.c index fb8f14990743..5a6dab6e27d9 100644 --- a/arch/sh/drivers/pci/pci-sh7780.c +++ b/arch/sh/drivers/pci/pci-sh7780.c | |||
@@ -21,6 +21,13 @@ | |||
21 | #include <asm/mmu.h> | 21 | #include <asm/mmu.h> |
22 | #include <asm/sizes.h> | 22 | #include <asm/sizes.h> |
23 | 23 | ||
24 | #if defined(CONFIG_CPU_BIG_ENDIAN) | ||
25 | # define PCICR_ENDIANNESS SH4_PCICR_BSWP | ||
26 | #else | ||
27 | # define PCICR_ENDIANNESS 0 | ||
28 | #endif | ||
29 | |||
30 | |||
24 | static struct resource sh7785_pci_resources[] = { | 31 | static struct resource sh7785_pci_resources[] = { |
25 | { | 32 | { |
26 | .name = "PCI IO", | 33 | .name = "PCI IO", |
@@ -254,7 +261,7 @@ static int __init sh7780_pci_init(void) | |||
254 | __raw_writel(PCIECR_ENBL, PCIECR); | 261 | __raw_writel(PCIECR_ENBL, PCIECR); |
255 | 262 | ||
256 | /* Reset */ | 263 | /* Reset */ |
257 | __raw_writel(SH4_PCICR_PREFIX | SH4_PCICR_PRST, | 264 | __raw_writel(SH4_PCICR_PREFIX | SH4_PCICR_PRST | PCICR_ENDIANNESS, |
258 | chan->reg_base + SH4_PCICR); | 265 | chan->reg_base + SH4_PCICR); |
259 | 266 | ||
260 | /* | 267 | /* |
@@ -290,7 +297,8 @@ static int __init sh7780_pci_init(void) | |||
290 | * Now throw it in to register initialization mode and | 297 | * Now throw it in to register initialization mode and |
291 | * start the real work. | 298 | * start the real work. |
292 | */ | 299 | */ |
293 | __raw_writel(SH4_PCICR_PREFIX, chan->reg_base + SH4_PCICR); | 300 | __raw_writel(SH4_PCICR_PREFIX | PCICR_ENDIANNESS, |
301 | chan->reg_base + SH4_PCICR); | ||
294 | 302 | ||
295 | memphys = __pa(memory_start); | 303 | memphys = __pa(memory_start); |
296 | memsize = roundup_pow_of_two(memory_end - memory_start); | 304 | memsize = roundup_pow_of_two(memory_end - memory_start); |
@@ -380,7 +388,8 @@ static int __init sh7780_pci_init(void) | |||
380 | * Initialization mode complete, release the control register and | 388 | * Initialization mode complete, release the control register and |
381 | * enable round robin mode to stop device overruns/starvation. | 389 | * enable round robin mode to stop device overruns/starvation. |
382 | */ | 390 | */ |
383 | __raw_writel(SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_FTO, | 391 | __raw_writel(SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_FTO | |
392 | PCICR_ENDIANNESS, | ||
384 | chan->reg_base + SH4_PCICR); | 393 | chan->reg_base + SH4_PCICR); |
385 | 394 | ||
386 | ret = register_pci_controller(chan); | 395 | ret = register_pci_controller(chan); |