aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2010-07-01 12:36:49 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2010-07-01 12:36:49 -0400
commitbf4f42b441919417386beb2f9c58e802e7de89df (patch)
tree39fce2e84056f6c2d7cb1966289bfb52cd6ffdab
parent1e31b0ffbb3b10133044e9c4bec4bd4b3f278229 (diff)
parent2f9c6b0a91a050669dd6df487174de6b96c2774a (diff)
Merge branch 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (27 commits) drm/radeon/kms: remove rv100 bios connector quirk drm/radeon/kms/pm: fix power state indexing on igp chips in dynpm mode DRM / radeon / KMS: Fix hibernation regression related to radeon PM (was: Re: [Regression, post-2.6.34] Hibernation broken on machines with radeon/KMS and r300) drm/radeon/kms/igp: fix possible divide by 0 in bandwidth code (v2) drm/radeon: add quirk to make HP nx6125 laptop resume. drm/radeon/kms: add some missing regs to evergreen gpu init drm/radeon/kms: fix typos in evergreen command checker drm/radeon/kms: avoid oops on mac r4xx cards fb: fix colliding defines for fb flags. drm/radeon/kms: Force HDP_NONSURF to maximum size drm/radeon/kms: disable frac fb dividers for rs6xx drm/radeon/kms: don't read attempt to read bios from VRAM on unposted GPU. drm/radeon/kms: fix typo in evergreen_gpu_init drm/radeon/kms: return ret in cursor_set failure path drm/ttm: non pooled page allocation should have GFP_USER set drm/radeon/r100/r200: fix calculation of compressed cube maps drm/radeon/r200: handle more hw tex coord types drm/radeon/kms: CS checker texture fixes for r1xx/r2xx/r3xx drm/radeon: add fake RN50 table for powerpc drm/fb: Fix video= mode computation ...
-rw-r--r--drivers/char/agp/generic.c6
-rw-r--r--drivers/gpu/drm/drm_fb_helper.c19
-rw-r--r--drivers/gpu/drm/radeon/atombios_crtc.c2
-rw-r--r--drivers/gpu/drm/radeon/evergreen.c35
-rw-r--r--drivers/gpu/drm/radeon/evergreen_cs.c4
-rw-r--r--drivers/gpu/drm/radeon/evergreend.h3
-rw-r--r--drivers/gpu/drm/radeon/r100.c81
-rw-r--r--drivers/gpu/drm/radeon/r200.c5
-rw-r--r--drivers/gpu/drm/radeon/r300.c5
-rw-r--r--drivers/gpu/drm/radeon/r600.c17
-rw-r--r--drivers/gpu/drm/radeon/radeon.h4
-rw-r--r--drivers/gpu/drm/radeon/radeon_asic.c7
-rw-r--r--drivers/gpu/drm/radeon/radeon_bios.c4
-rw-r--r--drivers/gpu/drm/radeon/radeon_combios.c49
-rw-r--r--drivers/gpu/drm/radeon/radeon_cursor.c2
-rw-r--r--drivers/gpu/drm/radeon/radeon_device.c7
-rw-r--r--drivers/gpu/drm/radeon/radeon_encoders.c4
-rw-r--r--drivers/gpu/drm/radeon/radeon_legacy_encoders.c22
-rw-r--r--drivers/gpu/drm/radeon/radeon_mode.h1
-rw-r--r--drivers/gpu/drm/radeon/radeon_pm.c41
-rw-r--r--drivers/gpu/drm/radeon/reg_srcs/evergreen10
-rw-r--r--drivers/gpu/drm/radeon/rs690.c41
-rw-r--r--drivers/gpu/drm/radeon/rv770.c2
-rw-r--r--drivers/gpu/drm/ttm/ttm_page_alloc.c2
-rw-r--r--include/linux/agp_backend.h1
-rw-r--r--include/linux/fb.h4
26 files changed, 257 insertions, 121 deletions
diff --git a/drivers/char/agp/generic.c b/drivers/char/agp/generic.c
index 4b51982fd23a..d2abf5143983 100644
--- a/drivers/char/agp/generic.c
+++ b/drivers/char/agp/generic.c
@@ -97,20 +97,18 @@ EXPORT_SYMBOL(agp_flush_chipset);
97void agp_alloc_page_array(size_t size, struct agp_memory *mem) 97void agp_alloc_page_array(size_t size, struct agp_memory *mem)
98{ 98{
99 mem->pages = NULL; 99 mem->pages = NULL;
100 mem->vmalloc_flag = false;
101 100
102 if (size <= 2*PAGE_SIZE) 101 if (size <= 2*PAGE_SIZE)
103 mem->pages = kmalloc(size, GFP_KERNEL | __GFP_NORETRY); 102 mem->pages = kmalloc(size, GFP_KERNEL | __GFP_NOWARN);
104 if (mem->pages == NULL) { 103 if (mem->pages == NULL) {
105 mem->pages = vmalloc(size); 104 mem->pages = vmalloc(size);
106 mem->vmalloc_flag = true;
107 } 105 }
108} 106}
109EXPORT_SYMBOL(agp_alloc_page_array); 107EXPORT_SYMBOL(agp_alloc_page_array);
110 108
111void agp_free_page_array(struct agp_memory *mem) 109void agp_free_page_array(struct agp_memory *mem)
112{ 110{
113 if (mem->vmalloc_flag) { 111 if (is_vmalloc_addr(mem->pages)) {
114 vfree(mem->pages); 112 vfree(mem->pages);
115 } else { 113 } else {
116 kfree(mem->pages); 114 kfree(mem->pages);
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index 08c4c926e65f..1f2cc6b09623 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -146,7 +146,7 @@ static bool drm_fb_helper_connector_parse_command_line(struct drm_fb_helper_conn
146 cvt = 1; 146 cvt = 1;
147 break; 147 break;
148 case 'R': 148 case 'R':
149 if (!cvt) 149 if (cvt)
150 rb = 1; 150 rb = 1;
151 break; 151 break;
152 case 'm': 152 case 'm':
@@ -1024,11 +1024,18 @@ static struct drm_display_mode *drm_pick_cmdline_mode(struct drm_fb_helper_conne
1024 } 1024 }
1025 1025
1026create_mode: 1026create_mode:
1027 mode = drm_cvt_mode(fb_helper_conn->connector->dev, cmdline_mode->xres, 1027 if (cmdline_mode->cvt)
1028 cmdline_mode->yres, 1028 mode = drm_cvt_mode(fb_helper_conn->connector->dev,
1029 cmdline_mode->refresh_specified ? cmdline_mode->refresh : 60, 1029 cmdline_mode->xres, cmdline_mode->yres,
1030 cmdline_mode->rb, cmdline_mode->interlace, 1030 cmdline_mode->refresh_specified ? cmdline_mode->refresh : 60,
1031 cmdline_mode->margins); 1031 cmdline_mode->rb, cmdline_mode->interlace,
1032 cmdline_mode->margins);
1033 else
1034 mode = drm_gtf_mode(fb_helper_conn->connector->dev,
1035 cmdline_mode->xres, cmdline_mode->yres,
1036 cmdline_mode->refresh_specified ? cmdline_mode->refresh : 60,
1037 cmdline_mode->interlace,
1038 cmdline_mode->margins);
1032 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); 1039 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
1033 list_add(&mode->head, &fb_helper_conn->connector->modes); 1040 list_add(&mode->head, &fb_helper_conn->connector->modes);
1034 return mode; 1041 return mode;
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index f3f2827017ef..8c2d6478a221 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -498,7 +498,7 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
498 if ((rdev->family == CHIP_RS600) || 498 if ((rdev->family == CHIP_RS600) ||
499 (rdev->family == CHIP_RS690) || 499 (rdev->family == CHIP_RS690) ||
500 (rdev->family == CHIP_RS740)) 500 (rdev->family == CHIP_RS740))
501 pll->flags |= (RADEON_PLL_USE_FRAC_FB_DIV | 501 pll->flags |= (/*RADEON_PLL_USE_FRAC_FB_DIV |*/
502 RADEON_PLL_PREFER_CLOSEST_LOWER); 502 RADEON_PLL_PREFER_CLOSEST_LOWER);
503 503
504 if (ASIC_IS_DCE32(rdev) && mode->clock > 200000) /* range limits??? */ 504 if (ASIC_IS_DCE32(rdev) && mode->clock > 200000) /* range limits??? */
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 4b6623df3b96..1caf625e472b 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -607,7 +607,7 @@ static void evergreen_mc_program(struct radeon_device *rdev)
607 WREG32(MC_VM_FB_LOCATION, tmp); 607 WREG32(MC_VM_FB_LOCATION, tmp);
608 WREG32(HDP_NONSURFACE_BASE, (rdev->mc.vram_start >> 8)); 608 WREG32(HDP_NONSURFACE_BASE, (rdev->mc.vram_start >> 8));
609 WREG32(HDP_NONSURFACE_INFO, (2 << 7)); 609 WREG32(HDP_NONSURFACE_INFO, (2 << 7));
610 WREG32(HDP_NONSURFACE_SIZE, (rdev->mc.mc_vram_size - 1) | 0x3FF); 610 WREG32(HDP_NONSURFACE_SIZE, 0x3FFFFFFF);
611 if (rdev->flags & RADEON_IS_AGP) { 611 if (rdev->flags & RADEON_IS_AGP) {
612 WREG32(MC_VM_AGP_TOP, rdev->mc.gtt_end >> 16); 612 WREG32(MC_VM_AGP_TOP, rdev->mc.gtt_end >> 16);
613 WREG32(MC_VM_AGP_BOT, rdev->mc.gtt_start >> 16); 613 WREG32(MC_VM_AGP_BOT, rdev->mc.gtt_start >> 16);
@@ -1222,11 +1222,11 @@ static void evergreen_gpu_init(struct radeon_device *rdev)
1222 ps_thread_count = 128; 1222 ps_thread_count = 128;
1223 1223
1224 sq_thread_resource_mgmt = NUM_PS_THREADS(ps_thread_count); 1224 sq_thread_resource_mgmt = NUM_PS_THREADS(ps_thread_count);
1225 sq_thread_resource_mgmt |= NUM_VS_THREADS(((rdev->config.evergreen.max_threads - ps_thread_count) / 6) / 8) * 8; 1225 sq_thread_resource_mgmt |= NUM_VS_THREADS((((rdev->config.evergreen.max_threads - ps_thread_count) / 6) / 8) * 8);
1226 sq_thread_resource_mgmt |= NUM_GS_THREADS(((rdev->config.evergreen.max_threads - ps_thread_count) / 6) / 8) * 8; 1226 sq_thread_resource_mgmt |= NUM_GS_THREADS((((rdev->config.evergreen.max_threads - ps_thread_count) / 6) / 8) * 8);
1227 sq_thread_resource_mgmt |= NUM_ES_THREADS(((rdev->config.evergreen.max_threads - ps_thread_count) / 6) / 8) * 8; 1227 sq_thread_resource_mgmt |= NUM_ES_THREADS((((rdev->config.evergreen.max_threads - ps_thread_count) / 6) / 8) * 8);
1228 sq_thread_resource_mgmt_2 = NUM_HS_THREADS(((rdev->config.evergreen.max_threads - ps_thread_count) / 6) / 8) * 8; 1228 sq_thread_resource_mgmt_2 = NUM_HS_THREADS((((rdev->config.evergreen.max_threads - ps_thread_count) / 6) / 8) * 8);
1229 sq_thread_resource_mgmt_2 |= NUM_LS_THREADS(((rdev->config.evergreen.max_threads - ps_thread_count) / 6) / 8) * 8; 1229 sq_thread_resource_mgmt_2 |= NUM_LS_THREADS((((rdev->config.evergreen.max_threads - ps_thread_count) / 6) / 8) * 8);
1230 1230
1231 sq_stack_resource_mgmt_1 = NUM_PS_STACK_ENTRIES((rdev->config.evergreen.max_stack_entries * 1) / 6); 1231 sq_stack_resource_mgmt_1 = NUM_PS_STACK_ENTRIES((rdev->config.evergreen.max_stack_entries * 1) / 6);
1232 sq_stack_resource_mgmt_1 |= NUM_VS_STACK_ENTRIES((rdev->config.evergreen.max_stack_entries * 1) / 6); 1232 sq_stack_resource_mgmt_1 |= NUM_VS_STACK_ENTRIES((rdev->config.evergreen.max_stack_entries * 1) / 6);
@@ -1260,6 +1260,9 @@ static void evergreen_gpu_init(struct radeon_device *rdev)
1260 WREG32(VGT_GS_VERTEX_REUSE, 16); 1260 WREG32(VGT_GS_VERTEX_REUSE, 16);
1261 WREG32(PA_SC_LINE_STIPPLE_STATE, 0); 1261 WREG32(PA_SC_LINE_STIPPLE_STATE, 0);
1262 1262
1263 WREG32(VGT_VERTEX_REUSE_BLOCK_CNTL, 14);
1264 WREG32(VGT_OUT_DEALLOC_CNTL, 16);
1265
1263 WREG32(CB_PERF_CTR0_SEL_0, 0); 1266 WREG32(CB_PERF_CTR0_SEL_0, 0);
1264 WREG32(CB_PERF_CTR0_SEL_1, 0); 1267 WREG32(CB_PERF_CTR0_SEL_1, 0);
1265 WREG32(CB_PERF_CTR1_SEL_0, 0); 1268 WREG32(CB_PERF_CTR1_SEL_0, 0);
@@ -1269,6 +1272,26 @@ static void evergreen_gpu_init(struct radeon_device *rdev)
1269 WREG32(CB_PERF_CTR3_SEL_0, 0); 1272 WREG32(CB_PERF_CTR3_SEL_0, 0);
1270 WREG32(CB_PERF_CTR3_SEL_1, 0); 1273 WREG32(CB_PERF_CTR3_SEL_1, 0);
1271 1274
1275 /* clear render buffer base addresses