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authorKevin Hilman <khilman@linaro.org>2013-08-13 18:12:02 -0400
committerKevin Hilman <khilman@linaro.org>2013-08-13 18:12:20 -0400
commitbee22087faf5bbf33fcb61e6c5e8f8ef7ebd77a5 (patch)
tree1ca5384ec71f31bd9ae04d867952ca2ced00fe11
parent311b79bb7e253dc5916db6dc14374dae0cd4ff9c (diff)
parent3294a7e7c3a55bb4eb9d98b0af5643a7ea44afe1 (diff)
Merge branch 'msm/cleanup' into next/cleanup
From David Brown <davidb@codeaurora.org>: * msm/cleanup: ARM: msm: Only compile io.c on platforms that use it iommu/msm: Move mach includes to iommu directory ARM: msm: Remove devices-iommu.c ARM: msm: Move mach/board.h contents to common.h ARM: msm: Migrate msm_timer to CLOCKSOURCE_OF_DECLARE ARM: msm: Remove TMR and TMR0 static mappings ARM: msm: Move debug-macro.S to include/debug ARM: msm: Don't compile __msm_ioremap_caller() unless used ARM: msm: Remove unused and unmapped MSM_TLMM_BASE for 8x60 Signed-off-by: Kevin Hilman <khilman@linaro.org>
-rw-r--r--arch/arm/Kconfig1
-rw-r--r--arch/arm/Kconfig.debug9
-rw-r--r--arch/arm/include/debug/msm.S (renamed from arch/arm/mach-msm/include/mach/debug-macro.S)32
-rw-r--r--arch/arm/mach-msm/Makefile9
-rw-r--r--arch/arm/mach-msm/board-dt-8660.c4
-rw-r--r--arch/arm/mach-msm/board-dt-8960.c3
-rw-r--r--arch/arm/mach-msm/board-halibut.c1
-rw-r--r--arch/arm/mach-msm/board-mahimahi.c2
-rw-r--r--arch/arm/mach-msm/board-msm7x30.c1
-rw-r--r--arch/arm/mach-msm/board-qsd8x50.c1
-rw-r--r--arch/arm/mach-msm/board-sapphire.c2
-rw-r--r--arch/arm/mach-msm/board-trout.c1
-rw-r--r--arch/arm/mach-msm/board-trout.h2
-rw-r--r--arch/arm/mach-msm/common.h18
-rw-r--r--arch/arm/mach-msm/devices-iommu.c912
-rw-r--r--arch/arm/mach-msm/devices-msm7x30.c2
-rw-r--r--arch/arm/mach-msm/devices-qsd8x50.c2
-rw-r--r--arch/arm/mach-msm/include/mach/board.h38
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap-8960.h46
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap-8x60.h53
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap.h17
-rw-r--r--arch/arm/mach-msm/include/mach/uncompress.h63
-rw-r--r--arch/arm/mach-msm/io.c67
-rw-r--r--arch/arm/mach-msm/timer.c17
-rw-r--r--drivers/iommu/msm_iommu.c4
-rw-r--r--drivers/iommu/msm_iommu.h (renamed from arch/arm/mach-msm/include/mach/iommu.h)0
-rw-r--r--drivers/iommu/msm_iommu_dev.c4
-rw-r--r--drivers/iommu/msm_iommu_hw-8xxx.h (renamed from arch/arm/mach-msm/include/mach/iommu_hw-8xxx.h)0
-rw-r--r--drivers/video/msm/msm_fb.c1
29 files changed, 93 insertions, 1219 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index baf43de26a54..944fd5ae44cb 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -630,6 +630,7 @@ config ARCH_MSM
630 bool "Qualcomm MSM" 630 bool "Qualcomm MSM"
631 select ARCH_REQUIRE_GPIOLIB 631 select ARCH_REQUIRE_GPIOLIB
632 select CLKDEV_LOOKUP 632 select CLKDEV_LOOKUP
633 select CLKSRC_OF if OF
633 select COMMON_CLK 634 select COMMON_CLK
634 select GENERIC_CLOCKEVENTS 635 select GENERIC_CLOCKEVENTS
635 help 636 help
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index e401a766c0bd..4a62a8d4f3b6 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -777,6 +777,11 @@ config DEBUG_LL_INCLUDE
777 DEBUG_IMX6SL_UART 777 DEBUG_IMX6SL_UART
778 default "debug/keystone.S" if DEBUG_KEYSTONE_UART0 || \ 778 default "debug/keystone.S" if DEBUG_KEYSTONE_UART0 || \
779 DEBUG_KEYSTONE_UART1 779 DEBUG_KEYSTONE_UART1
780 default "debug/msm.S" if DEBUG_MSM_UART1 || \
781 DEBUG_MSM_UART2 || \
782 DEBUG_MSM_UART3 || \
783 DEBUG_MSM8660_UART || \
784 DEBUG_MSM8960_UART
780 default "debug/mvebu.S" if DEBUG_MVEBU_UART || \ 785 default "debug/mvebu.S" if DEBUG_MVEBU_UART || \
781 DEBUG_MVEBU_UART_ALTERNATE 786 DEBUG_MVEBU_UART_ALTERNATE
782 default "debug/mxs.S" if DEBUG_IMX23_UART || DEBUG_IMX28_UART 787 default "debug/mxs.S" if DEBUG_IMX23_UART || DEBUG_IMX28_UART
@@ -804,13 +809,13 @@ config DEBUG_LL_INCLUDE
804 809
805config DEBUG_UNCOMPRESS 810config DEBUG_UNCOMPRESS
806 bool 811 bool
807 default y if ARCH_MULTIPLATFORM && DEBUG_LL && \ 812 default y if (ARCH_MULTIPLATFORM || ARCH_MSM) && DEBUG_LL && \
808 !DEBUG_OMAP2PLUS_UART && \ 813 !DEBUG_OMAP2PLUS_UART && \
809 !DEBUG_TEGRA_UART 814 !DEBUG_TEGRA_UART
810 815
811config UNCOMPRESS_INCLUDE 816config UNCOMPRESS_INCLUDE
812 string 817 string
813 default "debug/uncompress.h" if ARCH_MULTIPLATFORM 818 default "debug/uncompress.h" if ARCH_MULTIPLATFORM || ARCH_MSM
814 default "mach/uncompress.h" 819 default "mach/uncompress.h"
815 820
816config EARLY_PRINTK 821config EARLY_PRINTK
diff --git a/arch/arm/mach-msm/include/mach/debug-macro.S b/arch/arm/include/debug/msm.S
index 0e05f88abcd5..9166e1bc470e 100644
--- a/arch/arm/mach-msm/include/mach/debug-macro.S
+++ b/arch/arm/include/debug/msm.S
@@ -15,8 +15,36 @@
15 * 15 *
16 */ 16 */
17 17
18#include <mach/hardware.h> 18#if defined(CONFIG_ARCH_MSM7X00A) || defined(CONFIG_ARCH_QSD8X50)
19#include <mach/msm_iomap.h> 19#define MSM_UART1_PHYS 0xA9A00000
20#define MSM_UART2_PHYS 0xA9B00000
21#define MSM_UART3_PHYS 0xA9C00000
22#elif defined(CONFIG_ARCH_MSM7X30)
23#define MSM_UART1_PHYS 0xACA00000
24#define MSM_UART2_PHYS 0xACB00000
25#define MSM_UART3_PHYS 0xACC00000
26#endif
27
28#if defined(CONFIG_DEBUG_MSM_UART1)
29#define MSM_DEBUG_UART_BASE 0xE1000000
30#define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS
31#elif defined(CONFIG_DEBUG_MSM_UART2)
32#define MSM_DEBUG_UART_BASE 0xE1000000
33#define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS
34#elif defined(CONFIG_DEBUG_MSM_UART3)
35#define MSM_DEBUG_UART_BASE 0xE1000000
36#define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS
37#endif
38
39#ifdef CONFIG_DEBUG_MSM8660_UART
40#define MSM_DEBUG_UART_BASE 0xF0040000
41#define MSM_DEBUG_UART_PHYS 0x19C40000
42#endif
43
44#ifdef CONFIG_DEBUG_MSM8960_UART
45#define MSM_DEBUG_UART_BASE 0xF0040000
46#define MSM_DEBUG_UART_PHYS 0x16440000
47#endif
20 48
21 .macro addruart, rp, rv, tmp 49 .macro addruart, rp, rv, tmp
22#ifdef MSM_DEBUG_UART_PHYS 50#ifdef MSM_DEBUG_UART_PHYS
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
index d257ff40e16b..d872634c2f85 100644
--- a/arch/arm/mach-msm/Makefile
+++ b/arch/arm/mach-msm/Makefile
@@ -1,17 +1,16 @@
1obj-y += io.o timer.o 1obj-y += timer.o
2obj-y += clock.o 2obj-y += clock.o
3 3
4obj-$(CONFIG_MSM_VIC) += irq-vic.o 4obj-$(CONFIG_MSM_VIC) += irq-vic.o
5obj-$(CONFIG_MSM_IOMMU) += devices-iommu.o
6 5
7obj-$(CONFIG_ARCH_MSM7X00A) += irq.o 6obj-$(CONFIG_ARCH_MSM7X00A) += irq.o
8obj-$(CONFIG_ARCH_QSD8X50) += sirc.o 7obj-$(CONFIG_ARCH_QSD8X50) += sirc.o
9 8
10obj-$(CONFIG_MSM_PROC_COMM) += proc_comm.o clock-pcom.o vreg.o 9obj-$(CONFIG_MSM_PROC_COMM) += proc_comm.o clock-pcom.o vreg.o
11 10
12obj-$(CONFIG_ARCH_MSM7X00A) += dma.o 11obj-$(CONFIG_ARCH_MSM7X00A) += dma.o io.o
13obj-$(CONFIG_ARCH_MSM7X30) += dma.o 12obj-$(CONFIG_ARCH_MSM7X30) += dma.o io.o
14obj-$(CONFIG_ARCH_QSD8X50) += dma.o 13obj-$(CONFIG_ARCH_QSD8X50) += dma.o io.o
15 14
16obj-$(CONFIG_MSM_SMD) += smd.o smd_debug.o 15obj-$(CONFIG_MSM_SMD) += smd.o smd_debug.o
17obj-$(CONFIG_MSM_SMD) += last_radio_log.o 16obj-$(CONFIG_MSM_SMD) += last_radio_log.o
diff --git a/arch/arm/mach-msm/board-dt-8660.c b/arch/arm/mach-msm/board-dt-8660.c
index 492f5cd87b0a..c2946892f5e3 100644
--- a/arch/arm/mach-msm/board-dt-8660.c
+++ b/arch/arm/mach-msm/board-dt-8660.c
@@ -15,8 +15,8 @@
15#include <linux/of_platform.h> 15#include <linux/of_platform.h>
16 16
17#include <asm/mach/arch.h> 17#include <asm/mach/arch.h>
18#include <asm/mach/map.h>
18 19
19#include <mach/board.h>
20#include "common.h" 20#include "common.h"
21 21
22static void __init msm8x60_init_late(void) 22static void __init msm8x60_init_late(void)
@@ -42,9 +42,7 @@ static const char *msm8x60_fluid_match[] __initdata = {
42 42
43DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device Tree)") 43DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device Tree)")
44 .smp = smp_ops(msm_smp_ops), 44 .smp = smp_ops(msm_smp_ops),
45 .map_io = msm_map_msm8x60_io,
46 .init_machine = msm8x60_dt_init, 45 .init_machine = msm8x60_dt_init,
47 .init_late = msm8x60_init_late, 46 .init_late = msm8x60_init_late,
48 .init_time = msm_dt_timer_init,
49 .dt_compat = msm8x60_fluid_match, 47 .dt_compat = msm8x60_fluid_match,
50MACHINE_END 48MACHINE_END
diff --git a/arch/arm/mach-msm/board-dt-8960.c b/arch/arm/mach-msm/board-dt-8960.c
index bb5530957c4f..d4ca52c45111 100644
--- a/arch/arm/mach-msm/board-dt-8960.c
+++ b/arch/arm/mach-msm/board-dt-8960.c
@@ -14,6 +14,7 @@
14#include <linux/of_platform.h> 14#include <linux/of_platform.h>
15 15
16#include <asm/mach/arch.h> 16#include <asm/mach/arch.h>
17#include <asm/mach/map.h>
17 18
18#include "common.h" 19#include "common.h"
19 20
@@ -29,8 +30,6 @@ static const char * const msm8960_dt_match[] __initconst = {
29 30
30DT_MACHINE_START(MSM8960_DT, "Qualcomm MSM (Flattened Device Tree)") 31DT_MACHINE_START(MSM8960_DT, "Qualcomm MSM (Flattened Device Tree)")
31 .smp = smp_ops(msm_smp_ops), 32 .smp = smp_ops(msm_smp_ops),
32 .map_io = msm_map_msm8960_io,
33 .init_time = msm_dt_timer_init,
34 .init_machine = msm_dt_init, 33 .init_machine = msm_dt_init,
35 .dt_compat = msm8960_dt_match, 34 .dt_compat = msm8960_dt_match,
36MACHINE_END 35MACHINE_END
diff --git a/arch/arm/mach-msm/board-halibut.c b/arch/arm/mach-msm/board-halibut.c
index 803651ad4f62..a77529887cbc 100644
--- a/arch/arm/mach-msm/board-halibut.c
+++ b/arch/arm/mach-msm/board-halibut.c
@@ -29,7 +29,6 @@
29#include <asm/setup.h> 29#include <asm/setup.h>
30 30
31#include <mach/irqs.h> 31#include <mach/irqs.h>
32#include <mach/board.h>
33#include <mach/msm_iomap.h> 32#include <mach/msm_iomap.h>
34 33
35#include <linux/mtd/nand.h> 34#include <linux/mtd/nand.h>
diff --git a/arch/arm/mach-msm/board-mahimahi.c b/arch/arm/mach-msm/board-mahimahi.c
index 30c3496db593..7d9981cb400e 100644
--- a/arch/arm/mach-msm/board-mahimahi.c
+++ b/arch/arm/mach-msm/board-mahimahi.c
@@ -28,12 +28,12 @@
28#include <asm/mach/map.h> 28#include <asm/mach/map.h>
29#include <asm/setup.h> 29#include <asm/setup.h>
30 30
31#include <mach/board.h>
32#include <mach/hardware.h> 31#include <mach/hardware.h>
33 32
34#include "board-mahimahi.h" 33#include "board-mahimahi.h"
35#include "devices.h" 34#include "devices.h"
36#include "proc_comm.h" 35#include "proc_comm.h"
36#include "common.h"
37 37
38static uint debug_uart; 38static uint debug_uart;
39 39
diff --git a/arch/arm/mach-msm/board-msm7x30.c b/arch/arm/mach-msm/board-msm7x30.c
index db3d8c0bc8a4..f9af5a46e8b6 100644
--- a/arch/arm/mach-msm/board-msm7x30.c
+++ b/arch/arm/mach-msm/board-msm7x30.c
@@ -30,7 +30,6 @@
30#include <asm/memory.h> 30#include <asm/memory.h>
31#include <asm/setup.h> 31#include <asm/setup.h>
32 32
33#include <mach/board.h>
34#include <mach/msm_iomap.h> 33#include <mach/msm_iomap.h>
35#include <mach/dma.h> 34#include <mach/dma.h>
36 35
diff --git a/arch/arm/mach-msm/board-qsd8x50.c b/arch/arm/mach-msm/board-qsd8x50.c
index f14a73d86bc0..5f933bc50783 100644
--- a/arch/arm/mach-msm/board-qsd8x50.c
+++ b/arch/arm/mach-msm/board-qsd8x50.c
@@ -28,7 +28,6 @@
28#include <asm/io.h> 28#include <asm/io.h>
29#include <asm/setup.h> 29#include <asm/setup.h>
30 30
31#include <mach/board.h>
32#include <mach/irqs.h> 31#include <mach/irqs.h>
33#include <mach/sirc.h> 32#include <mach/sirc.h>
34#include <mach/vreg.h> 33#include <mach/vreg.h>
diff --git a/arch/arm/mach-msm/board-sapphire.c b/arch/arm/mach-msm/board-sapphire.c
index 70730111b37c..327605174d63 100644
--- a/arch/arm/mach-msm/board-sapphire.c
+++ b/arch/arm/mach-msm/board-sapphire.c
@@ -28,7 +28,6 @@
28#include <asm/mach/map.h> 28#include <asm/mach/map.h>
29#include <asm/mach/flash.h> 29#include <asm/mach/flash.h>
30#include <mach/vreg.h> 30#include <mach/vreg.h>
31#include <mach/board.h>
32 31
33#include <asm/io.h> 32#include <asm/io.h>
34#include <asm/delay.h> 33#include <asm/delay.h>
@@ -41,6 +40,7 @@
41#include "board-sapphire.h" 40#include "board-sapphire.h"
42#include "proc_comm.h" 41#include "proc_comm.h"
43#include "devices.h" 42#include "devices.h"
43#include "common.h"
44 44
45void msm_init_irq(void); 45void msm_init_irq(void);
46void msm_init_gpio(void); 46void msm_init_gpio(void);
diff --git a/arch/arm/mach-msm/board-trout.c b/arch/arm/mach-msm/board-trout.c
index 64a46eb4fc49..ccf6621bc664 100644
--- a/arch/arm/mach-msm/board-trout.c
+++ b/arch/arm/mach-msm/board-trout.c
@@ -25,7 +25,6 @@
25#include <asm/mach/map.h> 25#include <asm/mach/map.h>
26#include <asm/setup.h> 26#include <asm/setup.h>
27 27
28#include <mach/board.h>
29#include <mach/hardware.h> 28#include <mach/hardware.h>
30#include <mach/msm_iomap.h> 29#include <mach/msm_iomap.h>
31 30
diff --git a/arch/arm/mach-msm/board-trout.h b/arch/arm/mach-msm/board-trout.h
index 651851c3e1dd..b2379ede43bc 100644
--- a/arch/arm/mach-msm/board-trout.h
+++ b/arch/arm/mach-msm/board-trout.h
@@ -4,7 +4,7 @@
4#ifndef __ARCH_ARM_MACH_MSM_BOARD_TROUT_H 4#ifndef __ARCH_ARM_MACH_MSM_BOARD_TROUT_H
5#define __ARCH_ARM_MACH_MSM_BOARD_TROUT_H 5#define __ARCH_ARM_MACH_MSM_BOARD_TROUT_H
6 6
7#include <mach/board.h> 7#include "common.h"
8 8
9#define MSM_SMI_BASE 0x00000000 9#define MSM_SMI_BASE 0x00000000
10#define MSM_SMI_SIZE 0x00800000 10#define MSM_SMI_SIZE 0x00800000
diff --git a/arch/arm/mach-msm/common.h b/arch/arm/mach-msm/common.h
index 421cf7751a80..33c7725adae2 100644
--- a/arch/arm/mach-msm/common.h
+++ b/arch/arm/mach-msm/common.h
@@ -14,13 +14,10 @@
14 14
15extern void msm7x01_timer_init(void); 15extern void msm7x01_timer_init(void);
16extern void msm7x30_timer_init(void); 16extern void msm7x30_timer_init(void);
17extern void msm_dt_timer_init(void);
18extern void qsd8x50_timer_init(void); 17extern void qsd8x50_timer_init(void);
19 18
20extern void msm_map_common_io(void); 19extern void msm_map_common_io(void);
21extern void msm_map_msm7x30_io(void); 20extern void msm_map_msm7x30_io(void);
22extern void msm_map_msm8x60_io(void);
23extern void msm_map_msm8960_io(void);
24extern void msm_map_qsd8x50_io(void); 21extern void msm_map_qsd8x50_io(void);
25 22
26extern void __iomem *__msm_ioremap_caller(phys_addr_t phys_addr, size_t size, 23extern void __iomem *__msm_ioremap_caller(phys_addr_t phys_addr, size_t size,
@@ -29,4 +26,19 @@ extern void __iomem *__msm_ioremap_caller(phys_addr_t phys_addr, size_t size,
29extern struct smp_operations msm_smp_ops; 26extern struct smp_operations msm_smp_ops;
30extern void msm_cpu_die(unsigned int cpu); 27extern void msm_cpu_die(unsigned int cpu);
31 28
29struct msm_mmc_platform_data;
30
31extern void msm_add_devices(void);
32extern void msm_init_irq(void);
33extern void msm_init_gpio(void);
34extern int msm_add_sdcc(unsigned int controller,
35 struct msm_mmc_platform_data *plat,
36 unsigned int stat_irq, unsigned long stat_irq_flags);
37
38#if defined(CONFIG_MSM_SMD) && defined(CONFIG_DEBUG_FS)
39extern int smd_debugfs_init(void);
40#else
41static inline int smd_debugfs_init(void) { return 0; }
42#endif
43
32#endif 44#endif
diff --git a/arch/arm/mach-msm/devices-iommu.c b/arch/arm/mach-msm/devices-iommu.c
deleted file mode 100644
index 0fb7a17df398..000000000000
--- a/arch/arm/mach-msm/devices-iommu.c
+++ /dev/null
@@ -1,912 +0,0 @@
1/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
15 * 02110-1301, USA.
16 */
17
18#include <linux/kernel.h>
19#include <linux/platform_device.h>
20#include <linux/bootmem.h>
21#include <linux/module.h>
22#include <mach/irqs.h>
23#include <mach/iommu.h>
24
25static struct resource msm_iommu_jpegd_resources[] = {
26 {
27 .start = 0x07300000,
28 .end = 0x07300000 + SZ_1M - 1,
29 .name = "physbase",
30 .flags = IORESOURCE_MEM,
31 },
32 {
33 .name = "nonsecure_irq",
34 .start = SMMU_JPEGD_CB_SC_NON_SECURE_IRQ,
35 .end = SMMU_JPEGD_CB_SC_NON_SECURE_IRQ,
36 .flags = IORESOURCE_IRQ,
37 },
38 {
39 .name = "secure_irq",
40 .start = SMMU_JPEGD_CB_SC_SECURE_IRQ,
41 .end = SMMU_JPEGD_CB_SC_SECURE_IRQ,
42 .flags = IORESOURCE_IRQ,
43 },
44};
45
46static struct resource msm_iommu_vpe_resources[] = {
47 {
48 .start = 0x07400000,
49 .end = 0x07400000 + SZ_1M - 1,
50 .name = "physbase",
51 .flags = IORESOURCE_MEM,
52 },
53 {
54 .name = "nonsecure_irq",
55 .start = SMMU_VPE_CB_SC_NON_SECURE_IRQ,
56 .end = SMMU_VPE_CB_SC_NON_SECURE_IRQ,
57 .flags = IORESOURCE_IRQ,
58 },
59 {
60 .name = "secure_irq",
61 .start = SMMU_VPE_CB_SC_SECURE_IRQ,
62 .end = SMMU_VPE_CB_SC_SECURE_IRQ,
63 .flags = IORESOURCE_IRQ,
64 },
65};
66
67static struct resource msm_iommu_mdp0_resources[] = {
68 {
69 .start = 0x07500000,
70 .end = 0x07500000 + SZ_1M - 1,
71 .name = "physbase",
72 .flags = IORESOURCE_MEM,
73 },
74 {
75 .name = "nonsecure_irq",
76 .start = SMMU_MDP0_CB_SC_NON_SECURE_IRQ,
77 .end = SMMU_MDP0_CB_SC_NON_SECURE_IRQ,
78 .flags = IORESOURCE_IRQ,
79 },
80 {
81 .name = "secure_irq",
82 .start = SMMU_MDP0_CB_SC_SECURE_IRQ,
83 .end = SMMU_MDP0_CB_SC_SECURE_IRQ,
84 .flags = IORESOURCE_IRQ,
85 },
86};
87
88static struct resource msm_iommu_mdp1_resources[] = {
89 {
90 .start = 0x07600000,
91 .end = 0x07600000 + SZ_1M - 1,
92 .name = "physbase",
93 .flags = IORESOURCE_MEM,
94 },
95 {
96 .name = "nonsecure_irq",
97 .start = SMMU_MDP1_CB_SC_NON_SECURE_IRQ,
98 .end = SMMU_MDP1_CB_SC_NON_SECURE_IRQ,
99 .flags = IORESOURCE_IRQ,
100 },
101 {
102 .name = "secure_irq",
103 .start = SMMU_MDP1_CB_SC_SECURE_IRQ,
104 .end = SMMU_MDP1_CB_SC_SECURE_IRQ,
105 .flags = IORESOURCE_IRQ,
106 },
107};
108
109static struct resource msm_iommu_rot_resources[] = {
110 {
111 .start = 0x07700000,
112 .end = 0x07700000 + SZ_1M - 1,
113 .name = "physbase",
114 .flags = IORESOURCE_MEM,
115 },
116 {
117 .name = "nonsecure_irq",
118 .start = SMMU_ROT_CB_SC_NON_SECURE_IRQ,
119 .end = SMMU_ROT_CB_SC_NON_SECURE_IRQ,
120 .flags = IORESOURCE_IRQ,
121 },
122 {
123 .name = "secure_irq",
124 .start = SMMU_ROT_CB_SC_SECURE_IRQ,
125 .end = SMMU_ROT_CB_SC_SECURE_IRQ,
126 .flags = IORESOURCE_IRQ,
127 },
128};
129
130static struct resource msm_iommu_ijpeg_resources[] = {
131 {
132 .start = 0x07800000,
133 .end = 0x07800000 + SZ_1M - 1,
134 .name = "physbase",
135 .flags = IORESOURCE_MEM,
136 },
137 {
138 .name = "nonsecure_irq",
139 .start = SMMU_IJPEG_CB_SC_NON_SECURE_IRQ,
140 .end = SMMU_IJPEG_CB_SC_NON_SECURE_IRQ,
141 .flags = IORESOURCE_IRQ,
142 },
143 {
144 .name = "secure_irq",
145 .start = SMMU_IJPEG_CB_SC_SECURE_IRQ,
146 .end = SMMU_IJPEG_CB_SC_SECURE_IRQ,
147 .flags = IORESOURCE_IRQ,
148 },
149};
150
151static struct resource msm_iommu_vfe_resources[] = {
152 {
153 .start = 0x07900000,
154 .end = 0x07900000 + SZ_1M - 1,
155 .name = "physbase",
156 .flags = IORESOURCE_MEM,
157 },
158 {
159 .name = "nonsecure_irq",
160 .start = SMMU_VFE_CB_SC_NON_SECURE_IRQ,
161 .end = SMMU_VFE_CB_SC_NON_SECURE_IRQ,
162 .flags = IORESOURCE_IRQ,
163 },
164 {
165 .name = "secure_irq",
166 .start = SMMU_VFE_CB_SC_SECURE_IRQ,
167 .end = SMMU_VFE_CB_SC_SECURE_IRQ,
168 .flags = IORESOURCE_IRQ,
169 },
170};
171
172static struct resource msm_iommu_vcodec_a_resources[] = {
173 {
174 .start = 0x07A00000,
175 .end = 0x07A00000 + SZ_1M - 1,
176 .name = "physbase",
177 .flags = IORESOURCE_MEM,
178 },
179 {
180 .name = "nonsecure_irq",
181 .start = SMMU_VCODEC_A_CB_SC_NON_SECURE_IRQ,
182 .end = SMMU_VCODEC_A_CB_SC_NON_SECURE_IRQ,
183 .flags = IORESOURCE_IRQ,
184 },
185 {
186 .name = "secure_irq",
187 .start = SMMU_VCODEC_A_CB_SC_SECURE_IRQ,
188 .end = SMMU_VCODEC_A_CB_SC_SECURE_IRQ,
189 .flags = IORESOURCE_IRQ,
190 },
191};
192
193static struct resource msm_iommu_vcodec_b_resources[] = {
194 {
195 .start = 0x07B00000,
196 .end = 0x07B00000 + SZ_1M - 1,
197 .name = "physbase",
198 .flags = IORESOURCE_MEM,
199 },
200 {
201 .name = "nonsecure_irq",
202 .start = SMMU_VCODEC_B_CB_SC_NON_SECURE_IRQ,
203 .end = SMMU_VCODEC_B_CB_SC_NON_SECURE_IRQ,
204 .flags = IORESOURCE_IRQ,
205 },
206 {
207 .name = "secure_irq",
208 .start = SMMU_VCODEC_B_CB_SC_SECURE_IRQ,
209 .end = SMMU_VCODEC_B_CB_SC_SECURE_IRQ,
210 .flags = IORESOURCE_IRQ,
211 },
212};
213
214static struct resource msm_iommu_gfx3d_resources[] = {
215 {
216 .start = 0x07C00000,
217 .end = 0x07C00000 + SZ_1M - 1,
218 .name = "physbase",
219 .flags = IORESOURCE_MEM,
220 },
221 {
222 .name = "nonsecure_irq",
223 .start = SMMU_GFX3D_CB_SC_NON_SECURE_IRQ,
224 .end = SMMU_GFX3D_CB_SC_NON_SECURE_IRQ,
225 .flags = IORESOURCE_IRQ,
226 },
227 {
228 .name = "secure_irq",
229 .start = SMMU_GFX3D_CB_SC_SECURE_IRQ,
230 .end = SMMU_GFX3D_CB_SC_SECURE_IRQ,
231 .flags = IORESOURCE_IRQ,
232 },
233};
234
235static struct resource msm_iommu_gfx2d0_resources[] = {
236 {
237 .start = 0x07D00000,
238 .end = 0x07D00000 + SZ_1M - 1,
239 .name = "physbase",
240 .flags = IORESOURCE_MEM,
241 },
242 {
243 .name = "nonsecure_irq",
244 .start = SMMU_GFX2D0_CB_SC_NON_SECURE_IRQ,
245 .end = SMMU_GFX2D0_CB_SC_NON_SECURE_IRQ,
246 .flags = IORESOURCE_IRQ,
247 },
248 {
249 .name = "secure_irq",
250 .start = SMMU_GFX2D0_CB_SC_SECURE_IRQ,
251 .end = SMMU_GFX2D0_CB_SC_SECURE_IRQ,
252 .flags = IORESOURCE_IRQ,
253 },
254};
255
256static struct resource msm_iommu_gfx2d1_resources[] = {
257 {
258 .start = 0x07E00000,
259 .end = 0x07E00000 + SZ_1M - 1,
260 .name = "physbase",
261 .flags = IORESOURCE_MEM,
262 },
263 {
264 .name = "nonsecure_irq",
265 .start = SMMU_GFX2D1_CB_SC_NON_SECURE_IRQ,
266 .end = SMMU_GFX2D1_CB_SC_NON_SECURE_IRQ,
267 .flags = IORESOURCE_IRQ,
268 },
269 {
270 .name = "secure_irq",
271 .start = SMMU_GFX2D1_CB_SC_SECURE_IRQ,
272 .end = SMMU_GFX2D1_CB_SC_SECURE_IRQ,
273 .flags = IORESOURCE_IRQ,
274 },
275};
276
277static struct platform_device msm_root_iommu_dev = {
278 .name = "msm_iommu",
279 .id = -1,
280};
281
282static struct msm_iommu_dev jpegd_iommu = {
283 .name = "jpegd",
284 .ncb = 2,
285};
286
287static struct msm_iommu_dev vpe_iommu = {
288 .name = "vpe",
289 .ncb = 2,
290};
291
292static struct msm_iommu_dev mdp0_iommu = {
293 .name = "mdp0",
294 .ncb = 2,
295};
296
297static struct msm_iommu_dev mdp1_iommu = {
298 .name = "mdp1",
299 .ncb = 2,
300};
301
302static struct msm_iommu_dev rot_iommu = {
303 .name = "rot",
304 .ncb = 2,
305};
306
307static struct msm_iommu_dev ijpeg_iommu = {
308 .name = "ijpeg",
309 .ncb = 2,
310};
311
312static struct msm_iommu_dev vfe_iommu = {
313 .name = "vfe",
314 .ncb = 2,
315};
316
317static struct msm_iommu_dev vcodec_a_iommu = {
318 .name = "vcodec_a",
319 .ncb = 2,
320};
321
322static struct msm_iommu_dev vcodec_b_iommu = {
323 .name = "vcodec_b",
324 .ncb = 2,
325};
326
327static struct msm_iommu_dev gfx3d_iommu = {
328 .name = "gfx3d",
329 .ncb = 3,
330};
331
332static struct msm_iommu_dev gfx2d0_iommu = {
333 .name = "gfx2d0",
334 .ncb = 2,
335};
336
337static struct msm_iommu_dev gfx2d1_iommu = {
338 .name = "gfx2d1",
339 .ncb = 2,
340};
341
342static struct platform_device msm_device_iommu_jpegd = {
343 .name = "msm_iommu",
344 .id = 0,
345 .dev = {
346 .parent = &msm_root_iommu_dev.dev,
347 },
348 .num_resources = ARRAY_SIZE(msm_iommu_jpegd_resources),
349 .resource = msm_iommu_jpegd_resources,
350};
351
352static struct platform_device msm_device_iommu_vpe = {
353 .name = "msm_iommu",
354 .id = 1,
355 .dev = {
356 .parent = &msm_root_iommu_dev.dev,
357 },
358 .num_resources = ARRAY_SIZE(msm_iommu_vpe_resources),
359 .resource = msm_iommu_vpe_resources,
360};
361
362static struct platform_device msm_device_iommu_mdp0 = {
363 .name = "msm_iommu",
364 .id = 2,
365 .dev = {
366 .parent = &msm_root_iommu_dev.dev,
367 },
368 .num_resources = ARRAY_SIZE(msm_iommu_mdp0_resources),
369 .resource = msm_iommu_mdp0_resources,
370};
371
372static struct platform_device msm_device_iommu_mdp1 = {
373 .name = "msm_iommu",
374 .id = 3,
375 .dev = {
376 .parent = &msm_root_iommu_dev.dev,
377 },
378 .num_resources = ARRAY_SIZE(msm_iommu_mdp1_resources),
379 .resource = msm_iommu_mdp1_resources,
380};
381
382static struct platform_device msm_device_iommu_rot = {
383 .name = "msm_iommu",
384 .id = 4,
385 .dev = {
386 .parent = &msm_root_iommu_dev.dev,
387 },
388 .num_resources = ARRAY_SIZE(msm_iommu_rot_resources),
389 .resource = msm_iommu_rot_resources,
390};
391
392static struct platform_device msm_device_iommu_ijpeg = {
393 .name = "msm_iommu",
394 .id = 5,
395 .dev = {
396 .parent = &msm_root_iommu_dev.dev,
397 },
398 .num_resources = ARRAY_SIZE(msm_iommu_ijpeg_resources),
399 .resource = msm_iommu_ijpeg_resources,
400};
401
402static struct platform_device msm_device_iommu_vfe = {
403 .name = "msm_iommu",
404 .id = 6,
405 .dev = {
406 .parent = &msm_root_iommu_dev.dev,
407 },
408 .num_resources = ARRAY_SIZE(msm_iommu_vfe_resources),
409 .resource = msm_iommu_vfe_resources,
410};
411
412static struct platform_device msm_device_iommu_vcodec_a = {
413 .name = "msm_iommu",
414 .id = 7,
415 .dev = {
416 .parent = &msm_root_iommu_dev.dev,
417 },
418 .num_resources = ARRAY_SIZE(msm_iommu_vcodec_a_resources),
419 .resource = msm_iommu_vcodec_a_resources,
420};
421
422static struct platform_device msm_device_iommu_vcodec_b = {
423 .name = "msm_iommu",
424 .id = 8,
425 .dev = {
426 .parent = &msm_root_iommu_dev.dev,
427 },
428 .num_resources = ARRAY_SIZE(msm_iommu_vcodec_b_resources),
429 .resource = msm_iommu_vcodec_b_resources,
430};
431
432static struct platform_device msm_device_iommu_gfx3d = {
433 .name = "msm_iommu",
434 .id = 9,
435 .dev = {
436 .parent = &msm_root_iommu_dev.dev,
437 },
438 .num_resources = ARRAY_SIZE(msm_iommu_gfx3d_resources),
439 .resource = msm_iommu_gfx3d_resources,
440};
441
442static struct platform_device msm_device_iommu_gfx2d0 = {
443 .name = "msm_iommu",
444 .id = 10,
445 .dev = {
446 .parent = &msm_root_iommu_dev.dev,
447 },
448 .num_resources = ARRAY_SIZE(msm_iommu_gfx2d0_resources),
449 .resource = msm_iommu_gfx2d0_resources,
450};
451
452struct platform_device msm_device_iommu_gfx2d1 = {
453 .name = "msm_iommu",
454 .id = 11,
455 .dev = {
456 .parent = &msm_root_iommu_dev.dev,
457 },
458 .num_resources = ARRAY_SIZE(msm_iommu_gfx2d1_resources),
459 .resource = msm_iommu_gfx2d1_resources,
460};
461
462static struct msm_iommu_ctx_dev jpegd_src_ctx = {
463 .name = "jpegd_src",
464 .num = 0,
465 .mids = {0, -1}
466};
467
468static struct msm_iommu_ctx_dev jpegd_dst_ctx = {
469 .name = "jpegd_dst",
470 .num = 1,
471 .mids = {1, -1}
472};
473
474static struct msm_iommu_ctx_dev vpe_src_ctx = {
475 .name = "vpe_src",
476 .num = 0,
477 .mids = {0, -1}
478};
479
480static struct msm_iommu_ctx_dev vpe_dst_ctx = {
481 .name = "vpe_dst",
482 .num = 1,
483 .mids = {1, -1}
484};
485
486static struct msm_iommu_ctx_dev mdp_vg1_ctx = {
487 .name = "mdp_vg1",
488 .num = 0,
489 .mids = {0, 2, -1}
490};
491
492static struct msm_iommu_ctx_dev mdp_rgb1_ctx = {
493 .name = "mdp_rgb1",
494 .num = 1,
495 .mids = {1, 3, 4, 5, 6, 7, 8, 9, 10, -1}
496};
497
498static struct msm_iommu_ctx_dev mdp_vg2_ctx = {
499 .name = "mdp_vg2",
500 .num = 0,
501 .mids = {0, 2, -1}
502};
503
504static struct msm_iommu_ctx_dev mdp_rgb2_ctx = {
505 .name = "mdp_rgb2",
506 .num = 1,
507 .mids = {1, 3, 4, 5, 6, 7, 8, 9, 10, -1}
508};
509
510static struct msm_iommu_ctx_dev rot_src_ctx = {
511 .name = "rot_src",
512 .num = 0,
513 .mids = {0, -1}
514};
515
516static struct msm_iommu_ctx_dev rot_dst_ctx = {
517 .name = "rot_dst",
518 .num = 1,
519 .mids = {1, -1}
520};
521
522static struct msm_iommu_ctx_dev ijpeg_src_ctx = {
523 .name = "ijpeg_src",
524 .num = 0,
525 .mids = {0, -1}
526};
527
528static struct msm_iommu_ctx_dev ijpeg_dst_ctx = {
529 .name = "ijpeg_dst",
530 .num = 1,
531 .mids = {1, -1}
532};
533
534static struct msm_iommu_ctx_dev vfe_imgwr_ctx = {
535 .name = "vfe_imgwr",
536 .num = 0,
537 .mids = {2, 3, 4, 5, 6, 7, 8, -1}
538};
539
540static struct msm_iommu_ctx_dev vfe_misc_ctx = {
541 .name = "vfe_misc",
542 .num = 1,
543 .mids = {0, 1, 9, -1}
544};
545
546static struct msm_iommu_ctx_dev vcodec_a_stream_ctx = {
547 .name = "vcodec_a_stream",
548 .num = 0,
549 .mids = {2, 5, -1}
550};
551
552static struct msm_iommu_ctx_dev vcodec_a_mm1_ctx = {
553 .name = "vcodec_a_mm1",
554 .num = 1,
555 .mids = {0, 1, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, -1}
556};
557
558static struct msm_iommu_ctx_dev vcodec_b_mm2_ctx = {
559 .name = "vcodec_b_mm2",
560 .num = 0,
561 .mids = {0, 1, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, -1}
562};
563
564static struct msm_iommu_ctx_dev gfx3d_user_ctx = {
565 .name = "gfx3d_user",
566 .num = 0,
567 .mids = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, -1}
568};
569
570static struct msm_iommu_ctx_dev gfx3d_priv_ctx = {
571 .name = "gfx3d_priv",
572 .num = 1,
573 .mids = {16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30,
574 31, -1}
575};
576
577static struct msm_iommu_ctx_dev gfx2d0_2d0_ctx = {
578 .name = "gfx2d0_2d0",
579 .num = 0,
580 .mids = {0, 1, 2, 3, 4, 5, 6, 7, -1}
581};
582
583static struct msm_iommu_ctx_dev gfx2d1_2d1_ctx = {
584 .name = "gfx2d1_2d1",
585 .num = 0,
586 .mids = {0, 1, 2, 3, 4, 5, 6, 7, -1}
587};
588
589static struct platform_device msm_device_jpegd_src_ctx = {
590 .name = "msm_iommu_ctx",
591 .id = 0,
592 .dev = {
593 .parent = &msm_device_iommu_jpegd.dev,
594 },
595};
596
597static struct platform_device msm_device_jpegd_dst_ctx = {
598 .name = "msm_iommu_ctx",
599 .id = 1,
600 .dev = {
601 .parent = &msm_device_iommu_jpegd.dev,
602 },
603};
604
605static struct platform_device msm_device_vpe_src_ctx = {
606 .name = "msm_iommu_ctx",
607 .id = 2,
608 .dev = {
609 .parent = &msm_device_iommu_vpe.dev,
610 },
611};
612
613static struct platform_device msm_device_vpe_dst_ctx = {
614 .name = "msm_iommu_ctx",
615 .id = 3,
616 .dev = {
617 .parent = &msm_device_iommu_vpe.dev,
618 },
619};
620
621static struct platform_device msm_device_mdp_vg1_ctx = {
622 .name = "msm_iommu_ctx",
623 .id = 4,
624 .dev = {
625 .parent = &msm_device_iommu_mdp0.dev,
626 },
627};
628
629static struct platform_device msm_device_mdp_rgb1_ctx = {
630 .name = "msm_iommu_ctx",
631 .id = 5,
632 .dev = {
633 .parent = &msm_device_iommu_mdp0.dev,
634 },
635};
636
637static struct platform_device msm_device_mdp_vg2_ctx = {
638 .name = "msm_iommu_ctx",
639 .id = 6,
640 .dev = {
641 .parent = &msm_device_iommu_mdp1.dev,
642 },
643};
644
645static struct platform_device msm_device_mdp_rgb2_ctx = {
646 .name = "msm_iommu_ctx",
647 .id = 7,
648 .dev = {
649 .parent = &msm_device_iommu_mdp1.dev,
650 },
651};
652
653static struct platform_device msm_device_rot_src_ctx = {
654 .name = "msm_iommu_ctx",
655 .id = 8,
656 .dev = {
657 .parent = &msm_device_iommu_rot.dev,
658 },
659};
660
661static struct platform_device msm_device_rot_dst_ctx = {
662 .name = "msm_iommu_ctx",
663 .id = 9,
664 .dev = {
665 .parent = &msm_device_iommu_rot.dev,
666 },
667};
668
669static struct platform_device msm_device_ijpeg_src_ctx = {
670 .name = "msm_iommu_ctx",
671 .id = 10,
672 .dev = {
673 .parent = &msm_device_iommu_ijpeg.dev,
674 },
675};
676
677static struct platform_device msm_device_ijpeg_dst_ctx = {
678 .name = "msm_iommu_ctx",
679 .id = 11,
680 .dev = {
681 .parent = &msm_device_iommu_ijpeg.dev,
682 },
683};
684
685static struct platform_device msm_device_vfe_imgwr_ctx = {
686 .name = "msm_iommu_ctx",
687 .id = 12,
688 .dev = {
689 .parent = &msm_device_iommu_vfe.dev,
690 },
691};
692
693static struct platform_device msm_device_vfe_misc_ctx = {
694 .name = "msm_iommu_ctx",
695 .id = 13,
696 .dev = {
697 .parent = &msm_device_iommu_vfe.dev,
698 },
699};
700
701static struct platform_device msm_device_vcodec_a_stream_ctx = {
702 .name = "msm_iommu_ctx",
703 .id = 14,
704 .dev = {
705 .parent = &msm_device_iommu_vcodec_a.dev,
706 },
707};
708
709static struct platform_device msm_device_vcodec_a_mm1_ctx = {
710 .name = "msm_iommu_ctx",
711 .id = 15,
712 .dev = {
713 .parent = &msm_device_iommu_vcodec_a.dev,
714 },
715};
716
717static struct platform_device msm_device_vcodec_b_mm2_ctx = {
718 .name = "msm_iommu_ctx",
719 .id = 16,
720 .dev = {
721 .parent = &msm_device_iommu_vcodec_b.dev,
722 },
723};
724
725static struct platform_device msm_device_gfx3d_user_ctx = {
726 .name = "msm_iommu_ctx",
727 .id = 17,
728 .dev = {
729 .parent = &msm_device_iommu_gfx3d.dev,
730 },
731};
732
733static struct platform_device msm_device_gfx3d_priv_ctx = {
734 .name = "msm_iommu_ctx",
735 .id = 18,
736 .dev = {
737 .parent = &msm_device_iommu_gfx3d.dev,
738 },
739};
740
741static struct platform_device msm_device_gfx2d0_2d0_ctx = {
742 .name = "msm_iommu_ctx",
743 .id = 19,
744 .dev = {
745 .parent = &msm_device_iommu_gfx2d0.dev,
746 },
747};
748
749static struct platform_device msm_device_gfx2d1_2d1_ctx = {
750 .name = "msm_iommu_ctx",
751 .id = 20,
752 .dev = {
753 .parent = &msm_device_iommu_gfx2d1.dev,
754 },
755};
756
757static struct platform_device *msm_iommu_devs[] = {
758 &msm_device_iommu_jpegd,
759 &msm_device_iommu_vpe,
760 &msm_device_iommu_mdp0,
761 &msm_device_iommu_mdp1,
762 &msm_device_iommu_rot,
763 &msm_device_iommu_ijpeg,
764 &msm_device_iommu_vfe,
765 &msm_device_iommu_vcodec_a,
766 &msm_device_iommu_vcodec_b,
767 &msm_device_iommu_gfx3d,
768 &msm_device_iommu_gfx2d0,
769 &msm_device_iommu_gfx2d1,
770};
771
772static struct msm_iommu_dev *msm_iommu_data[] = {
773 &jpegd_iommu,
774 &vpe_iommu,
775 &mdp0_iommu,
776 &mdp1_iommu,
777 &rot_iommu,
778 &ijpeg_iommu,
779 &vfe_iommu,
780 &vcodec_a_iommu,
781 &vcodec_b_iommu,
782 &gfx3d_iommu,
783 &gfx2d0_iommu,
784 &gfx2d1_iommu,
785};
786
787static struct platform_device *msm_iommu_ctx_devs[] = {
788 &msm_device_jpegd_src_ctx,
789 &msm_device_jpegd_dst_ctx,
790 &msm_device_vpe_src_ctx,
791 &msm_device_vpe_dst_ctx,
792 &msm_device_mdp_vg1_ctx,
793 &msm_device_mdp_rgb1_ctx,
794 &msm_device_mdp_vg2_ctx,
795 &msm_device_mdp_rgb2_ctx,
796 &msm_device_rot_src_ctx,
797 &msm_device_rot_dst_ctx,
798 &msm_device_ijpeg_src_ctx,
799 &msm_device_ijpeg_dst_ctx,
800 &msm_device_vfe_imgwr_ctx,
801 &msm_device_vfe_misc_ctx,
802 &msm_device_vcodec_a_stream_ctx,
803 &msm_device_vcodec_a_mm1_ctx,
804 &msm_device_vcodec_b_mm2_ctx,
805 &msm_device_gfx3d_user_ctx,
806 &msm_device_gfx3d_priv_ctx,
807 &msm_device_gfx2d0_2d0_ctx,
808 &msm_device_gfx2d1_2d1_ctx,
809};
810
811static struct msm_iommu_ctx_dev *msm_iommu_ctx_data[] = {
812 &jpegd_src_ctx,
813 &jpegd_dst_ctx,
814 &vpe_src_ctx,
815 &vpe_dst_ctx,
816 &mdp_vg1_ctx,
817 &mdp_rgb1_ctx,
818 &mdp_vg2_ctx,
819 &mdp_rgb2_ctx,
820 &rot_src_ctx,
821 &rot_dst_ctx,
822 &ijpeg_src_ctx,
823 &ijpeg_dst_ctx,
824 &vfe_imgwr_ctx,
825 &vfe_misc_ctx,
826 &vcodec_a_stream_ctx,
827 &vcodec_a_mm1_ctx,
828 &vcodec_b_mm2_ctx,
829 &gfx3d_user_ctx,
830 &gfx3d_priv_ctx,
831 &gfx2d0_2d0_ctx,
832 &gfx2d1_2d1_ctx,
833};
834
835static int __init msm8x60_iommu_init(void)
836{
837 int ret, i;
838
839 ret = platform_device_register(&msm_root_iommu_dev);
840 if (ret != 0) {
841 pr_err("Failed to register root IOMMU device!\n");
842 goto failure;
843 }
844
845 for (i = 0; i < ARRAY_SIZE(msm_iommu_devs); i++) {
846 ret = platform_device_add_data(msm_iommu_devs[i],
847 msm_iommu_data[i],
848 sizeof(struct msm_iommu_dev));
849 if (ret != 0) {
850 pr_err("platform_device_add_data failed, "
851 "i = %d\n", i);
852 goto failure_unwind;
853 }
854
855 ret = platform_device_register(msm_iommu_devs[i]);
856
857 if (ret != 0) {
858 pr_err("platform_device_register iommu failed, "
859 "i = %d\n", i);
860 goto failure_unwind;
861 }
862 }
863
864 for (i = 0; i < ARRAY_SIZE(msm_iommu_ctx_devs); i++) {
865 ret = platform_device_add_data(msm_iommu_ctx_devs[i],
866 msm_iommu_ctx_data[i],
867 sizeof(*msm_iommu_ctx_devs[i]));
868 if (ret != 0) {
869 pr_err("platform_device_add_data iommu failed, "
870 "i = %d\n", i);
871 goto failure_unwind2;
872 }
873
874 ret = platform_device_register(msm_iommu_ctx_devs[i]);
875 if (ret != 0) {
876 pr_err("platform_device_register ctx failed, "
877 "i = %d\n", i);
878 goto failure_unwind2;
879 }
880 }
881 return 0;
882
883failure_unwind2:
884 while (--i >= 0)
885 platform_device_unregister(msm_iommu_ctx_devs[i]);
886failure_unwind:
887 while (--i >= 0)
888 platform_device_unregister(msm_iommu_devs[i]);
889
890 platform_device_unregister(&msm_root_iommu_dev);
891failure:
892 return ret;
893}
894
895static void __exit msm8x60_iommu_exit(void)
896{
897 int i;
898
899 for (i = 0; i < ARRAY_SIZE(msm_iommu_ctx_devs); i++)
900 platform_device_unregister(msm_iommu_ctx_devs[i]);
901
902 for (i = 0; i < ARRAY_SIZE(msm_iommu_devs); ++i)
903 platform_device_unregister(msm_iommu_devs[i]);
904
905 platform_device_unregister(&msm_root_iommu_dev);
906}
907
908subsys_initcall(msm8x60_iommu_init);
909module_exit(msm8x60_iommu_exit);
910
911MODULE_LICENSE("GPL v2");
912MODULE_AUTHOR("Stepan Moskovchenko <stepanm@codeaurora.org>");
diff --git a/arch/arm/mach-msm/devices-msm7x30.c b/arch/arm/mach-msm/devices-msm7x30.c
index d4db75acff56..6b0e9845e753 100644
--- a/arch/arm/mach-msm/devices-msm7x30.c
+++ b/arch/arm/mach-msm/devices-msm7x30.c
@@ -21,10 +21,10 @@
21#include <mach/irqs.h> 21#include <mach/irqs.h>
22#include <mach/msm_iomap.h> 22#include <mach/msm_iomap.h>
23#include <mach/dma.h> 23#include <mach/dma.h>
24#include <mach/board.h>
25 24
26#include "devices.h" 25#include "devices.h"
27#include "smd_private.h" 26#include "smd_private.h"
27#include "common.h"
28 28
29#include <asm/mach/flash.h> 29#include <asm/mach/flash.h>
30 30
diff --git a/arch/arm/mach-msm/devices-qsd8x50.c b/arch/arm/mach-msm/devices-qsd8x50.c
index f5518112284b..c1c45ad2bacb 100644
--- a/arch/arm/mach-msm/devices-qsd8x50.c
+++ b/arch/arm/mach-msm/devices-qsd8x50.c
@@ -21,9 +21,9 @@
21#include <mach/irqs.h> 21#include <mach/irqs.h>
22#include <mach/msm_iomap.h> 22#include <mach/msm_iomap.h>
23#include <mach/dma.h> 23#include <mach/dma.h>
24#include <mach/board.h>
25 24
26#include "devices.h" 25#include "devices.h"
26#include "common.h"
27 27
28#include <asm/mach/flash.h> 28#include <asm/mach/flash.h>
29 29
diff --git a/arch/arm/mach-msm/include/mach/board.h b/arch/arm/mach-msm/include/mach/board.h
deleted file mode 100644
index c34e246a3e07..000000000000
--- a/arch/arm/mach-msm/include/mach/board.h
+++ /dev/null
@@ -1,38 +0,0 @@
1/* arch/arm/mach-msm/include/mach/board.h
2 *
3 * Copyright (C) 2007 Google, Inc.
4 * Author: Brian Swetland <swetland@google.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#ifndef __ASM_ARCH_MSM_BOARD_H
18#define __ASM_ARCH_MSM_BOARD_H
19
20#include <linux/types.h>
21#include <linux/platform_data/mmc-msm_sdcc.h>
22
23/* common init routines for use by arch/arm/mach-msm/board-*.c */
24
25void __init msm_add_devices(void);
26void __init msm_init_irq(void);
27void __init msm_init_gpio(void);
28int __init msm_add_sdcc(unsigned int controller,
29 struct msm_mmc_platform_data *plat,
30 unsigned int stat_irq, unsigned long stat_irq_flags);
31
32#if defined(CONFIG_MSM_SMD) && defined(CONFIG_DEBUG_FS)
33int smd_debugfs_init(void);
34#else
35static inline int smd_debugfs_init(void) { return 0; }
36#endif
37
38#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
deleted file mode 100644
index 7bca8d7108d6..000000000000
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
+++ /dev/null
@@ -1,46 +0,0 @@
1/*
2 * Copyright (C) 2007 Google, Inc.
3 * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
4 * Author: Brian Swetland <swetland@google.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 *
16 * The MSM peripherals are spread all over across 768MB of physical
17 * space, which makes just having a simple IO_ADDRESS macro to slide
18 * them into the right virtual location rough. Instead, we will
19 * provide a master phys->virt mapping for peripherals here.
20 *
21 */
22
23#ifndef __ASM_ARCH_MSM_IOMAP_8960_H
24#define __ASM_ARCH_MSM_IOMAP_8960_H
25
26/* Physical base address and size of peripherals.
27 * Ordered by the virtual base addresses they will be mapped at.
28 *
29 * If you add or remove entries here, you'll want to edit the
30 * msm_io_desc array in arch/arm/mach-msm/io.c to reflect your
31 * changes.
32 *
33 */
34
35#define MSM8960_TMR_PHYS 0x0200A000
36#define MSM8960_TMR_SIZE SZ_4K
37
38#define MSM8960_TMR0_PHYS 0x0208A000
39#define MSM8960_TMR0_SIZE SZ_4K
40
41#ifdef CONFIG_DEBUG_MSM8960_UART
42#define MSM_DEBUG_UART_BASE 0xF0040000
43#define MSM_DEBUG_UART_PHYS 0x16440000
44#endif
45
46#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
deleted file mode 100644
index 75a7b62c1c74..000000000000
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
+++ /dev/null
@@ -1,53 +0,0 @@
1/*
2 * Copyright (C) 2007 Google, Inc.
3 * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
4 * Author: Brian Swetland <swetland@google.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 *
16 * The MSM peripherals are spread all over across 768MB of physical
17 * space, which makes just having a simple IO_ADDRESS macro to slide
18 * them into the right virtual location rough. Instead, we will
19 * provide a master phys->virt mapping for peripherals here.
20 *
21 */
22
23#ifndef __ASM_ARCH_MSM_IOMAP_8X60_H
24#define __ASM_ARCH_MSM_IOMAP_8X60_H
25
26/* Physical base address and size of peripherals.
27 * Ordered by the virtual base addresses they will be mapped at.
28 *
29 * MSM_VIC_BASE must be an value that can be loaded via a "mov"
30 * instruction, otherwise entry-macro.S will not compile.
31 *
32 * If you add or remove entries here, you'll want to edit the
33 * msm_io_desc array in arch/arm/mach-msm/io.c to reflect your
34 * changes.
35 *
36 */
37
38#define MSM_TLMM_BASE IOMEM(0xF0004000)
39#define MSM_TLMM_PHYS 0x00800000
40#define MSM_TLMM_SIZE SZ_16K
41
42#define MSM8X60_TMR_PHYS 0x02000000
43#define MSM8X60_TMR_SIZE SZ_4K
44
45#define MSM8X60_TMR0_PHYS 0x02040000
46#define MSM8X60_TMR0_SIZE SZ_4K
47
48#ifdef CONFIG_DEBUG_MSM8660_UART
49#define MSM_DEBUG_UART_BASE 0xF0040000
50#define MSM_DEBUG_UART_PHYS 0x19C40000
51#endif
52
53#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap.h b/arch/arm/mach-msm/include/mach/msm_iomap.h
index c56e81ffdcde..0e4f49157684 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap.h
@@ -45,25 +45,8 @@
45#include "msm_iomap-7x00.h" 45#include "msm_iomap-7x00.h"
46#endif 46#endif
47 47
48#include "msm_iomap-8x60.h"
49#include "msm_iomap-8960.h"
50
51#define MSM_DEBUG_UART_SIZE SZ_4K
52#if defined(CONFIG_DEBUG_MSM_UART1)
53#define MSM_DEBUG_UART_BASE 0xE1000000
54#define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS
55#elif defined(CONFIG_DEBUG_MSM_UART2)
56#define MSM_DEBUG_UART_BASE 0xE1000000
57#define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS
58#elif defined(CONFIG_DEBUG_MSM_UART3)
59#define MSM_DEBUG_UART_BASE 0xE1000000
60#define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS
61#endif
62
63/* Virtual addresses shared across all MSM targets. */ 48/* Virtual addresses shared across all MSM targets. */
64#define MSM_CSR_BASE IOMEM(0xE0001000) 49#define MSM_CSR_BASE IOMEM(0xE0001000)
65#define MSM_TMR_BASE IOMEM(0xF0200000)
66#define MSM_TMR0_BASE IOMEM(0xF0201000)
67#define MSM_GPIO1_BASE IOMEM(0xE0003000) 50#define MSM_GPIO1_BASE IOMEM(0xE0003000)
68#define MSM_GPIO2_BASE IOMEM(0xE0004000) 51#define MSM_GPIO2_BASE IOMEM(0xE0004000)
69 52
diff --git a/arch/arm/mach-msm/include/mach/uncompress.h b/arch/arm/mach-msm/include/mach/uncompress.h
deleted file mode 100644
index 94324870fb04..000000000000
--- a/arch/arm/mach-msm/include/mach/uncompress.h
+++ /dev/null
@@ -1,63 +0,0 @@
1/*
2 * Copyright (C) 2007 Google, Inc.
3 * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#ifndef __ASM_ARCH_MSM_UNCOMPRESS_H
17#define __ASM_ARCH_MSM_UNCOMPRESS_H
18
19#include <asm/barrier.h>
20#include <asm/processor.h>
21#include <mach/msm_iomap.h>
22
23#define UART_CSR (*(volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x08))
24#define UART_TF (*(volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x0c))
25
26#define UART_DM_SR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x08)))
27#define UART_DM_CR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x10)))
28#define UART_DM_ISR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x14)))
29#define UART_DM_NCHAR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x40)))
30#define UART_DM_TF (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x70)))
31
32static void putc(int c)
33{
34#if defined(MSM_DEBUG_UART_PHYS)
35#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
36 /*
37 * Wait for TX_READY to be set; but skip it if we have a
38 * TX underrun.
39 */
40 if (!(UART_DM_SR & 0x08))
41 while (!(UART_DM_ISR & 0x80))
42 cpu_relax();
43
44 UART_DM_CR = 0x300;
45 UART_DM_NCHAR = 0x1;
46 UART_DM_TF = c;
47#else
48 while (!(UART_CSR & 0x04))
49 cpu_relax();
50 UART_TF = c;
51#endif
52#endif
53}
54
55static inline void flush(void)
56{
57}
58
59static inline void arch_decomp_setup(void)
60{
61}
62
63#endif
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c
index 3dc04ccaf59f..adc8971c7266 100644
--- a/arch/arm/mach-msm/io.c
+++ b/arch/arm/mach-msm/io.c
@@ -18,6 +18,7 @@
18 */ 18 */
19 19
20#include <linux/kernel.h> 20#include <linux/kernel.h>
21#include <linux/bug.h>
21#include <linux/init.h> 22#include <linux/init.h>
22#include <linux/io.h> 23#include <linux/io.h>
23#include <linux/export.h> 24#include <linux/export.h>
@@ -27,8 +28,6 @@
27#include <mach/msm_iomap.h> 28#include <mach/msm_iomap.h>
28#include <asm/mach/map.h> 29#include <asm/mach/map.h>
29 30
30#include <mach/board.h>
31
32#include "common.h" 31#include "common.h"
33 32
34#define MSM_CHIP_DEVICE_TYPE(name, chip, mem_type) { \ 33#define MSM_CHIP_DEVICE_TYPE(name, chip, mem_type) { \
@@ -52,26 +51,38 @@ static struct map_desc msm_io_desc[] __initdata = {
52 MSM_CHIP_DEVICE_TYPE(GPIO1, MSM7X00, MT_DEVICE_NONSHARED), 51 MSM_CHIP_DEVICE_TYPE(GPIO1, MSM7X00, MT_DEVICE_NONSHARED),
53 MSM_CHIP_DEVICE_TYPE(GPIO2, MSM7X00, MT_DEVICE_NONSHARED), 52 MSM_CHIP_DEVICE_TYPE(GPIO2, MSM7X00, MT_DEVICE_NONSHARED),
54 MSM_DEVICE_TYPE(CLK_CTL, MT_DEVICE_NONSHARED), 53 MSM_DEVICE_TYPE(CLK_CTL, MT_DEVICE_NONSHARED),
55#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
56 defined(CONFIG_DEBUG_MSM_UART3)
57 MSM_DEVICE_TYPE(DEBUG_UART, MT_DEVICE_NONSHARED),
58#endif
59 { 54 {
60 .virtual = (unsigned long) MSM_SHARED_RAM_BASE, 55 .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
61 .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS), 56 .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
62 .length = MSM_SHARED_RAM_SIZE, 57 .length = MSM_SHARED_RAM_SIZE,
63 .type = MT_DEVICE, 58 .type = MT_DEVICE,
64 }, 59 },
60#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
61 defined(CONFIG_DEBUG_MSM_UART3)
62 {
63 /* Must be last: virtual and pfn filled in by debug_ll_addr() */
64 .length = SZ_4K,
65 .type = MT_DEVICE_NONSHARED,
66 }
67#endif
65}; 68};
66 69
67void __init msm_map_common_io(void) 70void __init msm_map_common_io(void)
68{ 71{
72 size_t size = ARRAY_SIZE(msm_io_desc);
73
69 /* Make sure the peripheral register window is closed, since 74 /* Make sure the peripheral register window is closed, since
70 * we will use PTE flags (TEX[1]=1,B=0,C=1) to determine which 75 * we will use PTE flags (TEX[1]=1,B=0,C=1) to determine which
71 * pages are peripheral interface or not. 76 * pages are peripheral interface or not.
72 */ 77 */
73 asm("mcr p15, 0, %0, c15, c2, 4" : : "r" (0)); 78 asm("mcr p15, 0, %0, c15, c2, 4" : : "r" (0));
74 iotable_init(msm_io_desc, ARRAY_SIZE(msm_io_desc)); 79#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
80 defined(CONFIG_DEBUG_MSM_UART3)
81 debug_ll_addr(&msm_io_desc[size - 1].pfn,
82 &msm_io_desc[size - 1].virtual);
83 msm_io_desc[size - 1].pfn = __phys_to_pfn(msm_io_desc[size - 1].pfn);
84#endif
85 iotable_init(msm_io_desc, size);
75} 86}
76#endif 87#endif
77 88
@@ -87,10 +98,6 @@ static struct map_desc qsd8x50_io_desc[] __initdata = {
87 MSM_DEVICE(SCPLL), 98 MSM_DEVICE(SCPLL),
88 MSM_DEVICE(AD5), 99 MSM_DEVICE(AD5),
89 MSM_DEVICE(MDC), 100 MSM_DEVICE(MDC),
90#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
91 defined(CONFIG_DEBUG_MSM_UART3)
92 MSM_DEVICE(DEBUG_UART),
93#endif
94 { 101 {
95 .virtual = (unsigned long) MSM_SHARED_RAM_BASE, 102 .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
96 .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS), 103 .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
@@ -101,40 +108,11 @@ static struct map_desc qsd8x50_io_desc[] __initdata = {
101 108
102void __init msm_map_qsd8x50_io(void) 109void __init msm_map_qsd8x50_io(void)
103{ 110{
111 debug_ll_io_init();
104 iotable_init(qsd8x50_io_desc, ARRAY_SIZE(qsd8x50_io_desc)); 112 iotable_init(qsd8x50_io_desc, ARRAY_SIZE(qsd8x50_io_desc));
105} 113}
106#endif /* CONFIG_ARCH_QSD8X50 */ 114#endif /* CONFIG_ARCH_QSD8X50 */
107 115
108#ifdef CONFIG_ARCH_MSM8X60
109static struct map_desc msm8x60_io_desc[] __initdata = {
110 MSM_CHIP_DEVICE(TMR, MSM8X60),
111 MSM_CHIP_DEVICE(TMR0, MSM8X60),
112#ifdef CONFIG_DEBUG_MSM8660_UART
113 MSM_DEVICE(DEBUG_UART),
114#endif
115};
116
117void __init msm_map_msm8x60_io(void)
118{
119 iotable_init(msm8x60_io_desc, ARRAY_SIZE(msm8x60_io_desc));
120}
121#endif /* CONFIG_ARCH_MSM8X60 */
122
123#ifdef CONFIG_ARCH_MSM8960
124static struct map_desc msm8960_io_desc[] __initdata = {
125 MSM_CHIP_DEVICE(TMR, MSM8960),
126 MSM_CHIP_DEVICE(TMR0, MSM8960),
127#ifdef CONFIG_DEBUG_MSM8960_UART
128 MSM_DEVICE(DEBUG_UART),
129#endif
130};
131
132void __init msm_map_msm8960_io(void)
133{
134 iotable_init(msm8960_io_desc, ARRAY_SIZE(msm8960_io_desc));
135}
136#endif /* CONFIG_ARCH_MSM8960 */
137
138#ifdef CONFIG_ARCH_MSM7X30 116#ifdef CONFIG_ARCH_MSM7X30
139static struct map_desc msm7x30_io_desc[] __initdata = { 117static struct map_desc msm7x30_io_desc[] __initdata = {
140 MSM_DEVICE(VIC), 118 MSM_DEVICE(VIC),
@@ -150,10 +128,6 @@ static struct map_desc msm7x30_io_desc[] __initdata = {
150 MSM_DEVICE(SAW), 128 MSM_DEVICE(SAW),
151 MSM_DEVICE(GCC), 129 MSM_DEVICE(GCC),
152 MSM_DEVICE(TCSR), 130 MSM_DEVICE(TCSR),
153#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
154 defined(CONFIG_DEBUG_MSM_UART3)
155 MSM_DEVICE(DEBUG_UART),
156#endif
157 { 131 {
158 .virtual = (unsigned long) MSM_SHARED_RAM_BASE, 132 .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
159 .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS), 133 .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
@@ -164,10 +138,12 @@ static struct map_desc msm7x30_io_desc[] __initdata = {
164 138
165void __init msm_map_msm7x30_io(void) 139void __init msm_map_msm7x30_io(void)
166{ 140{
141 debug_ll_io_init();
167 iotable_init(msm7x30_io_desc, ARRAY_SIZE(msm7x30_io_desc)); 142 iotable_init(msm7x30_io_desc, ARRAY_SIZE(msm7x30_io_desc));
168} 143}
169#endif /* CONFIG_ARCH_MSM7X30 */ 144#endif /* CONFIG_ARCH_MSM7X30 */
170 145
146#ifdef CONFIG_ARCH_MSM7X00A
171void __iomem *__msm_ioremap_caller(phys_addr_t phys_addr, size_t size, 147void __iomem *__msm_ioremap_caller(phys_addr_t phys_addr, size_t size,
172 unsigned int mtype, void *caller) 148 unsigned int mtype, void *caller)
173{ 149{
@@ -182,3 +158,4 @@ void __iomem *__msm_ioremap_caller(phys_addr_t phys_addr, size_t size,
182 158
183 return __arm_ioremap_caller(phys_addr, size, mtype, caller); 159 return __arm_ioremap_caller(phys_addr, size, mtype, caller);
184} 160}
161#endif
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index a7afbacae61a..696fb73296d0 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -233,15 +233,8 @@ err:
233} 233}
234 234
235#ifdef CONFIG_OF 235#ifdef CONFIG_OF
236static const struct of_device_id msm_timer_match[] __initconst = { 236static void __init msm_dt_timer_init(struct device_node *np)
237 { .compatible = "qcom,kpss-timer" },
238 { .compatible = "qcom,scss-timer" },
239 { },
240};
241
242void __init msm_dt_timer_init(void)
243{ 237{
244 struct device_node *np;
245 u32 freq; 238 u32 freq;
246 int irq; 239 int irq;
247 struct resource res; 240 struct resource res;
@@ -249,12 +242,6 @@ void __init msm_dt_timer_init(void)
249 void __iomem *base; 242 void __iomem *base;
250 void __iomem *cpu0_base; 243 void __iomem *cpu0_base;
251 244
252 np = of_find_matching_node(NULL, msm_timer_match);
253 if (!np) {
254 pr_err("Can't find msm timer DT node\n");
255 return;
256 }
257
258 base = of_iomap(np, 0); 245 base = of_iomap(np, 0);
259 if (!base) { 246 if (!base) {
260 pr_err("Failed to map event base\n"); 247 pr_err("Failed to map event base\n");
@@ -297,6 +284,8 @@ void __init msm_dt_timer_init(void)
297 284
298 msm_timer_init(freq, 32, irq, !!percpu_offset); 285 msm_timer_init(freq, 32, irq, !!percpu_offset);
299} 286}
287CLOCKSOURCE_OF_DECLARE(kpss_timer, "qcom,kpss-timer", msm_dt_timer_init);
288CLOCKSOURCE_OF_DECLARE(scss_timer, "qcom,scss-timer", msm_dt_timer_init);
300#endif 289#endif
301 290
302static int __init msm_timer_map(phys_addr_t addr, u32 event, u32 source, 291static int __init msm_timer_map(phys_addr_t addr, u32 event, u32 source,
diff --git a/drivers/iommu/msm_iommu.c b/drivers/iommu/msm_iommu.c
index 8ab4f41090af..f5ff657f49fa 100644
--- a/drivers/iommu/msm_iommu.c
+++ b/drivers/iommu/msm_iommu.c
@@ -31,8 +31,8 @@
31#include <asm/cacheflush.h> 31#include <asm/cacheflush.h>
32#include <asm/sizes.h> 32#include <asm/sizes.h>
33 33
34#include <mach/iommu_hw-8xxx.h> 34#include "msm_iommu_hw-8xxx.h"
35#include <mach/iommu.h> 35#include "msm_iommu.h"
36 36
37#define MRC(reg, processor, op1, crn, crm, op2) \ 37#define MRC(reg, processor, op1, crn, crm, op2) \
38__asm__ __volatile__ ( \ 38__asm__ __volatile__ ( \
diff --git a/arch/arm/mach-msm/include/mach/iommu.h b/drivers/iommu/msm_iommu.h
index 5c7c955e6d25..5c7c955e6d25 100644
--- a/arch/arm/mach-msm/include/mach/iommu.h
+++ b/drivers/iommu/msm_iommu.h
diff --git a/drivers/iommu/msm_iommu_dev.c b/drivers/iommu/msm_iommu_dev.c
index 6ba351477132..0a1c9626aa9e 100644
--- a/drivers/iommu/msm_iommu_dev.c
+++ b/drivers/iommu/msm_iommu_dev.c
@@ -27,8 +27,8 @@
27#include <linux/err.h> 27#include <linux/err.h>
28#include <linux/slab.h> 28#include <linux/slab.h>
29 29
30#include <mach/iommu_hw-8xxx.h> 30#include "msm_iommu_hw-8xxx.h"
31#include <mach/iommu.h> 31#include "msm_iommu.h"
32 32
33struct iommu_ctx_iter_data { 33struct iommu_ctx_iter_data {
34 /* input */ 34 /* input */
diff --git a/arch/arm/mach-msm/include/mach/iommu_hw-8xxx.h b/drivers/iommu/msm_iommu_hw-8xxx.h
index fc160101dead..fc160101dead 100644
--- a/arch/arm/mach-msm/include/mach/iommu_hw-8xxx.h
+++ b/drivers/iommu/msm_iommu_hw-8xxx.h
diff --git a/drivers/video/msm/msm_fb.c b/drivers/video/msm/msm_fb.c
index ec08a9ec377d..1374803fbcd9 100644
--- a/drivers/video/msm/msm_fb.c
+++ b/drivers/video/msm/msm_fb.c
@@ -26,7 +26,6 @@
26#include <linux/io.h> 26#include <linux/io.h>
27#include <linux/uaccess.h> 27#include <linux/uaccess.h>
28#include <linux/platform_data/video-msm_fb.h> 28#include <linux/platform_data/video-msm_fb.h>
29#include <mach/board.h>
30#include <linux/workqueue.h> 29#include <linux/workqueue.h>
31#include <linux/clk.h> 30#include <linux/clk.h>
32#include <linux/debugfs.h> 31#include <linux/debugfs.h>