diff options
author | Oder Chiou <oder_chiou@realtek.com> | 2015-01-07 21:31:05 -0500 |
---|---|---|
committer | Mark Brown <broonie@kernel.org> | 2015-01-09 12:18:28 -0500 |
commit | bdfbf2550d85b0e645a0bb9b3abd3b0a5448eacf (patch) | |
tree | cca5f3370c414daac80250b44deb56c92db1ef7f | |
parent | 97bf6af1f928216fd6c5a66e8a57bfa95a659672 (diff) |
ASoC: rt5677: Modify the behavior that updates the PLL parameter.
The patch modified the behavior that updates the PLL parameter. It set the
update bit before the PLL power up.
Signed-off-by: Oder Chiou <oder_chiou@realtek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r-- | sound/soc/codecs/rt5677.c | 18 |
1 files changed, 14 insertions, 4 deletions
diff --git a/sound/soc/codecs/rt5677.c b/sound/soc/codecs/rt5677.c index 81fe1464d268..8018c9951132 100644 --- a/sound/soc/codecs/rt5677.c +++ b/sound/soc/codecs/rt5677.c | |||
@@ -2082,10 +2082,14 @@ static int rt5677_set_pll1_event(struct snd_soc_dapm_widget *w, | |||
2082 | struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); | 2082 | struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); |
2083 | 2083 | ||
2084 | switch (event) { | 2084 | switch (event) { |
2085 | case SND_SOC_DAPM_POST_PMU: | 2085 | case SND_SOC_DAPM_PRE_PMU: |
2086 | regmap_update_bits(rt5677->regmap, RT5677_PLL1_CTRL2, 0x2, 0x2); | 2086 | regmap_update_bits(rt5677->regmap, RT5677_PLL1_CTRL2, 0x2, 0x2); |
2087 | break; | ||
2088 | |||
2089 | case SND_SOC_DAPM_POST_PMU: | ||
2087 | regmap_update_bits(rt5677->regmap, RT5677_PLL1_CTRL2, 0x2, 0x0); | 2090 | regmap_update_bits(rt5677->regmap, RT5677_PLL1_CTRL2, 0x2, 0x0); |
2088 | break; | 2091 | break; |
2092 | |||
2089 | default: | 2093 | default: |
2090 | return 0; | 2094 | return 0; |
2091 | } | 2095 | } |
@@ -2100,10 +2104,14 @@ static int rt5677_set_pll2_event(struct snd_soc_dapm_widget *w, | |||
2100 | struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); | 2104 | struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); |
2101 | 2105 | ||
2102 | switch (event) { | 2106 | switch (event) { |
2103 | case SND_SOC_DAPM_POST_PMU: | 2107 | case SND_SOC_DAPM_PRE_PMU: |
2104 | regmap_update_bits(rt5677->regmap, RT5677_PLL2_CTRL2, 0x2, 0x2); | 2108 | regmap_update_bits(rt5677->regmap, RT5677_PLL2_CTRL2, 0x2, 0x2); |
2109 | break; | ||
2110 | |||
2111 | case SND_SOC_DAPM_POST_PMU: | ||
2105 | regmap_update_bits(rt5677->regmap, RT5677_PLL2_CTRL2, 0x2, 0x0); | 2112 | regmap_update_bits(rt5677->regmap, RT5677_PLL2_CTRL2, 0x2, 0x0); |
2106 | break; | 2113 | break; |
2114 | |||
2107 | default: | 2115 | default: |
2108 | return 0; | 2116 | return 0; |
2109 | } | 2117 | } |
@@ -2211,9 +2219,11 @@ static int rt5677_vref_event(struct snd_soc_dapm_widget *w, | |||
2211 | 2219 | ||
2212 | static const struct snd_soc_dapm_widget rt5677_dapm_widgets[] = { | 2220 | static const struct snd_soc_dapm_widget rt5677_dapm_widgets[] = { |
2213 | SND_SOC_DAPM_SUPPLY("PLL1", RT5677_PWR_ANLG2, RT5677_PWR_PLL1_BIT, | 2221 | SND_SOC_DAPM_SUPPLY("PLL1", RT5677_PWR_ANLG2, RT5677_PWR_PLL1_BIT, |
2214 | 0, rt5677_set_pll1_event, SND_SOC_DAPM_POST_PMU), | 2222 | 0, rt5677_set_pll1_event, SND_SOC_DAPM_PRE_PMU | |
2223 | SND_SOC_DAPM_POST_PMU), | ||
2215 | SND_SOC_DAPM_SUPPLY("PLL2", RT5677_PWR_ANLG2, RT5677_PWR_PLL2_BIT, | 2224 | SND_SOC_DAPM_SUPPLY("PLL2", RT5677_PWR_ANLG2, RT5677_PWR_PLL2_BIT, |
2216 | 0, rt5677_set_pll2_event, SND_SOC_DAPM_POST_PMU), | 2225 | 0, rt5677_set_pll2_event, SND_SOC_DAPM_PRE_PMU | |
2226 | SND_SOC_DAPM_POST_PMU), | ||
2217 | 2227 | ||
2218 | /* Input Side */ | 2228 | /* Input Side */ |
2219 | /* micbias */ | 2229 | /* micbias */ |