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authorHariprasad Shenai <hariprasad@chelsio.com>2015-01-09 00:38:16 -0500
committerDavid S. Miller <davem@davemloft.net>2015-01-12 16:19:34 -0500
commitbdc590b99f6002faeb12c1c810cbbf8ac4481f70 (patch)
tree99f99c26c9cdea1a21d6ce7b0d01fb5ceaef9b0f
parent6c53e938a81c0b31f9f6a31690c3be601aa8fa60 (diff)
iw_cxgb4/cxgb4/cxgb4vf/cxgb4i/csiostor: Cleanup register defines/macros related to all other cpl messages
This patch cleanups all other macros/register define related to CPL messages that are defined in t4_msg.h and the affected files Signed-off-by: Anish Bhatt <anish@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/infiniband/hw/cxgb4/cm.c20
-rw-r--r--drivers/infiniband/hw/cxgb4/mem.c4
-rw-r--r--drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c8
-rw-r--r--drivers/net/ethernet/chelsio/cxgb4/l2t.c2
-rw-r--r--drivers/net/ethernet/chelsio/cxgb4/sge.c9
-rw-r--r--drivers/net/ethernet/chelsio/cxgb4/t4_msg.h199
-rw-r--r--drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c2
-rw-r--r--drivers/net/ethernet/chelsio/cxgb4vf/sge.c6
-rw-r--r--drivers/scsi/csiostor/csio_lnode.c2
-rw-r--r--drivers/scsi/csiostor/csio_scsi.c4
-rw-r--r--drivers/scsi/cxgbi/cxgb4i/cxgb4i.c6
11 files changed, 173 insertions, 89 deletions
diff --git a/drivers/infiniband/hw/cxgb4/cm.c b/drivers/infiniband/hw/cxgb4/cm.c
index 87872795c94f..694e03075b4b 100644
--- a/drivers/infiniband/hw/cxgb4/cm.c
+++ b/drivers/infiniband/hw/cxgb4/cm.c
@@ -3501,19 +3501,19 @@ static void build_cpl_pass_accept_req(struct sk_buff *skb, int stid , u8 tos)
3501 req = (struct cpl_pass_accept_req *)__skb_push(skb, sizeof(*req)); 3501 req = (struct cpl_pass_accept_req *)__skb_push(skb, sizeof(*req));
3502 memset(req, 0, sizeof(*req)); 3502 memset(req, 0, sizeof(*req));
3503 req->l2info = cpu_to_be16(V_SYN_INTF(intf) | 3503 req->l2info = cpu_to_be16(V_SYN_INTF(intf) |
3504 V_SYN_MAC_IDX(G_RX_MACIDX( 3504 V_SYN_MAC_IDX(RX_MACIDX_G(
3505 (__force int) htonl(l2info))) | 3505 (__force int) htonl(l2info))) |
3506 F_SYN_XACT_MATCH); 3506 F_SYN_XACT_MATCH);
3507 eth_hdr_len = is_t4(dev->rdev.lldi.adapter_type) ? 3507 eth_hdr_len = is_t4(dev->rdev.lldi.adapter_type) ?
3508 G_RX_ETHHDR_LEN((__force int) htonl(l2info)) : 3508 RX_ETHHDR_LEN_G((__force int)htonl(l2info)) :
3509 G_RX_T5_ETHHDR_LEN((__force int) htonl(l2info)); 3509 RX_T5_ETHHDR_LEN_G((__force int)htonl(l2info));
3510 req->hdr_len = cpu_to_be32(V_SYN_RX_CHAN(G_RX_CHAN( 3510 req->hdr_len = cpu_to_be32(V_SYN_RX_CHAN(RX_CHAN_G(
3511 (__force int) htonl(l2info))) | 3511 (__force int) htonl(l2info))) |
3512 V_TCP_HDR_LEN(G_RX_TCPHDR_LEN( 3512 V_TCP_HDR_LEN(RX_TCPHDR_LEN_G(
3513 (__force int) htons(hdr_len))) | 3513 (__force int) htons(hdr_len))) |
3514 V_IP_HDR_LEN(G_RX_IPHDR_LEN( 3514 V_IP_HDR_LEN(RX_IPHDR_LEN_G(
3515 (__force int) htons(hdr_len))) | 3515 (__force int) htons(hdr_len))) |
3516 V_ETH_HDR_LEN(G_RX_ETHHDR_LEN(eth_hdr_len))); 3516 V_ETH_HDR_LEN(RX_ETHHDR_LEN_G(eth_hdr_len)));
3517 req->vlan = (__force __be16) vlantag; 3517 req->vlan = (__force __be16) vlantag;
3518 req->len = (__force __be16) len; 3518 req->len = (__force __be16) len;
3519 req->tos_stid = cpu_to_be32(PASS_OPEN_TID_V(stid) | 3519 req->tos_stid = cpu_to_be32(PASS_OPEN_TID_V(stid) |
@@ -3613,7 +3613,7 @@ static int rx_pkt(struct c4iw_dev *dev, struct sk_buff *skb)
3613 struct neighbour *neigh; 3613 struct neighbour *neigh;
3614 3614
3615 /* Drop all non-SYN packets */ 3615 /* Drop all non-SYN packets */
3616 if (!(cpl->l2info & cpu_to_be32(F_RXF_SYN))) 3616 if (!(cpl->l2info & cpu_to_be32(RXF_SYN_F)))
3617 goto reject; 3617 goto reject;
3618 3618
3619 /* 3619 /*
@@ -3635,8 +3635,8 @@ static int rx_pkt(struct c4iw_dev *dev, struct sk_buff *skb)
3635 } 3635 }
3636 3636
3637 eth_hdr_len = is_t4(dev->rdev.lldi.adapter_type) ? 3637 eth_hdr_len = is_t4(dev->rdev.lldi.adapter_type) ?
3638 G_RX_ETHHDR_LEN(htonl(cpl->l2info)) : 3638 RX_ETHHDR_LEN_G(htonl(cpl->l2info)) :
3639 G_RX_T5_ETHHDR_LEN(htonl(cpl->l2info)); 3639 RX_T5_ETHHDR_LEN_G(htonl(cpl->l2info));
3640 if (eth_hdr_len == ETH_HLEN) { 3640 if (eth_hdr_len == ETH_HLEN) {
3641 eh = (struct ethhdr *)(req + 1); 3641 eh = (struct ethhdr *)(req + 1);
3642 iph = (struct iphdr *)(eh + 1); 3642 iph = (struct iphdr *)(eh + 1);
diff --git a/drivers/infiniband/hw/cxgb4/mem.c b/drivers/infiniband/hw/cxgb4/mem.c
index cb43c2299ac0..b9dc9fc6be66 100644
--- a/drivers/infiniband/hw/cxgb4/mem.c
+++ b/drivers/infiniband/hw/cxgb4/mem.c
@@ -86,14 +86,14 @@ static int _c4iw_write_mem_dma_aligned(struct c4iw_rdev *rdev, u32 addr,
86 req->wr.wr_lo = wait ? (__force __be64)(unsigned long) &wr_wait : 0L; 86 req->wr.wr_lo = wait ? (__force __be64)(unsigned long) &wr_wait : 0L;
87 req->wr.wr_mid = cpu_to_be32(FW_WR_LEN16_V(DIV_ROUND_UP(wr_len, 16))); 87 req->wr.wr_mid = cpu_to_be32(FW_WR_LEN16_V(DIV_ROUND_UP(wr_len, 16)));
88 req->cmd = cpu_to_be32(ULPTX_CMD_V(ULP_TX_MEM_WRITE)); 88 req->cmd = cpu_to_be32(ULPTX_CMD_V(ULP_TX_MEM_WRITE));
89 req->cmd |= cpu_to_be32(V_T5_ULP_MEMIO_ORDER(1)); 89 req->cmd |= cpu_to_be32(T5_ULP_MEMIO_ORDER_V(1));
90 req->dlen = cpu_to_be32(ULP_MEMIO_DATA_LEN_V(len>>5)); 90 req->dlen = cpu_to_be32(ULP_MEMIO_DATA_LEN_V(len>>5));
91 req->len16 = cpu_to_be32(DIV_ROUND_UP(wr_len-sizeof(req->wr), 16)); 91 req->len16 = cpu_to_be32(DIV_ROUND_UP(wr_len-sizeof(req->wr), 16));
92 req->lock_addr = cpu_to_be32(ULP_MEMIO_ADDR_V(addr)); 92 req->lock_addr = cpu_to_be32(ULP_MEMIO_ADDR_V(addr));
93 93
94 sgl = (struct ulptx_sgl *)(req + 1); 94 sgl = (struct ulptx_sgl *)(req + 1);
95 sgl->cmd_nsge = cpu_to_be32(ULPTX_CMD_V(ULP_TX_SC_DSGL) | 95 sgl->cmd_nsge = cpu_to_be32(ULPTX_CMD_V(ULP_TX_SC_DSGL) |
96 ULPTX_NSGE(1)); 96 ULPTX_NSGE_V(1));
97 sgl->len0 = cpu_to_be32(len); 97 sgl->len0 = cpu_to_be32(len);
98 sgl->addr0 = cpu_to_be64(data); 98 sgl->addr0 = cpu_to_be64(data);
99 99
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
index 2897f956bb21..23ae0b7a9019 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
@@ -672,7 +672,7 @@ static void filter_rpl(struct adapter *adap, const struct cpl_set_tcb_rpl *rpl)
672 if (idx >= adap->tids.ftid_base && nidx < 672 if (idx >= adap->tids.ftid_base && nidx <
673 (adap->tids.nftids + adap->tids.nsftids)) { 673 (adap->tids.nftids + adap->tids.nsftids)) {
674 idx = nidx; 674 idx = nidx;
675 ret = GET_TCB_COOKIE(rpl->cookie); 675 ret = TCB_COOKIE_G(rpl->cookie);
676 f = &adap->tids.ftid_tab[idx]; 676 f = &adap->tids.ftid_tab[idx];
677 677
678 if (ret == FW_FILTER_WR_FLT_DELETED) { 678 if (ret == FW_FILTER_WR_FLT_DELETED) {
@@ -724,7 +724,7 @@ static int fwevtq_handler(struct sge_rspq *q, const __be64 *rsp,
724 724
725 if (likely(opcode == CPL_SGE_EGR_UPDATE)) { 725 if (likely(opcode == CPL_SGE_EGR_UPDATE)) {
726 const struct cpl_sge_egr_update *p = (void *)rsp; 726 const struct cpl_sge_egr_update *p = (void *)rsp;
727 unsigned int qid = EGR_QID(ntohl(p->opcode_qid)); 727 unsigned int qid = EGR_QID_G(ntohl(p->opcode_qid));
728 struct sge_txq *txq; 728 struct sge_txq *txq;
729 729
730 txq = q->adap->sge.egr_map[qid - q->adap->sge.egr_start]; 730 txq = q->adap->sge.egr_map[qid - q->adap->sge.egr_start];
@@ -3483,8 +3483,8 @@ int cxgb4_remove_server(const struct net_device *dev, unsigned int stid,
3483 req = (struct cpl_close_listsvr_req *)__skb_put(skb, sizeof(*req)); 3483 req = (struct cpl_close_listsvr_req *)__skb_put(skb, sizeof(*req));
3484 INIT_TP_WR(req, 0); 3484 INIT_TP_WR(req, 0);
3485 OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_CLOSE_LISTSRV_REQ, stid)); 3485 OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_CLOSE_LISTSRV_REQ, stid));
3486 req->reply_ctrl = htons(NO_REPLY(0) | (ipv6 ? LISTSVR_IPV6(1) : 3486 req->reply_ctrl = htons(NO_REPLY_V(0) | (ipv6 ? LISTSVR_IPV6_V(1) :
3487 LISTSVR_IPV6(0)) | QUEUENO(queue)); 3487 LISTSVR_IPV6_V(0)) | QUEUENO_V(queue));
3488 ret = t4_mgmt_tx(adap, skb); 3488 ret = t4_mgmt_tx(adap, skb);
3489 return net_xmit_eval(ret); 3489 return net_xmit_eval(ret);
3490} 3490}
diff --git a/drivers/net/ethernet/chelsio/cxgb4/l2t.c b/drivers/net/ethernet/chelsio/cxgb4/l2t.c
index dea984bbdb99..252efc29321f 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/l2t.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/l2t.c
@@ -152,7 +152,7 @@ static int write_l2e(struct adapter *adap, struct l2t_entry *e, int sync)
152 OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_L2T_WRITE_REQ, 152 OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_L2T_WRITE_REQ,
153 e->idx | (sync ? F_SYNC_WR : 0) | 153 e->idx | (sync ? F_SYNC_WR : 0) |
154 TID_QID_V(adap->sge.fw_evtq.abs_id))); 154 TID_QID_V(adap->sge.fw_evtq.abs_id)));
155 req->params = htons(L2T_W_PORT(e->lport) | L2T_W_NOREPLY(!sync)); 155 req->params = htons(L2T_W_PORT_V(e->lport) | L2T_W_NOREPLY_V(!sync));
156 req->l2t_idx = htons(e->idx); 156 req->l2t_idx = htons(e->idx);
157 req->vlan = htons(e->vlan); 157 req->vlan = htons(e->vlan);
158 if (e->neigh && !(e->neigh->dev->flags & IFF_LOOPBACK)) 158 if (e->neigh && !(e->neigh->dev->flags & IFF_LOOPBACK))
diff --git a/drivers/net/ethernet/chelsio/cxgb4/sge.c b/drivers/net/ethernet/chelsio/cxgb4/sge.c
index d7c301c77060..a79fa6a0f5c5 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/sge.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/sge.c
@@ -821,7 +821,8 @@ static void write_sgl(const struct sk_buff *skb, struct sge_txq *q,
821 sgl->addr0 = cpu_to_be64(addr[1]); 821 sgl->addr0 = cpu_to_be64(addr[1]);
822 } 822 }
823 823
824 sgl->cmd_nsge = htonl(ULPTX_CMD_V(ULP_TX_SC_DSGL) | ULPTX_NSGE(nfrags)); 824 sgl->cmd_nsge = htonl(ULPTX_CMD_V(ULP_TX_SC_DSGL) |
825 ULPTX_NSGE_V(nfrags));
825 if (likely(--nfrags == 0)) 826 if (likely(--nfrags == 0))
826 return; 827 return;
827 /* 828 /*
@@ -1761,7 +1762,7 @@ int t4_ethrx_handler(struct sge_rspq *q, const __be64 *rsp,
1761 pkt = (const struct cpl_rx_pkt *)rsp; 1762 pkt = (const struct cpl_rx_pkt *)rsp;
1762 csum_ok = pkt->csum_calc && !pkt->err_vec && 1763 csum_ok = pkt->csum_calc && !pkt->err_vec &&
1763 (q->netdev->features & NETIF_F_RXCSUM); 1764 (q->netdev->features & NETIF_F_RXCSUM);
1764 if ((pkt->l2info & htonl(RXF_TCP)) && 1765 if ((pkt->l2info & htonl(RXF_TCP_F)) &&
1765 (q->netdev->features & NETIF_F_GRO) && csum_ok && !pkt->ip_frag) { 1766 (q->netdev->features & NETIF_F_GRO) && csum_ok && !pkt->ip_frag) {
1766 do_gro(rxq, si, pkt); 1767 do_gro(rxq, si, pkt);
1767 return 0; 1768 return 0;
@@ -1783,11 +1784,11 @@ int t4_ethrx_handler(struct sge_rspq *q, const __be64 *rsp,
1783 1784
1784 rxq->stats.pkts++; 1785 rxq->stats.pkts++;
1785 1786
1786 if (csum_ok && (pkt->l2info & htonl(RXF_UDP | RXF_TCP))) { 1787 if (csum_ok && (pkt->l2info & htonl(RXF_UDP_F | RXF_TCP_F))) {
1787 if (!pkt->ip_frag) { 1788 if (!pkt->ip_frag) {
1788 skb->ip_summed = CHECKSUM_UNNECESSARY; 1789 skb->ip_summed = CHECKSUM_UNNECESSARY;
1789 rxq->stats.rx_cso++; 1790 rxq->stats.rx_cso++;
1790 } else if (pkt->l2info & htonl(RXF_IP)) { 1791 } else if (pkt->l2info & htonl(RXF_IP_F)) {
1791 __sum16 c = (__force __sum16)pkt->csum; 1792 __sum16 c = (__force __sum16)pkt->csum;
1792 skb->csum = csum_unfold(c); 1793 skb->csum = csum_unfold(c);
1793 skb->ip_summed = CHECKSUM_COMPLETE; 1794 skb->ip_summed = CHECKSUM_COMPLETE;
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_msg.h b/drivers/net/ethernet/chelsio/cxgb4/t4_msg.h
index 15e72063fc95..0fb975e258b3 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/t4_msg.h
+++ b/drivers/net/ethernet/chelsio/cxgb4/t4_msg.h
@@ -518,24 +518,39 @@ struct cpl_get_tcb {
518 WR_HDR; 518 WR_HDR;
519 union opcode_tid ot; 519 union opcode_tid ot;
520 __be16 reply_ctrl; 520 __be16 reply_ctrl;
521#define QUEUENO(x) ((x) << 0)
522#define REPLY_CHAN(x) ((x) << 14)
523#define NO_REPLY(x) ((x) << 15)
524 __be16 cookie; 521 __be16 cookie;
525}; 522};
526 523
524/* cpl_get_tcb.reply_ctrl fields */
525#define QUEUENO_S 0
526#define QUEUENO_V(x) ((x) << QUEUENO_S)
527
528#define REPLY_CHAN_S 14
529#define REPLY_CHAN_V(x) ((x) << REPLY_CHAN_S)
530#define REPLY_CHAN_F REPLY_CHAN_V(1U)
531
532#define NO_REPLY_S 15
533#define NO_REPLY_V(x) ((x) << NO_REPLY_S)
534#define NO_REPLY_F NO_REPLY_V(1U)
535
527struct cpl_set_tcb_field { 536struct cpl_set_tcb_field {
528 WR_HDR; 537 WR_HDR;
529 union opcode_tid ot; 538 union opcode_tid ot;
530 __be16 reply_ctrl; 539 __be16 reply_ctrl;
531 __be16 word_cookie; 540 __be16 word_cookie;
532#define TCB_WORD(x) ((x) << 0)
533#define TCB_COOKIE(x) ((x) << 5)
534#define GET_TCB_COOKIE(x) (((x) >> 5) & 7)
535 __be64 mask; 541 __be64 mask;
536 __be64 val; 542 __be64 val;
537}; 543};
538 544
545/* cpl_set_tcb_field.word_cookie fields */
546#define TCB_WORD_S 0
547#define TCB_WORD(x) ((x) << TCB_WORD_S)
548
549#define TCB_COOKIE_S 5
550#define TCB_COOKIE_M 0x7
551#define TCB_COOKIE_V(x) ((x) << TCB_COOKIE_S)
552#define TCB_COOKIE_G(x) (((x) >> TCB_COOKIE_S) & TCB_COOKIE_M)
553
539struct cpl_set_tcb_rpl { 554struct cpl_set_tcb_rpl {
540 union opcode_tid ot; 555 union opcode_tid ot;
541 __be16 rsvd; 556 __be16 rsvd;
@@ -562,10 +577,14 @@ struct cpl_close_listsvr_req {
562 WR_HDR; 577 WR_HDR;
563 union opcode_tid ot; 578 union opcode_tid ot;
564 __be16 reply_ctrl; 579 __be16 reply_ctrl;
565#define LISTSVR_IPV6(x) ((x) << 14)
566 __be16 rsvd; 580 __be16 rsvd;
567}; 581};
568 582
583/* additional cpl_close_listsvr_req.reply_ctrl field */
584#define LISTSVR_IPV6_S 14
585#define LISTSVR_IPV6_V(x) ((x) << LISTSVR_IPV6_S)
586#define LISTSVR_IPV6_F LISTSVR_IPV6_V(1U)
587
569struct cpl_close_listsvr_rpl { 588struct cpl_close_listsvr_rpl {
570 union opcode_tid ot; 589 union opcode_tid ot;
571 u8 rsvd[3]; 590 u8 rsvd[3];
@@ -661,6 +680,34 @@ struct cpl_tx_pkt_lso_core {
661 /* encapsulated CPL (TX_PKT, TX_PKT_XT or TX_DATA) follows here */ 680 /* encapsulated CPL (TX_PKT, TX_PKT_XT or TX_DATA) follows here */
662}; 681};
663 682
683/* cpl_tx_pkt_lso_core.lso_ctrl fields */
684#define LSO_TCPHDR_LEN_S 0
685#define LSO_TCPHDR_LEN_V(x) ((x) << LSO_TCPHDR_LEN_S)
686
687#define LSO_IPHDR_LEN_S 4
688#define LSO_IPHDR_LEN_V(x) ((x) << LSO_IPHDR_LEN_S)
689
690#define LSO_ETHHDR_LEN_S 16
691#define LSO_ETHHDR_LEN_V(x) ((x) << LSO_ETHHDR_LEN_S)
692
693#define LSO_IPV6_S 20
694#define LSO_IPV6_V(x) ((x) << LSO_IPV6_S)
695#define LSO_IPV6_F LSO_IPV6_V(1U)
696
697#define LSO_LAST_SLICE_S 22
698#define LSO_LAST_SLICE_V(x) ((x) << LSO_LAST_SLICE_S)
699#define LSO_LAST_SLICE_F LSO_LAST_SLICE_V(1U)
700
701#define LSO_FIRST_SLICE_S 23
702#define LSO_FIRST_SLICE_V(x) ((x) << LSO_FIRST_SLICE_S)
703#define LSO_FIRST_SLICE_F LSO_FIRST_SLICE_V(1U)
704
705#define LSO_OPCODE_S 24
706#define LSO_OPCODE_V(x) ((x) << LSO_OPCODE_S)
707
708#define LSO_T5_XFER_SIZE_S 0
709#define LSO_T5_XFER_SIZE_V(x) ((x) << LSO_T5_XFER_SIZE_S)
710
664struct cpl_tx_pkt_lso { 711struct cpl_tx_pkt_lso {
665 WR_HDR; 712 WR_HDR;
666 struct cpl_tx_pkt_lso_core c; 713 struct cpl_tx_pkt_lso_core c;
@@ -670,8 +717,6 @@ struct cpl_tx_pkt_lso {
670struct cpl_iscsi_hdr { 717struct cpl_iscsi_hdr {
671 union opcode_tid ot; 718 union opcode_tid ot;
672 __be16 pdu_len_ddp; 719 __be16 pdu_len_ddp;
673#define ISCSI_PDU_LEN(x) ((x) & 0x7FFF)
674#define ISCSI_DDP (1 << 15)
675 __be16 len; 720 __be16 len;
676 __be32 seq; 721 __be32 seq;
677 __be16 urg; 722 __be16 urg;
@@ -679,6 +724,16 @@ struct cpl_iscsi_hdr {
679 u8 status; 724 u8 status;
680}; 725};
681 726
727/* cpl_iscsi_hdr.pdu_len_ddp fields */
728#define ISCSI_PDU_LEN_S 0
729#define ISCSI_PDU_LEN_M 0x7FFF
730#define ISCSI_PDU_LEN_V(x) ((x) << ISCSI_PDU_LEN_S)
731#define ISCSI_PDU_LEN_G(x) (((x) >> ISCSI_PDU_LEN_S) & ISCSI_PDU_LEN_M)
732
733#define ISCSI_DDP_S 15
734#define ISCSI_DDP_V(x) ((x) << ISCSI_DDP_S)
735#define ISCSI_DDP_F ISCSI_DDP_V(1U)
736
682struct cpl_rx_data { 737struct cpl_rx_data {
683 union opcode_tid ot; 738 union opcode_tid ot;
684 __be16 rsvd; 739 __be16 rsvd;
@@ -735,49 +790,61 @@ struct cpl_rx_pkt {
735 __be16 vlan; 790 __be16 vlan;
736 __be16 len; 791 __be16 len;
737 __be32 l2info; 792 __be32 l2info;
738#define RXF_UDP (1 << 22)
739#define RXF_TCP (1 << 23)
740#define RXF_IP (1 << 24)
741#define RXF_IP6 (1 << 25)
742 __be16 hdr_len; 793 __be16 hdr_len;
743 __be16 err_vec; 794 __be16 err_vec;
744}; 795};
745 796
797#define RXF_UDP_S 22
798#define RXF_UDP_V(x) ((x) << RXF_UDP_S)
799#define RXF_UDP_F RXF_UDP_V(1U)
800
801#define RXF_TCP_S 23
802#define RXF_TCP_V(x) ((x) << RXF_TCP_S)
803#define RXF_TCP_F RXF_TCP_V(1U)
804
805#define RXF_IP_S 24
806#define RXF_IP_V(x) ((x) << RXF_IP_S)
807#define RXF_IP_F RXF_IP_V(1U)
808
809#define RXF_IP6_S 25
810#define RXF_IP6_V(x) ((x) << RXF_IP6_S)
811#define RXF_IP6_F RXF_IP6_V(1U)
812
746/* rx_pkt.l2info fields */ 813/* rx_pkt.l2info fields */
747#define S_RX_ETHHDR_LEN 0 814#define RX_ETHHDR_LEN_S 0
748#define M_RX_ETHHDR_LEN 0x1F 815#define RX_ETHHDR_LEN_M 0x1F
749#define V_RX_ETHHDR_LEN(x) ((x) << S_RX_ETHHDR_LEN) 816#define RX_ETHHDR_LEN_V(x) ((x) << RX_ETHHDR_LEN_S)
750#define G_RX_ETHHDR_LEN(x) (((x) >> S_RX_ETHHDR_LEN) & M_RX_ETHHDR_LEN) 817#define RX_ETHHDR_LEN_G(x) (((x) >> RX_ETHHDR_LEN_S) & RX_ETHHDR_LEN_M)
751 818
752#define S_RX_T5_ETHHDR_LEN 0 819#define RX_T5_ETHHDR_LEN_S 0
753#define M_RX_T5_ETHHDR_LEN 0x3F 820#define RX_T5_ETHHDR_LEN_M 0x3F
754#define V_RX_T5_ETHHDR_LEN(x) ((x) << S_RX_T5_ETHHDR_LEN) 821#define RX_T5_ETHHDR_LEN_V(x) ((x) << RX_T5_ETHHDR_LEN_S)
755#define G_RX_T5_ETHHDR_LEN(x) (((x) >> S_RX_T5_ETHHDR_LEN) & M_RX_T5_ETHHDR_LEN) 822#define RX_T5_ETHHDR_LEN_G(x) (((x) >> RX_T5_ETHHDR_LEN_S) & RX_T5_ETHHDR_LEN_M)
756 823
757#define S_RX_MACIDX 8 824#define RX_MACIDX_S 8
758#define M_RX_MACIDX 0x1FF 825#define RX_MACIDX_M 0x1FF
759#define V_RX_MACIDX(x) ((x) << S_RX_MACIDX) 826#define RX_MACIDX_V(x) ((x) << RX_MACIDX_S)
760#define G_RX_MACIDX(x) (((x) >> S_RX_MACIDX) & M_RX_MACIDX) 827#define RX_MACIDX_G(x) (((x) >> RX_MACIDX_S) & RX_MACIDX_M)
761 828
762#define S_RXF_SYN 21 829#define RXF_SYN_S 21
763#define V_RXF_SYN(x) ((x) << S_RXF_SYN) 830#define RXF_SYN_V(x) ((x) << RXF_SYN_S)
764#define F_RXF_SYN V_RXF_SYN(1U) 831#define RXF_SYN_F RXF_SYN_V(1U)
765 832
766#define S_RX_CHAN 28 833#define RX_CHAN_S 28
767#define M_RX_CHAN 0xF 834#define RX_CHAN_M 0xF
768#define V_RX_CHAN(x) ((x) << S_RX_CHAN) 835#define RX_CHAN_V(x) ((x) << RX_CHAN_S)
769#define G_RX_CHAN(x) (((x) >> S_RX_CHAN) & M_RX_CHAN) 836#define RX_CHAN_G(x) (((x) >> RX_CHAN_S) & RX_CHAN_M)
770 837
771/* rx_pkt.hdr_len fields */ 838/* rx_pkt.hdr_len fields */
772#define S_RX_TCPHDR_LEN 0 839#define RX_TCPHDR_LEN_S 0
773#define M_RX_TCPHDR_LEN 0x3F 840#define RX_TCPHDR_LEN_M 0x3F
774#define V_RX_TCPHDR_LEN(x) ((x) << S_RX_TCPHDR_LEN) 841#define RX_TCPHDR_LEN_V(x) ((x) << RX_TCPHDR_LEN_S)
775#define G_RX_TCPHDR_LEN(x) (((x) >> S_RX_TCPHDR_LEN) & M_RX_TCPHDR_LEN) 842#define RX_TCPHDR_LEN_G(x) (((x) >> RX_TCPHDR_LEN_S) & RX_TCPHDR_LEN_M)
776 843
777#define S_RX_IPHDR_LEN 6 844#define RX_IPHDR_LEN_S 6
778#define M_RX_IPHDR_LEN 0x3FF 845#define RX_IPHDR_LEN_M 0x3FF
779#define V_RX_IPHDR_LEN(x) ((x) << S_RX_IPHDR_LEN) 846#define RX_IPHDR_LEN_V(x) ((x) << RX_IPHDR_LEN_S)
780#define G_RX_IPHDR_LEN(x) (((x) >> S_RX_IPHDR_LEN) & M_RX_IPHDR_LEN) 847#define RX_IPHDR_LEN_G(x) (((x) >> RX_IPHDR_LEN_S) & RX_IPHDR_LEN_M)
781 848
782struct cpl_trace_pkt { 849struct cpl_trace_pkt {
783 u8 opcode; 850 u8 opcode;
@@ -826,14 +893,22 @@ struct cpl_l2t_write_req {
826 WR_HDR; 893 WR_HDR;
827 union opcode_tid ot; 894 union opcode_tid ot;
828 __be16 params; 895 __be16 params;
829#define L2T_W_INFO(x) ((x) << 2)
830#define L2T_W_PORT(x) ((x) << 8)
831#define L2T_W_NOREPLY(x) ((x) << 15)
832 __be16 l2t_idx; 896 __be16 l2t_idx;
833 __be16 vlan; 897 __be16 vlan;
834 u8 dst_mac[6]; 898 u8 dst_mac[6];
835}; 899};
836 900
901/* cpl_l2t_write_req.params fields */
902#define L2T_W_INFO_S 2
903#define L2T_W_INFO_V(x) ((x) << L2T_W_INFO_S)
904
905#define L2T_W_PORT_S 8
906#define L2T_W_PORT_V(x) ((x) << L2T_W_PORT_S)
907
908#define L2T_W_NOREPLY_S 15
909#define L2T_W_NOREPLY_V(x) ((x) << L2T_W_NOREPLY_S)
910#define L2T_W_NOREPLY_F L2T_W_NOREPLY_V(1U)
911
837struct cpl_l2t_write_rpl { 912struct cpl_l2t_write_rpl {
838 union opcode_tid ot; 913 union opcode_tid ot;
839 u8 status; 914 u8 status;
@@ -848,11 +923,15 @@ struct cpl_rdma_terminate {
848 923
849struct cpl_sge_egr_update { 924struct cpl_sge_egr_update {
850 __be32 opcode_qid; 925 __be32 opcode_qid;
851#define EGR_QID(x) ((x) & 0x1FFFF)
852 __be16 cidx; 926 __be16 cidx;
853 __be16 pidx; 927 __be16 pidx;
854}; 928};
855 929
930/* cpl_sge_egr_update.ot fields */
931#define EGR_QID_S 0
932#define EGR_QID_M 0x1FFFF
933#define EGR_QID_G(x) (((x) >> EGR_QID_S) & EGR_QID_M)
934
856/* cpl_fw*.type values */ 935/* cpl_fw*.type values */
857enum { 936enum {
858 FW_TYPE_CMD_RPL = 0, 937 FW_TYPE_CMD_RPL = 0,
@@ -945,22 +1024,30 @@ struct ulptx_sge_pair {
945 1024
946struct ulptx_sgl { 1025struct ulptx_sgl {
947 __be32 cmd_nsge; 1026 __be32 cmd_nsge;
948#define ULPTX_NSGE(x) ((x) << 0)
949#define ULPTX_MORE (1U << 23)
950 __be32 len0; 1027 __be32 len0;
951 __be64 addr0; 1028 __be64 addr0;
952 struct ulptx_sge_pair sge[0]; 1029 struct ulptx_sge_pair sge[0];
953}; 1030};
954 1031
1032#define ULPTX_NSGE_S 0
1033#define ULPTX_NSGE_V(x) ((x) << ULPTX_NSGE_S)
1034
1035#define ULPTX_MORE_S 23
1036#define ULPTX_MORE_V(x) ((x) << ULPTX_MORE_S)
1037#define ULPTX_MORE_F ULPTX_MORE_V(1U)
1038
955struct ulp_mem_io { 1039struct ulp_mem_io {
956 WR_HDR; 1040 WR_HDR;
957 __be32 cmd; 1041 __be32 cmd;
958 __be32 len16; /* command length */ 1042 __be32 len16; /* command length */
959 __be32 dlen; /* data length in 32-byte units */ 1043 __be32 dlen; /* data length in 32-byte units */
960 __be32 lock_addr; 1044 __be32 lock_addr;
961#define ULP_MEMIO_LOCK(x) ((x) << 31)
962}; 1045};
963 1046
1047#define ULP_MEMIO_LOCK_S 31
1048#define ULP_MEMIO_LOCK_V(x) ((x) << ULP_MEMIO_LOCK_S)
1049#define ULP_MEMIO_LOCK_F ULP_MEMIO_LOCK_V(1U)
1050
964/* additional ulp_mem_io.cmd fields */ 1051/* additional ulp_mem_io.cmd fields */
965#define ULP_MEMIO_ORDER_S 23 1052#define ULP_MEMIO_ORDER_S 23
966#define ULP_MEMIO_ORDER_V(x) ((x) << ULP_MEMIO_ORDER_S) 1053#define ULP_MEMIO_ORDER_V(x) ((x) << ULP_MEMIO_ORDER_S)
@@ -970,13 +1057,9 @@ struct ulp_mem_io {
970#define T5_ULP_MEMIO_IMM_V(x) ((x) << T5_ULP_MEMIO_IMM_S) 1057#define T5_ULP_MEMIO_IMM_V(x) ((x) << T5_ULP_MEMIO_IMM_S)
971#define T5_ULP_MEMIO_IMM_F T5_ULP_MEMIO_IMM_V(1U) 1058#define T5_ULP_MEMIO_IMM_F T5_ULP_MEMIO_IMM_V(1U)
972 1059
973#define S_T5_ULP_MEMIO_IMM 23 1060#define T5_ULP_MEMIO_ORDER_S 22
974#define V_T5_ULP_MEMIO_IMM(x) ((x) << S_T5_ULP_MEMIO_IMM) 1061#define T5_ULP_MEMIO_ORDER_V(x) ((x) << T5_ULP_MEMIO_ORDER_S)
975#define F_T5_ULP_MEMIO_IMM V_T5_ULP_MEMIO_IMM(1U) 1062#define T5_ULP_MEMIO_ORDER_F T5_ULP_MEMIO_ORDER_V(1U)
976
977#define S_T5_ULP_MEMIO_ORDER 22
978#define V_T5_ULP_MEMIO_ORDER(x) ((x) << S_T5_ULP_MEMIO_ORDER)
979#define F_T5_ULP_MEMIO_ORDER V_T5_ULP_MEMIO_ORDER(1U)
980 1063
981/* ulp_mem_io.lock_addr fields */ 1064/* ulp_mem_io.lock_addr fields */
982#define ULP_MEMIO_ADDR_S 0 1065#define ULP_MEMIO_ADDR_S 0
diff --git a/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c b/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c
index 4591d934e221..710e5e2bac9f 100644
--- a/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c
+++ b/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c
@@ -471,7 +471,7 @@ static int fwevtq_handler(struct sge_rspq *rspq, const __be64 *rsp,
471 * free TX Queue Descriptors ... 471 * free TX Queue Descriptors ...
472 */ 472 */
473 const struct cpl_sge_egr_update *p = cpl; 473 const struct cpl_sge_egr_update *p = cpl;
474 unsigned int qid = EGR_QID(be32_to_cpu(p->opcode_qid)); 474 unsigned int qid = EGR_QID_G(be32_to_cpu(p->opcode_qid));
475 struct sge *s = &adapter->sge; 475 struct sge *s = &adapter->sge;
476 struct sge_txq *tq; 476 struct sge_txq *tq;
477 struct sge_eth_txq *txq; 477 struct sge_eth_txq *txq;
diff --git a/drivers/net/ethernet/chelsio/cxgb4vf/sge.c b/drivers/net/ethernet/chelsio/cxgb4vf/sge.c
index ef4da3e1829b..4424277a7e4d 100644
--- a/drivers/net/ethernet/chelsio/cxgb4vf/sge.c
+++ b/drivers/net/ethernet/chelsio/cxgb4vf/sge.c
@@ -926,7 +926,7 @@ static void write_sgl(const struct sk_buff *skb, struct sge_txq *tq,
926 } 926 }
927 927
928 sgl->cmd_nsge = htonl(ULPTX_CMD_V(ULP_TX_SC_DSGL) | 928 sgl->cmd_nsge = htonl(ULPTX_CMD_V(ULP_TX_SC_DSGL) |
929 ULPTX_NSGE(nfrags)); 929 ULPTX_NSGE_V(nfrags));
930 if (likely(--nfrags == 0)) 930 if (likely(--nfrags == 0))
931 return; 931 return;
932 /* 932 /*
@@ -1604,7 +1604,7 @@ int t4vf_ethrx_handler(struct sge_rspq *rspq, const __be64 *rsp,
1604 * If this is a good TCP packet and we have Generic Receive Offload 1604 * If this is a good TCP packet and we have Generic Receive Offload
1605 * enabled, handle the packet in the GRO path. 1605 * enabled, handle the packet in the GRO path.
1606 */ 1606 */
1607 if ((pkt->l2info & cpu_to_be32(RXF_TCP)) && 1607 if ((pkt->l2info & cpu_to_be32(RXF_TCP_F)) &&
1608 (rspq->netdev->features & NETIF_F_GRO) && csum_ok && 1608 (rspq->netdev->features & NETIF_F_GRO) && csum_ok &&
1609 !pkt->ip_frag) { 1609 !pkt->ip_frag) {
1610 do_gro(rxq, gl, pkt); 1610 do_gro(rxq, gl, pkt);
@@ -1626,7 +1626,7 @@ int t4vf_ethrx_handler(struct sge_rspq *rspq, const __be64 *rsp,
1626 rxq->stats.pkts++; 1626 rxq->stats.pkts++;
1627 1627
1628 if (csum_ok && !pkt->err_vec && 1628 if (csum_ok && !pkt->err_vec &&
1629 (be32_to_cpu(pkt->l2info) & (RXF_UDP|RXF_TCP))) { 1629 (be32_to_cpu(pkt->l2info) & (RXF_UDP_F | RXF_TCP_F))) {
1630 if (!pkt->ip_frag) 1630 if (!pkt->ip_frag)
1631 skb->ip_summed = CHECKSUM_UNNECESSARY; 1631 skb->ip_summed = CHECKSUM_UNNECESSARY;
1632 else { 1632 else {
diff --git a/drivers/scsi/csiostor/csio_lnode.c b/drivers/scsi/csiostor/csio_lnode.c
index 87f9280d9b43..c00b2ff72b55 100644
--- a/drivers/scsi/csiostor/csio_lnode.c
+++ b/drivers/scsi/csiostor/csio_lnode.c
@@ -1758,7 +1758,7 @@ csio_ln_mgmt_submit_wr(struct csio_mgmtm *mgmtm, struct csio_ioreq *io_req,
1758 else { 1758 else {
1759 /* Program DSGL to dma payload */ 1759 /* Program DSGL to dma payload */
1760 dsgl.cmd_nsge = htonl(ULPTX_CMD_V(ULP_TX_SC_DSGL) | 1760 dsgl.cmd_nsge = htonl(ULPTX_CMD_V(ULP_TX_SC_DSGL) |
1761 ULPTX_MORE | ULPTX_NSGE(1)); 1761 ULPTX_MORE_F | ULPTX_NSGE_V(1));
1762 dsgl.len0 = cpu_to_be32(pld_len); 1762 dsgl.len0 = cpu_to_be32(pld_len);
1763 dsgl.addr0 = cpu_to_be64(pld->paddr); 1763 dsgl.addr0 = cpu_to_be64(pld->paddr);
1764 csio_wr_copy_to_wrp(&dsgl, &wrp, ALIGN(wr_off, 8), 1764 csio_wr_copy_to_wrp(&dsgl, &wrp, ALIGN(wr_off, 8),
diff --git a/drivers/scsi/csiostor/csio_scsi.c b/drivers/scsi/csiostor/csio_scsi.c
index 3987284e0d2a..2c4562d82dc0 100644
--- a/drivers/scsi/csiostor/csio_scsi.c
+++ b/drivers/scsi/csiostor/csio_scsi.c
@@ -298,8 +298,8 @@ csio_scsi_init_ultptx_dsgl(struct csio_hw *hw, struct csio_ioreq *req,
298 struct csio_dma_buf *dma_buf; 298 struct csio_dma_buf *dma_buf;
299 struct scsi_cmnd *scmnd = csio_scsi_cmnd(req); 299 struct scsi_cmnd *scmnd = csio_scsi_cmnd(req);
300 300
301 sgl->cmd_nsge = htonl(ULPTX_CMD_V(ULP_TX_SC_DSGL) | ULPTX_MORE | 301 sgl->cmd_nsge = htonl(ULPTX_CMD_V(ULP_TX_SC_DSGL) | ULPTX_MORE_F |
302 ULPTX_NSGE(req->nsge)); 302 ULPTX_NSGE_V(req->nsge));
303 /* Now add the data SGLs */ 303 /* Now add the data SGLs */
304 if (likely(!req->dcopy)) { 304 if (likely(!req->dcopy)) {
305 scsi_for_each_sg(scmnd, sgel, req->nsge, i) { 305 scsi_for_each_sg(scmnd, sgel, req->nsge, i) {
diff --git a/drivers/scsi/cxgbi/cxgb4i/cxgb4i.c b/drivers/scsi/cxgbi/cxgb4i/cxgb4i.c
index c3f2b973149b..37d7191a3c38 100644
--- a/drivers/scsi/cxgbi/cxgb4i/cxgb4i.c
+++ b/drivers/scsi/cxgbi/cxgb4i/cxgb4i.c
@@ -1112,7 +1112,7 @@ static void do_rx_iscsi_hdr(struct cxgbi_device *cdev, struct sk_buff *skb)
1112 hlen = ntohs(cpl->len); 1112 hlen = ntohs(cpl->len);
1113 dlen = ntohl(*(unsigned int *)(bhs + 4)) & 0xFFFFFF; 1113 dlen = ntohl(*(unsigned int *)(bhs + 4)) & 0xFFFFFF;
1114 1114
1115 plen = ISCSI_PDU_LEN(pdu_len_ddp); 1115 plen = ISCSI_PDU_LEN_G(pdu_len_ddp);
1116 if (is_t4(lldi->adapter_type)) 1116 if (is_t4(lldi->adapter_type))
1117 plen -= 40; 1117 plen -= 40;
1118 1118
@@ -1619,7 +1619,7 @@ static int ddp_setup_conn_pgidx(struct cxgbi_sock *csk, unsigned int tid,
1619 req = (struct cpl_set_tcb_field *)skb->head; 1619 req = (struct cpl_set_tcb_field *)skb->head;
1620 INIT_TP_WR(req, csk->tid); 1620 INIT_TP_WR(req, csk->tid);
1621 OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_SET_TCB_FIELD, csk->tid)); 1621 OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_SET_TCB_FIELD, csk->tid));
1622 req->reply_ctrl = htons(NO_REPLY(reply) | QUEUENO(csk->rss_qid)); 1622 req->reply_ctrl = htons(NO_REPLY_V(reply) | QUEUENO_V(csk->rss_qid));
1623 req->word_cookie = htons(0); 1623 req->word_cookie = htons(0);
1624 req->mask = cpu_to_be64(0x3 << 8); 1624 req->mask = cpu_to_be64(0x3 << 8);
1625 req->val = cpu_to_be64(pg_idx << 8); 1625 req->val = cpu_to_be64(pg_idx << 8);
@@ -1651,7 +1651,7 @@ static int ddp_setup_conn_digest(struct cxgbi_sock *csk, unsigned int tid,
1651 req = (struct cpl_set_tcb_field *)skb->head; 1651 req = (struct cpl_set_tcb_field *)skb->head;
1652 INIT_TP_WR(req, tid); 1652 INIT_TP_WR(req, tid);
1653 OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_SET_TCB_FIELD, tid)); 1653 OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_SET_TCB_FIELD, tid));
1654 req->reply_ctrl = htons(NO_REPLY(reply) | QUEUENO(csk->rss_qid)); 1654 req->reply_ctrl = htons(NO_REPLY_V(reply) | QUEUENO_V(csk->rss_qid));
1655 req->word_cookie = htons(0); 1655 req->word_cookie = htons(0);
1656 req->mask = cpu_to_be64(0x3 << 4); 1656 req->mask = cpu_to_be64(0x3 << 4);
1657 req->val = cpu_to_be64(((hcrc ? ULP_CRC_HEADER : 0) | 1657 req->val = cpu_to_be64(((hcrc ? ULP_CRC_HEADER : 0) |