diff options
author | TAKADA Yoshihito <takada@mbf.nifty.com> | 2007-02-13 07:26:25 -0500 |
---|---|---|
committer | Andi Kleen <andi@basil.nowhere.org> | 2007-02-13 07:26:25 -0500 |
commit | bcde1ebb81c51ebdfa02887703e4d21c1bbc2431 (patch) | |
tree | fec0a4f6e2b973630a55c7dd51474dc908a56cfb | |
parent | 86c418374223be3f328b5522545196db02c8ceda (diff) |
[PATCH] i386: geode configuration fixes
Original code doesn't write back to CCR4 register. This patch reflects a
value of a register.
Cc: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Andi Kleen <ak@suse.de>
-rw-r--r-- | arch/i386/kernel/cpu/cyrix.c | 21 |
1 files changed, 10 insertions, 11 deletions
diff --git a/arch/i386/kernel/cpu/cyrix.c b/arch/i386/kernel/cpu/cyrix.c index 69b263f5632a..408a74e5c424 100644 --- a/arch/i386/kernel/cpu/cyrix.c +++ b/arch/i386/kernel/cpu/cyrix.c | |||
@@ -161,19 +161,19 @@ static void __cpuinit set_cx86_inc(void) | |||
161 | static void __cpuinit geode_configure(void) | 161 | static void __cpuinit geode_configure(void) |
162 | { | 162 | { |
163 | unsigned long flags; | 163 | unsigned long flags; |
164 | u8 ccr3, ccr4; | 164 | u8 ccr3; |
165 | local_irq_save(flags); | 165 | local_irq_save(flags); |
166 | 166 | ||
167 | /* Suspend on halt power saving and enable #SUSP pin */ | 167 | /* Suspend on halt power saving and enable #SUSP pin */ |
168 | setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x88); | 168 | setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x88); |
169 | 169 | ||
170 | ccr3 = getCx86(CX86_CCR3); | 170 | ccr3 = getCx86(CX86_CCR3); |
171 | setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* Enable */ | 171 | setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN */ |
172 | |||
173 | ccr4 = getCx86(CX86_CCR4); | ||
174 | ccr4 |= 0x38; /* FPU fast, DTE cache, Mem bypass */ | ||
175 | 172 | ||
176 | setCx86(CX86_CCR3, ccr3); | 173 | |
174 | /* FPU fast, DTE cache, Mem bypass */ | ||
175 | setCx86(CX86_CCR4, getCx86(CX86_CCR4) | 0x38); | ||
176 | setCx86(CX86_CCR3, ccr3); /* disable MAPEN */ | ||
177 | 177 | ||
178 | set_cx86_memwb(); | 178 | set_cx86_memwb(); |
179 | set_cx86_reorder(); | 179 | set_cx86_reorder(); |
@@ -420,15 +420,14 @@ static void __cpuinit cyrix_identify(struct cpuinfo_x86 * c) | |||
420 | 420 | ||
421 | if (dir0 == 5 || dir0 == 3) | 421 | if (dir0 == 5 || dir0 == 3) |
422 | { | 422 | { |
423 | unsigned char ccr3, ccr4; | 423 | unsigned char ccr3; |
424 | unsigned long flags; | 424 | unsigned long flags; |
425 | printk(KERN_INFO "Enabling CPUID on Cyrix processor.\n"); | 425 | printk(KERN_INFO "Enabling CPUID on Cyrix processor.\n"); |
426 | local_irq_save(flags); | 426 | local_irq_save(flags); |
427 | ccr3 = getCx86(CX86_CCR3); | 427 | ccr3 = getCx86(CX86_CCR3); |
428 | setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN */ | 428 | setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN */ |
429 | ccr4 = getCx86(CX86_CCR4); | 429 | setCx86(CX86_CCR4, getCx86(CX86_CCR4) | 0x80); /* enable cpuid */ |
430 | setCx86(CX86_CCR4, ccr4 | 0x80); /* enable cpuid */ | 430 | setCx86(CX86_CCR3, ccr3); /* disable MAPEN */ |
431 | setCx86(CX86_CCR3, ccr3); /* disable MAPEN */ | ||
432 | local_irq_restore(flags); | 431 | local_irq_restore(flags); |
433 | } | 432 | } |
434 | } | 433 | } |