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authorGeert Uytterhoeven <geert@linux-m68k.org>2010-04-04 05:00:33 -0400
committerJames Bottomley <James.Bottomley@suse.de>2010-05-02 15:54:47 -0400
commitbb17b7871bb10e0ecf39e3afbc182cab218d0539 (patch)
tree54c85c734e108dba8765f7e1182a68466c61a44b
parent09bc85b08cc1c146e9b298015601b01a572a543e (diff)
[SCSI] gvp11: Reindentation
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: James Bottomley <James.Bottomley@suse.de>
Diffstat
-rw-r--r--drivers/scsi/gvp11.c562
-rw-r--r--drivers/scsi/gvp11.h36
2 files changed, 301 insertions, 297 deletions
diff --git a/drivers/scsi/gvp11.c b/drivers/scsi/gvp11.c
index 322afcc99e25..bd5d90328ee0 100644
--- a/drivers/scsi/gvp11.c
+++ b/drivers/scsi/gvp11.c
@@ -19,331 +19,335 @@
19#include "wd33c93.h" 19#include "wd33c93.h"
20#include "gvp11.h" 20#include "gvp11.h"
21 21
22#include<linux/stat.h> 22#include <linux/stat.h>
23 23
24#define DMA(ptr) ((gvp11_scsiregs *)((ptr)->base))
25#define HDATA(ptr) ((struct WD33C93_hostdata *)((ptr)->hostdata))
26 24
27static irqreturn_t gvp11_intr (int irq, void *_instance) 25#define DMA(ptr) ((gvp11_scsiregs *)((ptr)->base))
26#define HDATA(ptr) ((struct WD33C93_hostdata *)((ptr)->hostdata))
27
28static irqreturn_t gvp11_intr(int irq, void *_instance)
28{ 29{
29 unsigned long flags; 30 unsigned long flags;
30 unsigned int status; 31 unsigned int status;
31 struct Scsi_Host *instance = (struct Scsi_Host *)_instance; 32 struct Scsi_Host *instance = (struct Scsi_Host *)_instance;
32 33
33 status = DMA(instance)->CNTR; 34 status = DMA(instance)->CNTR;
34 if (!(status & GVP11_DMAC_INT_PENDING)) 35 if (!(status & GVP11_DMAC_INT_PENDING))
35 return IRQ_NONE; 36 return IRQ_NONE;
36 37
37 spin_lock_irqsave(instance->host_lock, flags); 38 spin_lock_irqsave(instance->host_lock, flags);
38 wd33c93_intr(instance); 39 wd33c93_intr(instance);
39 spin_unlock_irqrestore(instance->host_lock, flags); 40 spin_unlock_irqrestore(instance->host_lock, flags);
40 return IRQ_HANDLED; 41 return IRQ_HANDLED;
41} 42}
42 43
43static int gvp11_xfer_mask = 0; 44static int gvp11_xfer_mask = 0;
44 45
45void gvp11_setup (char *str, int *ints) 46void gvp11_setup(char *str, int *ints)
46{ 47{
47 gvp11_xfer_mask = ints[1]; 48 gvp11_xfer_mask = ints[1];
48} 49}
49 50
50static int dma_setup(struct scsi_cmnd *cmd, int dir_in) 51static int dma_setup(struct scsi_cmnd *cmd, int dir_in)
51{ 52{
52 unsigned short cntr = GVP11_DMAC_INT_ENABLE; 53 unsigned short cntr = GVP11_DMAC_INT_ENABLE;
53 unsigned long addr = virt_to_bus(cmd->SCp.ptr); 54 unsigned long addr = virt_to_bus(cmd->SCp.ptr);
54 int bank_mask; 55 int bank_mask;
55 static int scsi_alloc_out_of_range = 0; 56 static int scsi_alloc_out_of_range = 0;
56
57 /* use bounce buffer if the physical address is bad */
58 if (addr & HDATA(cmd->device->host)->dma_xfer_mask)
59 {
60 HDATA(cmd->device->host)->dma_bounce_len = (cmd->SCp.this_residual + 511)
61 & ~0x1ff;
62
63 if( !scsi_alloc_out_of_range ) {
64 HDATA(cmd->device->host)->dma_bounce_buffer =
65 kmalloc (HDATA(cmd->device->host)->dma_bounce_len, GFP_KERNEL);
66 HDATA(cmd->device->host)->dma_buffer_pool = BUF_SCSI_ALLOCED;
67 }
68 57
69 if (scsi_alloc_out_of_range || 58 /* use bounce buffer if the physical address is bad */
70 !HDATA(cmd->device->host)->dma_bounce_buffer) { 59 if (addr & HDATA(cmd->device->host)->dma_xfer_mask) {
71 HDATA(cmd->device->host)->dma_bounce_buffer = 60 HDATA(cmd->device->host)->dma_bounce_len =
72 amiga_chip_alloc(HDATA(cmd->device->host)->dma_bounce_len, 61 (cmd->SCp.this_residual + 511) & ~0x1ff;
73 "GVP II SCSI Bounce Buffer"); 62
63 if (!scsi_alloc_out_of_range) {
64 HDATA(cmd->device->host)->dma_bounce_buffer =
65 kmalloc(HDATA(cmd->device->host)->dma_bounce_len,
66 GFP_KERNEL);
67 HDATA(cmd->device->host)->dma_buffer_pool =
68 BUF_SCSI_ALLOCED;
69 }
74 70
75 if(!HDATA(cmd->device->host)->dma_bounce_buffer) 71 if (scsi_alloc_out_of_range ||
76 { 72 !HDATA(cmd->device->host)->dma_bounce_buffer) {
77 HDATA(cmd->device->host)->dma_bounce_len = 0; 73 HDATA(cmd->device->host)->dma_bounce_buffer =
78 return 1; 74 amiga_chip_alloc(HDATA(cmd->device->host)->dma_bounce_len,
79 } 75 "GVP II SCSI Bounce Buffer");
80 76
81 HDATA(cmd->device->host)->dma_buffer_pool = BUF_CHIP_ALLOCED; 77 if (!HDATA(cmd->device->host)->dma_bounce_buffer) {
82 } 78 HDATA(cmd->device->host)->dma_bounce_len = 0;
79 return 1;
80 }
83 81
84 /* check if the address of the bounce buffer is OK */ 82 HDATA(cmd->device->host)->dma_buffer_pool =
85 addr = virt_to_bus(HDATA(cmd->device->host)->dma_bounce_buffer); 83 BUF_CHIP_ALLOCED;
84 }
86 85
87 if (addr & HDATA(cmd->device->host)->dma_xfer_mask) { 86 /* check if the address of the bounce buffer is OK */
88 /* fall back to Chip RAM if address out of range */ 87 addr = virt_to_bus(HDATA(cmd->device->host)->dma_bounce_buffer);
89 if( HDATA(cmd->device->host)->dma_buffer_pool == BUF_SCSI_ALLOCED) { 88
90 kfree (HDATA(cmd->device->host)->dma_bounce_buffer); 89 if (addr & HDATA(cmd->device->host)->dma_xfer_mask) {
91 scsi_alloc_out_of_range = 1; 90 /* fall back to Chip RAM if address out of range */
92 } else { 91 if (HDATA(cmd->device->host)->dma_buffer_pool ==
93 amiga_chip_free (HDATA(cmd->device->host)->dma_bounce_buffer); 92 BUF_SCSI_ALLOCED) {
94 } 93 kfree(HDATA(cmd->device->host)->dma_bounce_buffer);
95 94 scsi_alloc_out_of_range = 1;
96 HDATA(cmd->device->host)->dma_bounce_buffer = 95 } else {
97 amiga_chip_alloc(HDATA(cmd->device->host)->dma_bounce_len, 96 amiga_chip_free(HDATA(cmd->device->host)->dma_bounce_buffer);
98 "GVP II SCSI Bounce Buffer"); 97 }
99 98
100 if(!HDATA(cmd->device->host)->dma_bounce_buffer) 99 HDATA(cmd->device->host)->dma_bounce_buffer =
101 { 100 amiga_chip_alloc(HDATA(cmd->device->host)->dma_bounce_len,
102 HDATA(cmd->device->host)->dma_bounce_len = 0; 101 "GVP II SCSI Bounce Buffer");
103 return 1; 102
104 } 103 if (!HDATA(cmd->device->host)->dma_bounce_buffer) {
105 104 HDATA(cmd->device->host)->dma_bounce_len = 0;
106 addr = virt_to_bus(HDATA(cmd->device->host)->dma_bounce_buffer); 105 return 1;
107 HDATA(cmd->device->host)->dma_buffer_pool = BUF_CHIP_ALLOCED; 106 }
108 } 107
109 108 addr = virt_to_bus(HDATA(cmd->device->host)->dma_bounce_buffer);
110 if (!dir_in) { 109 HDATA(cmd->device->host)->dma_buffer_pool =
111 /* copy to bounce buffer for a write */ 110 BUF_CHIP_ALLOCED;
112 memcpy (HDATA(cmd->device->host)->dma_bounce_buffer, 111 }
113 cmd->SCp.ptr, cmd->SCp.this_residual); 112
113 if (!dir_in) {
114 /* copy to bounce buffer for a write */
115 memcpy(HDATA(cmd->device->host)->dma_bounce_buffer,
116 cmd->SCp.ptr, cmd->SCp.this_residual);
117 }
114 } 118 }
115 }
116 119
117 /* setup dma direction */ 120 /* setup dma direction */
118 if (!dir_in) 121 if (!dir_in)
119 cntr |= GVP11_DMAC_DIR_WRITE; 122 cntr |= GVP11_DMAC_DIR_WRITE;
120 123
121 HDATA(cmd->device->host)->dma_dir = dir_in; 124 HDATA(cmd->device->host)->dma_dir = dir_in;
122 DMA(cmd->device->host)->CNTR = cntr; 125 DMA(cmd->device->host)->CNTR = cntr;
123 126
124 /* setup DMA *physical* address */ 127 /* setup DMA *physical* address */
125 DMA(cmd->device->host)->ACR = addr; 128 DMA(cmd->device->host)->ACR = addr;
126 129
127 if (dir_in) 130 if (dir_in) {
128 /* invalidate any cache */ 131 /* invalidate any cache */
129 cache_clear (addr, cmd->SCp.this_residual); 132 cache_clear(addr, cmd->SCp.this_residual);
130 else 133 } else {
131 /* push any dirty cache */ 134 /* push any dirty cache */
132 cache_push (addr, cmd->SCp.this_residual); 135 cache_push(addr, cmd->SCp.this_residual);
136 }
133 137
134 if ((bank_mask = (~HDATA(cmd->device->host)->dma_xfer_mask >> 18) & 0x01c0)) 138 if ((bank_mask = (~HDATA(cmd->device->host)->dma_xfer_mask >> 18) & 0x01c0))
135 DMA(cmd->device->host)->BANK = bank_mask & (addr >> 18); 139 DMA(cmd->device->host)->BANK = bank_mask & (addr >> 18);
136 140
137 /* start DMA */ 141 /* start DMA */
138 DMA(cmd->device->host)->ST_DMA = 1; 142 DMA(cmd->device->host)->ST_DMA = 1;
139 143
140 /* return success */ 144 /* return success */
141 return 0; 145 return 0;
142} 146}
143 147
144static void dma_stop(struct Scsi_Host *instance, struct scsi_cmnd *SCpnt, 148static void dma_stop(struct Scsi_Host *instance, struct scsi_cmnd *SCpnt,
145 int status) 149 int status)
146{ 150{
147 /* stop DMA */ 151 /* stop DMA */
148 DMA(instance)->SP_DMA = 1; 152 DMA(instance)->SP_DMA = 1;
149 /* remove write bit from CONTROL bits */ 153 /* remove write bit from CONTROL bits */
150 DMA(instance)->CNTR = GVP11_DMAC_INT_ENABLE; 154 DMA(instance)->CNTR = GVP11_DMAC_INT_ENABLE;
151 155
152 /* copy from a bounce buffer, if necessary */ 156 /* copy from a bounce buffer, if necessary */
153 if (status && HDATA(instance)->dma_bounce_buffer) { 157 if (status && HDATA(instance)->dma_bounce_buffer) {
154 if (HDATA(instance)->dma_dir && SCpnt) 158 if (HDATA(instance)->dma_dir && SCpnt)
155 memcpy (SCpnt->SCp.ptr, 159 memcpy(SCpnt->SCp.ptr,
156 HDATA(instance)->dma_bounce_buffer, 160 HDATA(instance)->dma_bounce_buffer,
157 SCpnt->SCp.this_residual); 161 SCpnt->SCp.this_residual);
158 162
159 if (HDATA(instance)->dma_buffer_pool == BUF_SCSI_ALLOCED) 163 if (HDATA(instance)->dma_buffer_pool == BUF_SCSI_ALLOCED)
160 kfree (HDATA(instance)->dma_bounce_buffer); 164 kfree(HDATA(instance)->dma_bounce_buffer);
161 else 165 else
162 amiga_chip_free(HDATA(instance)->dma_bounce_buffer); 166 amiga_chip_free(HDATA(instance)->dma_bounce_buffer);
163 167
164 HDATA(instance)->dma_bounce_buffer = NULL; 168 HDATA(instance)->dma_bounce_buffer = NULL;
165 HDATA(instance)->dma_bounce_len = 0; 169 HDATA(instance)->dma_bounce_len = 0;
166 } 170 }
167} 171}
168 172
169#define CHECK_WD33C93 173#define CHECK_WD33C93
170 174
171int __init gvp11_detect(struct scsi_host_template *tpnt) 175int __init gvp11_detect(struct scsi_host_template *tpnt)
172{ 176{
173 static unsigned char called = 0; 177 static unsigned char called = 0;
174 struct Scsi_Host *instance; 178 struct Scsi_Host *instance;
175 unsigned long address; 179 unsigned long address;
176 unsigned int epc; 180 unsigned int epc;
177 struct zorro_dev *z = NULL; 181 struct zorro_dev *z = NULL;
178 unsigned int default_dma_xfer_mask; 182 unsigned int default_dma_xfer_mask;
179 wd33c93_regs regs; 183 wd33c93_regs regs;
180 int num_gvp11 = 0; 184 int num_gvp11 = 0;
181#ifdef CHECK_WD33C93 185#ifdef CHECK_WD33C93
182 volatile unsigned char *sasr_3393, *scmd_3393; 186 volatile unsigned char *sasr_3393, *scmd_3393;
183 unsigned char save_sasr; 187 unsigned char save_sasr;
184 unsigned char q, qq; 188 unsigned char q, qq;
185#endif 189#endif
186 190
187 if (!MACH_IS_AMIGA || called) 191 if (!MACH_IS_AMIGA || called)
188 return 0; 192 return 0;
189 called = 1; 193 called = 1;
190 194
191 tpnt->proc_name = "GVP11"; 195 tpnt->proc_name = "GVP11";
192 tpnt->proc_info = &wd33c93_proc_info; 196 tpnt->proc_info = &wd33c93_proc_info;
193 197
194 while ((z = zorro_find_device(ZORRO_WILDCARD, z))) { 198 while ((z = zorro_find_device(ZORRO_WILDCARD, z))) {
195 /* 199 /*
196 * This should (hopefully) be the correct way to identify 200 * This should (hopefully) be the correct way to identify
197 * all the different GVP SCSI controllers (except for the 201 * all the different GVP SCSI controllers (except for the
198 * SERIES I though). 202 * SERIES I though).
199 */ 203 */
200 204
201 if (z->id == ZORRO_PROD_GVP_COMBO_030_R3_SCSI || 205 if (z->id == ZORRO_PROD_GVP_COMBO_030_R3_SCSI ||
202 z->id == ZORRO_PROD_GVP_SERIES_II) 206 z->id == ZORRO_PROD_GVP_SERIES_II)
203 default_dma_xfer_mask = ~0x00ffffff; 207 default_dma_xfer_mask = ~0x00ffffff;
204 else if (z->id == ZORRO_PROD_GVP_GFORCE_030_SCSI || 208 else if (z->id == ZORRO_PROD_GVP_GFORCE_030_SCSI ||
205 z->id == ZORRO_PROD_GVP_A530_SCSI || 209 z->id == ZORRO_PROD_GVP_A530_SCSI ||
206 z->id == ZORRO_PROD_GVP_COMBO_030_R4_SCSI) 210 z->id == ZORRO_PROD_GVP_COMBO_030_R4_SCSI)
207 default_dma_xfer_mask = ~0x01ffffff; 211 default_dma_xfer_mask = ~0x01ffffff;
208 else if (z->id == ZORRO_PROD_GVP_A1291 || 212 else if (z->id == ZORRO_PROD_GVP_A1291 ||
209 z->id == ZORRO_PROD_GVP_GFORCE_040_SCSI_1) 213 z->id == ZORRO_PROD_GVP_GFORCE_040_SCSI_1)
210 default_dma_xfer_mask = ~0x07ffffff; 214 default_dma_xfer_mask = ~0x07ffffff;
211 else 215 else
212 continue; 216 continue;
213 217
214 /* 218 /*
215 * Rumors state that some GVP ram boards use the same product 219 * Rumors state that some GVP ram boards use the same product
216 * code as the SCSI controllers. Therefore if the board-size 220 * code as the SCSI controllers. Therefore if the board-size
217 * is not 64KB we asume it is a ram board and bail out. 221 * is not 64KB we asume it is a ram board and bail out.
218 */ 222 */
219 if (z->resource.end-z->resource.start != 0xffff) 223 if (z->resource.end - z->resource.start != 0xffff)
220 continue; 224 continue;
221 225
222 address = z->resource.start; 226 address = z->resource.start;
223 if (!request_mem_region(address, 256, "wd33c93")) 227 if (!request_mem_region(address, 256, "wd33c93"))
224 continue; 228 continue;
225 229
226#ifdef CHECK_WD33C93 230#ifdef CHECK_WD33C93
227 231
228 /* 232 /*
229 * These darn GVP boards are a problem - it can be tough to tell 233 * These darn GVP boards are a problem - it can be tough to tell
230 * whether or not they include a SCSI controller. This is the 234 * whether or not they include a SCSI controller. This is the
231 * ultimate Yet-Another-GVP-Detection-Hack in that it actually 235 * ultimate Yet-Another-GVP-Detection-Hack in that it actually
232 * probes for a WD33c93 chip: If we find one, it's extremely 236 * probes for a WD33c93 chip: If we find one, it's extremely
233 * likely that this card supports SCSI, regardless of Product_ 237 * likely that this card supports SCSI, regardless of Product_
234 * Code, Board_Size, etc. 238 * Code, Board_Size, etc.
235 */ 239 */
236 240
237 /* Get pointers to the presumed register locations and save contents */ 241 /* Get pointers to the presumed register locations and save contents */
238 242
239 sasr_3393 = &(((gvp11_scsiregs *)(ZTWO_VADDR(address)))->SASR); 243 sasr_3393 = &(((gvp11_scsiregs *)(ZTWO_VADDR(address)))->SASR);
240 scmd_3393 = &(((gvp11_scsiregs *)(ZTWO_VADDR(address)))->SCMD); 244 scmd_3393 = &(((gvp11_scsiregs *)(ZTWO_VADDR(address)))->SCMD);
241 save_sasr = *sasr_3393; 245 save_sasr = *sasr_3393;
242 246
243 /* First test the AuxStatus Reg */ 247 /* First test the AuxStatus Reg */
244 248
245 q = *sasr_3393; /* read it */ 249 q = *sasr_3393; /* read it */
246 if (q & 0x08) /* bit 3 should always be clear */ 250 if (q & 0x08) /* bit 3 should always be clear */
247 goto release; 251 goto release;
248 *sasr_3393 = WD_AUXILIARY_STATUS; /* setup indirect address */ 252 *sasr_3393 = WD_AUXILIARY_STATUS; /* setup indirect address */
249 if (*sasr_3393 == WD_AUXILIARY_STATUS) { /* shouldn't retain the write */ 253 if (*sasr_3393 == WD_AUXILIARY_STATUS) { /* shouldn't retain the write */
250 *sasr_3393 = save_sasr; /* Oops - restore this byte */ 254 *sasr_3393 = save_sasr; /* Oops - restore this byte */
251 goto release; 255 goto release;
252 } 256 }
253 if (*sasr_3393 != q) { /* should still read the same */ 257 if (*sasr_3393 != q) { /* should still read the same */
254 *sasr_3393 = save_sasr; /* Oops - restore this byte */ 258 *sasr_3393 = save_sasr; /* Oops - restore this byte */
255 goto release; 259 goto release;
256 } 260 }
257 if (*scmd_3393 != q) /* and so should the image at 0x1f */ 261 if (*scmd_3393 != q) /* and so should the image at 0x1f */
258 goto release; 262 goto release;
259 263
260 264 /*
261 /* Ok, we probably have a wd33c93, but let's check a few other places 265 * Ok, we probably have a wd33c93, but let's check a few other places
262 * for good measure. Make sure that this works for both 'A and 'B 266 * for good measure. Make sure that this works for both 'A and 'B
263 * chip versions. 267 * chip versions.
264 */ 268 */
265 269
266 *sasr_3393 = WD_SCSI_STATUS; 270 *sasr_3393 = WD_SCSI_STATUS;
267 q = *scmd_3393; 271 q = *scmd_3393;
268 *sasr_3393 = WD_SCSI_STATUS; 272 *sasr_3393 = WD_SCSI_STATUS;
269 *scmd_3393 = ~q; 273 *scmd_3393 = ~q;
270 *sasr_3393 = WD_SCSI_STATUS; 274 *sasr_3393 = WD_SCSI_STATUS;
271 qq = *scmd_3393; 275 qq = *scmd_3393;
272 *sasr_3393 = WD_SCSI_STATUS; 276 *sasr_3393 = WD_SCSI_STATUS;
273 *scmd_3393 = q; 277 *scmd_3393 = q;
274 if (qq != q) /* should be read only */ 278 if (qq != q) /* should be read only */
275 goto release; 279 goto release;
276 *sasr_3393 = 0x1e; /* this register is unimplemented */ 280 *sasr_3393 = 0x1e; /* this register is unimplemented */
277 q = *scmd_3393; 281 q = *scmd_3393;
278 *sasr_3393 = 0x1e; 282 *sasr_3393 = 0x1e;
279 *scmd_3393 = ~q; 283 *scmd_3393 = ~q;
280 *sasr_3393 = 0x1e; 284 *sasr_3393 = 0x1e;
281 qq = *scmd_3393; 285 qq = *scmd_3393;
282 *sasr_3393 = 0x1e; 286 *sasr_3393 = 0x1e;
283 *scmd_3393 = q; 287 *scmd_3393 = q;
284 if (qq != q || qq != 0xff) /* should be read only, all 1's */ 288 if (qq != q || qq != 0xff) /* should be read only, all 1's */
285 goto release; 289 goto release;
286 *sasr_3393 = WD_TIMEOUT_PERIOD; 290 *sasr_3393 = WD_TIMEOUT_PERIOD;
287 q = *scmd_3393; 291 q = *scmd_3393;
288 *sasr_3393 = WD_TIMEOUT_PERIOD; 292 *sasr_3393 = WD_TIMEOUT_PERIOD;
289 *scmd_3393 = ~q; 293 *scmd_3393 = ~q;
290 *sasr_3393 = WD_TIMEOUT_PERIOD; 294 *sasr_3393 = WD_TIMEOUT_PERIOD;
291 qq = *scmd_3393; 295 qq = *scmd_3393;
292 *sasr_3393 = WD_TIMEOUT_PERIOD; 296 *sasr_3393 = WD_TIMEOUT_PERIOD;
293 *scmd_3393 = q; 297 *scmd_3393 = q;
294 if (qq != (~q & 0xff)) /* should be read/write */ 298 if (qq != (~q & 0xff)) /* should be read/write */
295 goto release; 299 goto release;
296#endif 300#endif
297 301
298 instance = scsi_register (tpnt, sizeof (struct WD33C93_hostdata)); 302 instance = scsi_register(tpnt, sizeof(struct WD33C93_hostdata));
299 if(instance == NULL) 303 if (instance == NULL)
300 goto release; 304 goto release;
301 instance->base = ZTWO_VADDR(address); 305 instance->base = ZTWO_VADDR(address);
302 instance->irq = IRQ_AMIGA_PORTS; 306 instance->irq = IRQ_AMIGA_PORTS;
303 instance->unique_id = z->slotaddr; 307 instance->unique_id = z->slotaddr;
304 308
305 if (gvp11_xfer_mask) 309 if (gvp11_xfer_mask)
306 HDATA(instance)->dma_xfer_mask = gvp11_xfer_mask; 310 HDATA(instance)->dma_xfer_mask = gvp11_xfer_mask;
307 else 311 else
308 HDATA(instance)->dma_xfer_mask = default_dma_xfer_mask; 312 HDATA(instance)->dma_xfer_mask = default_dma_xfer_mask;
309 313
310 314 DMA(instance)->secret2 = 1;
311 DMA(instance)->secret2 = 1; 315 DMA(instance)->secret1 = 0;
312 DMA(instance)->secret1 = 0; 316 DMA(instance)->secret3 = 15;
313 DMA(instance)->secret3 = 15; 317 while (DMA(instance)->CNTR & GVP11_DMAC_BUSY)
314 while (DMA(instance)->CNTR & GVP11_DMAC_BUSY) ; 318 ;
315 DMA(instance)->CNTR = 0; 319 DMA(instance)->CNTR = 0;
316 320
317 DMA(instance)->BANK = 0; 321 DMA(instance)->BANK = 0;
318 322
319 epc = *(unsigned short *)(ZTWO_VADDR(address) + 0x8000); 323 epc = *(unsigned short *)(ZTWO_VADDR(address) + 0x8000);
320 324
321 /* 325 /*
322 * Check for 14MHz SCSI clock 326 * Check for 14MHz SCSI clock
323 */ 327 */
324 regs.SASR = &(DMA(instance)->SASR); 328 regs.SASR = &(DMA(instance)->SASR);
325 regs.SCMD = &(DMA(instance)->SCMD); 329 regs.SCMD = &(DMA(instance)->SCMD);
326 HDATA(instance)->no_sync = 0xff; 330 HDATA(instance)->no_sync = 0xff;
327 HDATA(instance)->fast = 0; 331 HDATA(instance)->fast = 0;
328 HDATA(instance)->dma_mode = CTRL_DMA; 332 HDATA(instance)->dma_mode = CTRL_DMA;
329 wd33c93_init(instance, regs, dma_setup, dma_stop, 333 wd33c93_init(instance, regs, dma_setup, dma_stop,
330 (epc & GVP_SCSICLKMASK) ? WD33C93_FS_8_10 334 (epc & GVP_SCSICLKMASK) ? WD33C93_FS_8_10
331 : WD33C93_FS_12_15); 335 : WD33C93_FS_12_15);
332 336
333 if (request_irq(IRQ_AMIGA_PORTS, gvp11_intr, IRQF_SHARED, "GVP11 SCSI", 337 if (request_irq(IRQ_AMIGA_PORTS, gvp11_intr, IRQF_SHARED,
334 instance)) 338 "GVP11 SCSI", instance))
335 goto unregister; 339 goto unregister;
336 DMA(instance)->CNTR = GVP11_DMAC_INT_ENABLE; 340 DMA(instance)->CNTR = GVP11_DMAC_INT_ENABLE;
337 num_gvp11++; 341 num_gvp11++;
338 continue; 342 continue;
339 343
340unregister: 344unregister:
341 scsi_unregister(instance); 345 scsi_unregister(instance);
342release: 346release:
343 release_mem_region(address, 256); 347 release_mem_region(address, 256);
344 } 348 }
345 349
346 return num_gvp11; 350 return num_gvp11;
347} 351}
348 352
349static int gvp11_bus_reset(struct scsi_cmnd *cmd) 353static int gvp11_bus_reset(struct scsi_cmnd *cmd)
@@ -388,11 +392,11 @@ static struct scsi_host_template driver_template = {
388int gvp11_release(struct Scsi_Host *instance) 392int gvp11_release(struct Scsi_Host *instance)
389{ 393{
390#ifdef MODULE 394#ifdef MODULE
391 DMA(instance)->CNTR = 0; 395 DMA(instance)->CNTR = 0;
392 release_mem_region(ZTWO_PADDR(instance->base), 256); 396 release_mem_region(ZTWO_PADDR(instance->base), 256);
393 free_irq(IRQ_AMIGA_PORTS, instance); 397 free_irq(IRQ_AMIGA_PORTS, instance);
394#endif 398#endif
395 return 1; 399 return 1;
396} 400}
397 401
398MODULE_LICENSE("GPL"); 402MODULE_LICENSE("GPL");
diff --git a/drivers/scsi/gvp11.h b/drivers/scsi/gvp11.h
index bf22859a5035..e2efdf9601ef 100644
--- a/drivers/scsi/gvp11.h
+++ b/drivers/scsi/gvp11.h
@@ -15,11 +15,11 @@ int gvp11_detect(struct scsi_host_template *);
15int gvp11_release(struct Scsi_Host *); 15int gvp11_release(struct Scsi_Host *);
16 16
17#ifndef CMD_PER_LUN 17#ifndef CMD_PER_LUN
18#define CMD_PER_LUN 2 18#define CMD_PER_LUN 2
19#endif 19#endif
20 20
21#ifndef CAN_QUEUE 21#ifndef CAN_QUEUE
22#define CAN_QUEUE 16 22#define CAN_QUEUE 16
23#endif 23#endif
24 24
25#ifndef HOSTS_C 25#ifndef HOSTS_C
@@ -28,24 +28,24 @@ int gvp11_release(struct Scsi_Host *);
28 * if the transfer address ANDed with this results in a non-zero 28 * if the transfer address ANDed with this results in a non-zero
29 * result, then we can't use DMA. 29 * result, then we can't use DMA.
30 */ 30 */
31#define GVP11_XFER_MASK (0xff000001) 31#define GVP11_XFER_MASK (0xff000001)
32 32
33typedef struct { 33typedef struct {
34 unsigned char pad1[64]; 34 unsigned char pad1[64];
35 volatile unsigned short CNTR; 35 volatile unsigned short CNTR;
36 unsigned char pad2[31]; 36 unsigned char pad2[31];
37 volatile unsigned char SASR; 37 volatile unsigned char SASR;
38 unsigned char pad3; 38 unsigned char pad3;
39 volatile unsigned char SCMD; 39 volatile unsigned char SCMD;
40 unsigned char pad4[4]; 40 unsigned char pad4[4];
41 volatile unsigned short BANK; 41 volatile unsigned short BANK;
42 unsigned char pad5[6]; 42 unsigned char pad5[6];
43 volatile unsigned long ACR; 43 volatile unsigned long ACR;
44 volatile unsigned short secret1; /* store 0 here */ 44 volatile unsigned short secret1; /* store 0 here */
45 volatile unsigned short ST_DMA; 45 volatile unsigned short ST_DMA;
46 volatile unsigned short SP_DMA; 46 volatile unsigned short SP_DMA;
47 volatile unsigned short secret2; /* store 1 here */ 47 volatile unsigned short secret2; /* store 1 here */
48 volatile unsigned short secret3; /* store 15 here */ 48 volatile unsigned short secret3; /* store 15 here */
49} gvp11_scsiregs; 49} gvp11_scsiregs;
50 50
51/* bits in CNTR */ 51/* bits in CNTR */
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-25 17:24:04 -0400