diff options
| author | Tiejun Chen <tiejun.chen@intel.com> | 2014-12-23 03:21:11 -0500 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2014-12-27 15:52:10 -0500 |
| commit | baa035227b2e8b4bfba8f6176dc06c60477f1634 (patch) | |
| tree | 409ad6a2961ed62a79a1e329337d91e406a64d08 | |
| parent | 97bf6af1f928216fd6c5a66e8a57bfa95a659672 (diff) | |
kvm: x86: vmx: reorder some msr writing
The commit 34a1cd60d17f, "x86: vmx: move some vmx setting from
vmx_init() to hardware_setup()", tried to refactor some codes
specific to vmx hardware setting into hardware_setup(), but some
msr writing should depend on our previous setting condition like
enable_apicv, enable_ept and so on.
Reported-by: Jamie Heilman <jamie@audible.transient.net>
Tested-by: Jamie Heilman <jamie@audible.transient.net>
Signed-off-by: Tiejun Chen <tiejun.chen@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| -rw-r--r-- | arch/x86/kvm/vmx.c | 88 |
1 files changed, 44 insertions, 44 deletions
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index feb852b04598..d4c58d884838 100644 --- a/arch/x86/kvm/vmx.c +++ b/arch/x86/kvm/vmx.c | |||
| @@ -5840,53 +5840,10 @@ static __init int hardware_setup(void) | |||
| 5840 | memset(vmx_msr_bitmap_legacy, 0xff, PAGE_SIZE); | 5840 | memset(vmx_msr_bitmap_legacy, 0xff, PAGE_SIZE); |
| 5841 | memset(vmx_msr_bitmap_longmode, 0xff, PAGE_SIZE); | 5841 | memset(vmx_msr_bitmap_longmode, 0xff, PAGE_SIZE); |
| 5842 | 5842 | ||
| 5843 | vmx_disable_intercept_for_msr(MSR_FS_BASE, false); | ||
| 5844 | vmx_disable_intercept_for_msr(MSR_GS_BASE, false); | ||
| 5845 | vmx_disable_intercept_for_msr(MSR_KERNEL_GS_BASE, true); | ||
| 5846 | vmx_disable_intercept_for_msr(MSR_IA32_SYSENTER_CS, false); | ||
| 5847 | vmx_disable_intercept_for_msr(MSR_IA32_SYSENTER_ESP, false); | ||
| 5848 | vmx_disable_intercept_for_msr(MSR_IA32_SYSENTER_EIP, false); | ||
| 5849 | vmx_disable_intercept_for_msr(MSR_IA32_BNDCFGS, true); | ||
| 5850 | |||
| 5851 | memcpy(vmx_msr_bitmap_legacy_x2apic, | ||
| 5852 | vmx_msr_bitmap_legacy, PAGE_SIZE); | ||
| 5853 | memcpy(vmx_msr_bitmap_longmode_x2apic, | ||
| 5854 | vmx_msr_bitmap_longmode, PAGE_SIZE); | ||
| 5855 | |||
| 5856 | if (enable_apicv) { | ||
| 5857 | for (msr = 0x800; msr <= 0x8ff; msr++) | ||
| 5858 | vmx_disable_intercept_msr_read_x2apic(msr); | ||
| 5859 | |||
| 5860 | /* According SDM, in x2apic mode, the whole id reg is used. | ||
| 5861 | * But in KVM, it only use the highest eight bits. Need to | ||
| 5862 | * intercept it */ | ||
| 5863 | vmx_enable_intercept_msr_read_x2apic(0x802); | ||
| 5864 | /* TMCCT */ | ||
| 5865 | vmx_enable_intercept_msr_read_x2apic(0x839); | ||
| 5866 | /* TPR */ | ||
| 5867 | vmx_disable_intercept_msr_write_x2apic(0x808); | ||
| 5868 | /* EOI */ | ||
| 5869 | vmx_disable_intercept_msr_write_x2apic(0x80b); | ||
| 5870 | /* SELF-IPI */ | ||
| 5871 | vmx_disable_intercept_msr_write_x2apic(0x83f); | ||
| 5872 | } | ||
| 5873 | |||
| 5874 | if (enable_ept) { | ||
| 5875 | kvm_mmu_set_mask_ptes(0ull, | ||
| 5876 | (enable_ept_ad_bits) ? VMX_EPT_ACCESS_BIT : 0ull, | ||
| 5877 | (enable_ept_ad_bits) ? VMX_EPT_DIRTY_BIT : 0ull, | ||
| 5878 | 0ull, VMX_EPT_EXECUTABLE_MASK); | ||
| 5879 | ept_set_mmio_spte_mask(); | ||
| 5880 | kvm_enable_tdp(); | ||
| 5881 | } else | ||
| 5882 | kvm_disable_tdp(); | ||
| 5883 | |||
| 5884 | update_ple_window_actual_max(); | ||
| 5885 | |||
| 5886 | if (setup_vmcs_config(&vmcs_config) < 0) { | 5843 | if (setup_vmcs_config(&vmcs_config) < 0) { |
| 5887 | r = -EIO; | 5844 | r = -EIO; |
| 5888 | goto out7; | 5845 | goto out7; |
| 5889 | } | 5846 | } |
| 5890 | 5847 | ||
| 5891 | if (boot_cpu_has(X86_FEATURE_NX)) | 5848 | if (boot_cpu_has(X86_FEATURE_NX)) |
| 5892 | kvm_enable_efer_bits(EFER_NX); | 5849 | kvm_enable_efer_bits(EFER_NX); |
| @@ -5945,6 +5902,49 @@ static __init int hardware_setup(void) | |||
| 5945 | if (nested) | 5902 | if (nested) |
| 5946 | nested_vmx_setup_ctls_msrs(); | 5903 | nested_vmx_setup_ctls_msrs(); |
| 5947 | 5904 | ||
| 5905 | vmx_disable_intercept_for_msr(MSR_FS_BASE, false); | ||
| 5906 | vmx_disable_intercept_for_msr(MSR_GS_BASE, false); | ||
| 5907 | vmx_disable_intercept_for_msr(MSR_KERNEL_GS_BASE, true); | ||
| 5908 | vmx_disable_intercept_for_msr(MSR_IA32_SYSENTER_CS, false); | ||
| 5909 | vmx_disable_intercept_for_msr(MSR_IA32_SYSENTER_ESP, false); | ||
| 5910 | vmx_disable_intercept_for_msr(MSR_IA32_SYSENTER_EIP, false); | ||
| 5911 | vmx_disable_intercept_for_msr(MSR_IA32_BNDCFGS, true); | ||
| 5912 | |||
| 5913 | memcpy(vmx_msr_bitmap_legacy_x2apic, | ||
| 5914 | vmx_msr_bitmap_legacy, PAGE_SIZE); | ||
| 5915 | memcpy(vmx_msr_bitmap_longmode_x2apic, | ||
| 5916 | vmx_msr_bitmap_longmode, PAGE_SIZE); | ||
| 5917 | |||
| 5918 | if (enable_apicv) { | ||
| 5919 | for (msr = 0x800; msr <= 0x8ff; msr++) | ||
| 5920 | vmx_disable_intercept_msr_read_x2apic(msr); | ||
| 5921 | |||
| 5922 | /* According SDM, in x2apic mode, the whole id reg is used. | ||
| 5923 | * But in KVM, it only use the highest eight bits. Need to | ||
| 5924 | * intercept it */ | ||
| 5925 | vmx_enable_intercept_msr_read_x2apic(0x802); | ||
| 5926 | /* TMCCT */ | ||
| 5927 | vmx_enable_intercept_msr_read_x2apic(0x839); | ||
| 5928 | /* TPR */ | ||
| 5929 | vmx_disable_intercept_msr_write_x2apic(0x808); | ||
| 5930 | /* EOI */ | ||
| 5931 | vmx_disable_intercept_msr_write_x2apic(0x80b); | ||
| 5932 | /* SELF-IPI */ | ||
| 5933 | vmx_disable_intercept_msr_write_x2apic(0x83f); | ||
| 5934 | } | ||
| 5935 | |||
| 5936 | if (enable_ept) { | ||
| 5937 | kvm_mmu_set_mask_ptes(0ull, | ||
| 5938 | (enable_ept_ad_bits) ? VMX_EPT_ACCESS_BIT : 0ull, | ||
| 5939 | (enable_ept_ad_bits) ? VMX_EPT_DIRTY_BIT : 0ull, | ||
| 5940 | 0ull, VMX_EPT_EXECUTABLE_MASK); | ||
| 5941 | ept_set_mmio_spte_mask(); | ||
| 5942 | kvm_enable_tdp(); | ||
| 5943 | } else | ||
| 5944 | kvm_disable_tdp(); | ||
| 5945 | |||
| 5946 | update_ple_window_actual_max(); | ||
| 5947 | |||
| 5948 | return alloc_kvm_area(); | 5948 | return alloc_kvm_area(); |
| 5949 | 5949 | ||
| 5950 | out7: | 5950 | out7: |
