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authorMark Brown <broonie@opensource.wolfsonmicro.com>2012-03-05 19:25:28 -0500
committerMark Brown <broonie@opensource.wolfsonmicro.com>2012-03-05 19:26:05 -0500
commitba106ce3d04db9085d32b47aee545c35b586827a (patch)
tree6855e5cadbc7d3eee8a8adcc13c391c55656cf5c
parentfbe4ff795f3c081e2cc21507b804b5ddc78cd362 (diff)
ASoC: wm8962: Remove defaults for volatile registers
Save a little RAM. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
-rw-r--r--sound/soc/codecs/wm8962.c17
1 files changed, 3 insertions, 14 deletions
diff --git a/sound/soc/codecs/wm8962.c b/sound/soc/codecs/wm8962.c
index b4d472f7f8e9..5bcb350bacc1 100644
--- a/sound/soc/codecs/wm8962.c
+++ b/sound/soc/codecs/wm8962.c
@@ -116,11 +116,11 @@ static struct reg_default wm8962_reg[] = {
116 { 1, 0x049F }, /* R1 - Right Input volume */ 116 { 1, 0x049F }, /* R1 - Right Input volume */
117 { 2, 0x0000 }, /* R2 - HPOUTL volume */ 117 { 2, 0x0000 }, /* R2 - HPOUTL volume */
118 { 3, 0x0000 }, /* R3 - HPOUTR volume */ 118 { 3, 0x0000 }, /* R3 - HPOUTR volume */
119 { 4, 0x0020 }, /* R4 - Clocking1 */ 119
120 { 5, 0x0018 }, /* R5 - ADC & DAC Control 1 */ 120 { 5, 0x0018 }, /* R5 - ADC & DAC Control 1 */
121 { 6, 0x2008 }, /* R6 - ADC & DAC Control 2 */ 121 { 6, 0x2008 }, /* R6 - ADC & DAC Control 2 */
122 { 7, 0x000A }, /* R7 - Audio Interface 0 */ 122 { 7, 0x000A }, /* R7 - Audio Interface 0 */
123 { 8, 0x01E4 }, /* R8 - Clocking2 */ 123
124 { 9, 0x0300 }, /* R9 - Audio Interface 1 */ 124 { 9, 0x0300 }, /* R9 - Audio Interface 1 */
125 { 10, 0x00C0 }, /* R10 - Left DAC volume */ 125 { 10, 0x00C0 }, /* R10 - Left DAC volume */
126 { 11, 0x00C0 }, /* R11 - Right DAC volume */ 126 { 11, 0x00C0 }, /* R11 - Right DAC volume */
@@ -129,7 +129,7 @@ static struct reg_default wm8962_reg[] = {
129 { 15, 0x6243 }, /* R15 - Software Reset */ 129 { 15, 0x6243 }, /* R15 - Software Reset */
130 130
131 { 17, 0x007B }, /* R17 - ALC1 */ 131 { 17, 0x007B }, /* R17 - ALC1 */
132 { 18, 0x0000 }, /* R18 - ALC2 */ 132
133 { 19, 0x1C32 }, /* R19 - ALC3 */ 133 { 19, 0x1C32 }, /* R19 - ALC3 */
134 { 20, 0x3200 }, /* R20 - Noise Gate */ 134 { 20, 0x3200 }, /* R20 - Noise Gate */
135 { 21, 0x00C0 }, /* R21 - Left ADC volume */ 135 { 21, 0x00C0 }, /* R21 - Left ADC volume */
@@ -153,10 +153,6 @@ static struct reg_default wm8962_reg[] = {
153 { 40, 0x0000 }, /* R40 - SPKOUTL volume */ 153 { 40, 0x0000 }, /* R40 - SPKOUTL volume */
154 { 41, 0x0000 }, /* R41 - SPKOUTR volume */ 154 { 41, 0x0000 }, /* R41 - SPKOUTR volume */
155 155
156 { 47, 0x0000 }, /* R47 - Thermal Shutdown Status */
157 { 48, 0x8027 }, /* R48 - Additional Control (4) */
158 { 49, 0x0010 }, /* R49 - Class D Control 1 */
159
160 { 51, 0x0003 }, /* R51 - Class D Control 2 */ 156 { 51, 0x0003 }, /* R51 - Class D Control 2 */
161 157
162 { 56, 0x0506 }, /* R56 - Clocking 4 */ 158 { 56, 0x0506 }, /* R56 - Clocking 4 */
@@ -168,8 +164,6 @@ static struct reg_default wm8962_reg[] = {
168 164
169 { 64, 0x0810 }, /* R64 - DC Servo 4 */ 165 { 64, 0x0810 }, /* R64 - DC Servo 4 */
170 166
171 { 66, 0x0000 }, /* R66 - DC Servo 6 */
172
173 { 68, 0x001B }, /* R68 - Analogue PGA Bias */ 167 { 68, 0x001B }, /* R68 - Analogue PGA Bias */
174 { 69, 0x0000 }, /* R69 - Analogue HP 0 */ 168 { 69, 0x0000 }, /* R69 - Analogue HP 0 */
175 169
@@ -302,9 +296,6 @@ static struct reg_default wm8962_reg[] = {
302 { 516, 0x8100 }, /* R516 - GPIO 5 */ 296 { 516, 0x8100 }, /* R516 - GPIO 5 */
303 { 517, 0x8100 }, /* R517 - GPIO 6 */ 297 { 517, 0x8100 }, /* R517 - GPIO 6 */
304 298
305 { 560, 0x0000 }, /* R560 - Interrupt Status 1 */
306 { 561, 0x0000 }, /* R561 - Interrupt Status 2 */
307
308 { 568, 0x0030 }, /* R568 - Interrupt Status 1 Mask */ 299 { 568, 0x0030 }, /* R568 - Interrupt Status 1 Mask */
309 { 569, 0xFFED }, /* R569 - Interrupt Status 2 Mask */ 300 { 569, 0xFFED }, /* R569 - Interrupt Status 2 Mask */
310 301
@@ -316,8 +307,6 @@ static struct reg_default wm8962_reg[] = {
316 307
317 { 768, 0x1C00 }, /* R768 - DSP2 Power Management */ 308 { 768, 0x1C00 }, /* R768 - DSP2 Power Management */
318 309
319 { 1037, 0x0000 }, /* R1037 - DSP2_ExecControl */
320
321 { 8192, 0x0000 }, /* R8192 - DSP2 Instruction RAM 0 */ 310 { 8192, 0x0000 }, /* R8192 - DSP2 Instruction RAM 0 */
322 311
323 { 9216, 0x0030 }, /* R9216 - DSP2 Address RAM 2 */ 312 { 9216, 0x0030 }, /* R9216 - DSP2 Address RAM 2 */