dma: tegra: implement flags parameters for cyclic transfer

The flag parameter is added in the cyclic transfer request.
Use the flag option of:
- DMA_PREP_INTERRUPT for enabling interrupt.
- DMA_CTRL_ACK for deciding whether ack is requred or not for
  descriptor.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
CC: <stable@vger.kernel.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>

1 files changed, 6 insertions, 2 deletions

diff --git a/drivers/dma/tegra20-apb-dma.c b/drivers/dma/tegra20-apb-dma.c
index efdfffa13349..bf58bb8b0206 100644
--- a/drivers/dma/tegra20-apb-dma.c
+++ b/drivers/dma/tegra20-apb-dma.c
@@ -266,6 +266,7 @@ static struct tegra_dma_desc *tegra_dma_desc_get(
                 if (async_tx_test_ack(&dma_desc->txd)) {
                         list_del(&dma_desc->node);
                         spin_unlock_irqrestore(&tdc->lock, flags);
+                        dma_desc->txd.flags = 0;
                         return dma_desc;
                 }
         }
@@ -1050,7 +1051,9 @@ struct dma_async_tx_descriptor *tegra_dma_prep_dma_cyclic(
                                         TEGRA_APBDMA_AHBSEQ_WRAP_SHIFT;
         ahb_seq |= TEGRA_APBDMA_AHBSEQ_BUS_WIDTH_32;
 
-        csr |= TEGRA_APBDMA_CSR_FLOW | TEGRA_APBDMA_CSR_IE_EOC;
+        csr |= TEGRA_APBDMA_CSR_FLOW;
+        if (flags & DMA_PREP_INTERRUPT)
+                csr |= TEGRA_APBDMA_CSR_IE_EOC;
         csr |= tdc->dma_sconfig.slave_id << TEGRA_APBDMA_CSR_REQ_SEL_SHIFT;
 
         apb_seq |= TEGRA_APBDMA_APBSEQ_WRAP_WORD_1;
@@ -1095,7 +1098,8 @@ struct dma_async_tx_descriptor *tegra_dma_prep_dma_cyclic(
                 mem += len;
         }
         sg_req->last_sg = true;
-        dma_desc->txd.flags = 0;
+        if (flags & DMA_CTRL_ACK)
+                dma_desc->txd.flags = DMA_CTRL_ACK;
 
         /*
          * Make sure that mode should not be conflicting with currently