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authorKuninori Morimoto <kuninori.morimoto.gx@renesas.com>2014-07-29 03:37:31 -0400
committerMark Brown <broonie@linaro.org>2014-07-29 08:07:00 -0400
commitb8c637864a6904a9ba8e0df556d5bdf9f26b2c54 (patch)
treec38aa4ae72441edf1684d789c8036893158ac1b7
parentd62a3dcd4d75b1713d12697afdbffaf9a9da8f43 (diff)
ASoC: rsnd: use regmap_mmio instead of original regmap bus
Current rsnd driver is using regmap and regmap_field. It used original regmap bus which is single regmap instance for multi register mapping. This patch modifies it to use regmap_mmio bus, and tidyuped probe method Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat
-rw-r--r--sound/soc/sh/Kconfig2
-rw-r--r--sound/soc/sh/rcar/gen.c439
2 files changed, 189 insertions, 252 deletions
diff --git a/sound/soc/sh/Kconfig b/sound/soc/sh/Kconfig
index b43fdf0d08af..80245b6eebd6 100644
--- a/sound/soc/sh/Kconfig
+++ b/sound/soc/sh/Kconfig
@@ -37,7 +37,7 @@ config SND_SOC_SH4_SIU
37config SND_SOC_RCAR 37config SND_SOC_RCAR
38 tristate "R-Car series SRU/SCU/SSIU/SSI support" 38 tristate "R-Car series SRU/SCU/SSIU/SSI support"
39 select SND_SIMPLE_CARD 39 select SND_SIMPLE_CARD
40 select REGMAP 40 select REGMAP_MMIO
41 help 41 help
42 This option enables R-Car SUR/SCU/SSIU/SSI sound support 42 This option enables R-Car SUR/SCU/SSIU/SSI sound support
43 43
diff --git a/sound/soc/sh/rcar/gen.c b/sound/soc/sh/rcar/gen.c
index 73ce4c90efda..5f9e0722abcf 100644
--- a/sound/soc/sh/rcar/gen.c
+++ b/sound/soc/sh/rcar/gen.c
@@ -15,63 +15,35 @@ struct rsnd_gen {
15 15
16 struct rsnd_gen_ops *ops; 16 struct rsnd_gen_ops *ops;
17 17
18 struct regmap *regmap; 18 struct regmap *regmap[RSND_BASE_MAX];
19 struct regmap_field *regs[RSND_REG_MAX]; 19 struct regmap_field *regs[RSND_REG_MAX];
20}; 20};
21 21
22#define rsnd_priv_to_gen(p) ((struct rsnd_gen *)(p)->gen) 22#define rsnd_priv_to_gen(p) ((struct rsnd_gen *)(p)->gen)
23 23
24#define RSND_REG_SET(gen, id, reg_id, offset, _id_offset, _id_size) \ 24struct rsnd_regmap_field_conf {
25 [id] = { \ 25 int idx;
26 .reg = (unsigned int)gen->base[reg_id] + offset, \ 26 unsigned int reg_offset;
27 .lsb = 0, \ 27 unsigned int id_offset;
28 .msb = 31, \ 28};
29 .id_size = _id_size, \
30 .id_offset = _id_offset, \
31 }
32
33/*
34 * basic function
35 */
36static int rsnd_regmap_write32(void *context, const void *_data, size_t count)
37{
38 struct rsnd_priv *priv = context;
39 struct device *dev = rsnd_priv_to_dev(priv);
40 u32 *data = (u32 *)_data;
41 u32 val = data[1];
42 void __iomem *reg = (void *)data[0];
43
44 iowrite32(val, reg);
45
46 dev_dbg(dev, "w %p : %08x\n", reg, val);
47
48 return 0;
49}
50
51static int rsnd_regmap_read32(void *context,
52 const void *_data, size_t reg_size,
53 void *_val, size_t val_size)
54{
55 struct rsnd_priv *priv = context;
56 struct device *dev = rsnd_priv_to_dev(priv);
57 u32 *data = (u32 *)_data;
58 u32 *val = (u32 *)_val;
59 void __iomem *reg = (void *)data[0];
60
61 *val = ioread32(reg);
62
63 dev_dbg(dev, "r %p : %08x\n", reg, *val);
64 29
65 return 0; 30#define RSND_REG_SET(id, offset, _id_offset) \
31{ \
32 .idx = id, \
33 .reg_offset = offset, \
34 .id_offset = _id_offset, \
66} 35}
36/* single address mapping */
37#define RSND_GEN_S_REG(id, offset) \
38 RSND_REG_SET(RSND_REG_##id, offset, 0)
67 39
68static struct regmap_bus rsnd_regmap_bus = { 40/* multi address mapping */
69 .write = rsnd_regmap_write32, 41#define RSND_GEN_M_REG(id, offset, _id_offset) \
70 .read = rsnd_regmap_read32, 42 RSND_REG_SET(RSND_REG_##id, offset, _id_offset)
71 .reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
72 .val_format_endian_default = REGMAP_ENDIAN_NATIVE,
73};
74 43
44/*
45 * basic function
46 */
75static int rsnd_is_accessible_reg(struct rsnd_priv *priv, 47static int rsnd_is_accessible_reg(struct rsnd_priv *priv,
76 struct rsnd_gen *gen, enum rsnd_reg reg) 48 struct rsnd_gen *gen, enum rsnd_reg reg)
77{ 49{
@@ -88,6 +60,7 @@ static int rsnd_is_accessible_reg(struct rsnd_priv *priv,
88u32 rsnd_read(struct rsnd_priv *priv, 60u32 rsnd_read(struct rsnd_priv *priv,
89 struct rsnd_mod *mod, enum rsnd_reg reg) 61 struct rsnd_mod *mod, enum rsnd_reg reg)
90{ 62{
63 struct device *dev = rsnd_priv_to_dev(priv);
91 struct rsnd_gen *gen = rsnd_priv_to_gen(priv); 64 struct rsnd_gen *gen = rsnd_priv_to_gen(priv);
92 u32 val; 65 u32 val;
93 66
@@ -96,6 +69,8 @@ u32 rsnd_read(struct rsnd_priv *priv,
96 69
97 regmap_fields_read(gen->regs[reg], rsnd_mod_id(mod), &val); 70 regmap_fields_read(gen->regs[reg], rsnd_mod_id(mod), &val);
98 71
72 dev_dbg(dev, "r %s - 0x%04d : %08x\n", rsnd_mod_name(mod), reg, val);
73
99 return val; 74 return val;
100} 75}
101 76
@@ -103,12 +78,15 @@ void rsnd_write(struct rsnd_priv *priv,
103 struct rsnd_mod *mod, 78 struct rsnd_mod *mod,
104 enum rsnd_reg reg, u32 data) 79 enum rsnd_reg reg, u32 data)
105{ 80{
81 struct device *dev = rsnd_priv_to_dev(priv);
106 struct rsnd_gen *gen = rsnd_priv_to_gen(priv); 82 struct rsnd_gen *gen = rsnd_priv_to_gen(priv);
107 83
108 if (!rsnd_is_accessible_reg(priv, gen, reg)) 84 if (!rsnd_is_accessible_reg(priv, gen, reg))
109 return; 85 return;
110 86
111 regmap_fields_write(gen->regs[reg], rsnd_mod_id(mod), data); 87 regmap_fields_write(gen->regs[reg], rsnd_mod_id(mod), data);
88
89 dev_dbg(dev, "w %s - 0x%04d : %08x\n", rsnd_mod_name(mod), reg, data);
112} 90}
113 91
114void rsnd_bset(struct rsnd_priv *priv, struct rsnd_mod *mod, 92void rsnd_bset(struct rsnd_priv *priv, struct rsnd_mod *mod,
@@ -123,33 +101,58 @@ void rsnd_bset(struct rsnd_priv *priv, struct rsnd_mod *mod,
123 mask, data); 101 mask, data);
124} 102}
125 103
126static int rsnd_gen_regmap_init(struct rsnd_priv *priv, 104#define rsnd_gen_regmap_init(priv, id_size, reg_id, conf) \
127 struct rsnd_gen *gen, 105 _rsnd_gen_regmap_init(priv, id_size, reg_id, conf, ARRAY_SIZE(conf))
128 struct reg_field *regf) 106static int _rsnd_gen_regmap_init(struct rsnd_priv *priv,
107 int id_size,
108 int reg_id,
109 struct rsnd_regmap_field_conf *conf,
110 int conf_size)
129{ 111{
130 int i; 112 struct platform_device *pdev = rsnd_priv_to_pdev(priv);
113 struct rsnd_gen *gen = rsnd_priv_to_gen(priv);
131 struct device *dev = rsnd_priv_to_dev(priv); 114 struct device *dev = rsnd_priv_to_dev(priv);
115 struct resource *res;
132 struct regmap_config regc; 116 struct regmap_config regc;
117 struct regmap_field *regs;
118 struct regmap *regmap;
119 struct reg_field regf;
120 void __iomem *base;
121 int i;
133 122
134 memset(&regc, 0, sizeof(regc)); 123 memset(&regc, 0, sizeof(regc));
135 regc.reg_bits = 32; 124 regc.reg_bits = 32;
136 regc.val_bits = 32; 125 regc.val_bits = 32;
126 regc.reg_stride = 4;
137 127
138 gen->regmap = devm_regmap_init(dev, &rsnd_regmap_bus, priv, &regc); 128 res = platform_get_resource(pdev, IORESOURCE_MEM, reg_id);
139 if (IS_ERR(gen->regmap)) { 129 if (!res)
140 dev_err(dev, "regmap error %ld\n", PTR_ERR(gen->regmap)); 130 return -ENODEV;
141 return PTR_ERR(gen->regmap); 131
142 } 132 base = devm_ioremap_resource(dev, res);
133 if (IS_ERR(base))
134 return PTR_ERR(base);
143 135
144 for (i = 0; i < RSND_REG_MAX; i++) { 136 regmap = devm_regmap_init_mmio(dev, base, &regc);
145 gen->regs[i] = NULL; 137 if (IS_ERR(regmap))
146 if (!regf[i].reg) 138 return PTR_ERR(regmap);
147 continue;
148 139
149 gen->regs[i] = devm_regmap_field_alloc(dev, gen->regmap, regf[i]); 140 gen->base[reg_id] = base;
150 if (IS_ERR(gen->regs[i])) 141 gen->regmap[reg_id] = regmap;
151 return PTR_ERR(gen->regs[i]);
152 142
143 for (i = 0; i < conf_size; i++) {
144
145 regf.reg = conf[i].reg_offset;
146 regf.id_offset = conf[i].id_offset;
147 regf.lsb = 0;
148 regf.msb = 31;
149 regf.id_size = id_size;
150
151 regs = devm_regmap_field_alloc(dev, regmap, regf);
152 if (IS_ERR(regs))
153 return PTR_ERR(regs);
154
155 gen->regs[conf[i].idx] = regs;
153 } 156 }
154 157
155 return 0; 158 return 0;
@@ -271,119 +274,85 @@ dma_addr_t rsnd_gen_dma_addr(struct rsnd_priv *priv,
271/* 274/*
272 * Gen2 275 * Gen2
273 */ 276 */
274
275/* single address mapping */
276#define RSND_GEN2_S_REG(gen, reg, id, offset) \
277 RSND_REG_SET(gen, RSND_REG_##id, RSND_GEN2_##reg, offset, 0, 10)
278
279/* multi address mapping */
280#define RSND_GEN2_M_REG(gen, reg, id, offset, _id_offset) \
281 RSND_REG_SET(gen, RSND_REG_##id, RSND_GEN2_##reg, offset, _id_offset, 10)
282
283static int rsnd_gen2_regmap_init(struct rsnd_priv *priv, struct rsnd_gen *gen)
284{
285 struct reg_field regf[RSND_REG_MAX] = {
286 RSND_GEN2_S_REG(gen, SSIU, SSI_MODE0, 0x800),
287 RSND_GEN2_S_REG(gen, SSIU, SSI_MODE1, 0x804),
288 /* FIXME: it needs SSI_MODE2/3 in the future */
289 RSND_GEN2_M_REG(gen, SSIU, SSI_BUSIF_MODE, 0x0, 0x80),
290 RSND_GEN2_M_REG(gen, SSIU, SSI_BUSIF_ADINR,0x4, 0x80),
291 RSND_GEN2_M_REG(gen, SSIU, SSI_CTRL, 0x10, 0x80),
292 RSND_GEN2_M_REG(gen, SSIU, INT_ENABLE, 0x18, 0x80),
293
294 RSND_GEN2_M_REG(gen, SCU, SRC_BUSIF_MODE, 0x0, 0x20),
295 RSND_GEN2_M_REG(gen, SCU, SRC_ROUTE_MODE0,0xc, 0x20),
296 RSND_GEN2_M_REG(gen, SCU, SRC_CTRL, 0x10, 0x20),
297 RSND_GEN2_M_REG(gen, SCU, CMD_ROUTE_SLCT, 0x18c, 0x20),
298 RSND_GEN2_M_REG(gen, SCU, CMD_CTRL, 0x190, 0x20),
299 RSND_GEN2_M_REG(gen, SCU, SRC_SWRSR, 0x200, 0x40),
300 RSND_GEN2_M_REG(gen, SCU, SRC_SRCIR, 0x204, 0x40),
301 RSND_GEN2_M_REG(gen, SCU, SRC_ADINR, 0x214, 0x40),
302 RSND_GEN2_M_REG(gen, SCU, SRC_IFSCR, 0x21c, 0x40),
303 RSND_GEN2_M_REG(gen, SCU, SRC_IFSVR, 0x220, 0x40),
304 RSND_GEN2_M_REG(gen, SCU, SRC_SRCCR, 0x224, 0x40),
305 RSND_GEN2_M_REG(gen, SCU, SRC_BSDSR, 0x22c, 0x40),
306 RSND_GEN2_M_REG(gen, SCU, SRC_BSISR, 0x238, 0x40),
307 RSND_GEN2_M_REG(gen, SCU, DVC_SWRSR, 0xe00, 0x100),
308 RSND_GEN2_M_REG(gen, SCU, DVC_DVUIR, 0xe04, 0x100),
309 RSND_GEN2_M_REG(gen, SCU, DVC_ADINR, 0xe08, 0x100),
310 RSND_GEN2_M_REG(gen, SCU, DVC_DVUCR, 0xe10, 0x100),
311 RSND_GEN2_M_REG(gen, SCU, DVC_ZCMCR, 0xe14, 0x100),
312 RSND_GEN2_M_REG(gen, SCU, DVC_VOL0R, 0xe28, 0x100),
313 RSND_GEN2_M_REG(gen, SCU, DVC_VOL1R, 0xe2c, 0x100),
314 RSND_GEN2_M_REG(gen, SCU, DVC_DVUER, 0xe48, 0x100),
315
316 RSND_GEN2_S_REG(gen, ADG, BRRA, 0x00),
317 RSND_GEN2_S_REG(gen, ADG, BRRB, 0x04),
318 RSND_GEN2_S_REG(gen, ADG, SSICKR, 0x08),
319 RSND_GEN2_S_REG(gen, ADG, AUDIO_CLK_SEL0, 0x0c),
320 RSND_GEN2_S_REG(gen, ADG, AUDIO_CLK_SEL1, 0x10),
321 RSND_GEN2_S_REG(gen, ADG, AUDIO_CLK_SEL2, 0x14),
322 RSND_GEN2_S_REG(gen, ADG, DIV_EN, 0x30),
323 RSND_GEN2_S_REG(gen, ADG, SRCIN_TIMSEL0, 0x34),
324 RSND_GEN2_S_REG(gen, ADG, SRCIN_TIMSEL1, 0x38),
325 RSND_GEN2_S_REG(gen, ADG, SRCIN_TIMSEL2, 0x3c),
326 RSND_GEN2_S_REG(gen, ADG, SRCIN_TIMSEL3, 0x40),
327 RSND_GEN2_S_REG(gen, ADG, SRCIN_TIMSEL4, 0x44),
328 RSND_GEN2_S_REG(gen, ADG, SRCOUT_TIMSEL0, 0x48),
329 RSND_GEN2_S_REG(gen, ADG, SRCOUT_TIMSEL1, 0x4c),
330 RSND_GEN2_S_REG(gen, ADG, SRCOUT_TIMSEL2, 0x50),
331 RSND_GEN2_S_REG(gen, ADG, SRCOUT_TIMSEL3, 0x54),
332 RSND_GEN2_S_REG(gen, ADG, SRCOUT_TIMSEL4, 0x58),
333 RSND_GEN2_S_REG(gen, ADG, CMDOUT_TIMSEL, 0x5c),
334
335 RSND_GEN2_M_REG(gen, SSI, SSICR, 0x00, 0x40),
336 RSND_GEN2_M_REG(gen, SSI, SSISR, 0x04, 0x40),
337 RSND_GEN2_M_REG(gen, SSI, SSITDR, 0x08, 0x40),
338 RSND_GEN2_M_REG(gen, SSI, SSIRDR, 0x0c, 0x40),
339 RSND_GEN2_M_REG(gen, SSI, SSIWSR, 0x20, 0x40),
340 };
341
342 return rsnd_gen_regmap_init(priv, gen, regf);
343}
344
345static int rsnd_gen2_probe(struct platform_device *pdev, 277static int rsnd_gen2_probe(struct platform_device *pdev,
346 struct rsnd_priv *priv) 278 struct rsnd_priv *priv)
347{ 279{
348 struct device *dev = rsnd_priv_to_dev(priv); 280 struct device *dev = rsnd_priv_to_dev(priv);
349 struct rsnd_gen *gen = rsnd_priv_to_gen(priv); 281 struct rsnd_regmap_field_conf conf_ssiu[] = {
350 struct resource *scu_res; 282 RSND_GEN_S_REG(SSI_MODE0, 0x800),
351 struct resource *adg_res; 283 RSND_GEN_S_REG(SSI_MODE1, 0x804),
352 struct resource *ssiu_res; 284 /* FIXME: it needs SSI_MODE2/3 in the future */
353 struct resource *ssi_res; 285 RSND_GEN_M_REG(SSI_BUSIF_MODE, 0x0, 0x80),
354 int ret; 286 RSND_GEN_M_REG(SSI_BUSIF_ADINR, 0x4, 0x80),
355 287 RSND_GEN_M_REG(SSI_CTRL, 0x10, 0x80),
356 /* 288 RSND_GEN_M_REG(INT_ENABLE, 0x18, 0x80),
357 * map address 289 };
358 */ 290 struct rsnd_regmap_field_conf conf_scu[] = {
359 scu_res = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN2_SCU); 291 RSND_GEN_M_REG(SRC_BUSIF_MODE, 0x0, 0x20),
360 adg_res = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN2_ADG); 292 RSND_GEN_M_REG(SRC_ROUTE_MODE0, 0xc, 0x20),
361 ssiu_res = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN2_SSIU); 293 RSND_GEN_M_REG(SRC_CTRL, 0x10, 0x20),
362 ssi_res = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN2_SSI); 294 RSND_GEN_M_REG(CMD_ROUTE_SLCT, 0x18c, 0x20),
363 295 RSND_GEN_M_REG(CMD_CTRL, 0x190, 0x20),
364 gen->base[RSND_GEN2_SCU] = devm_ioremap_resource(dev, scu_res); 296 RSND_GEN_M_REG(SRC_SWRSR, 0x200, 0x40),
365 gen->base[RSND_GEN2_ADG] = devm_ioremap_resource(dev, adg_res); 297 RSND_GEN_M_REG(SRC_SRCIR, 0x204, 0x40),
366 gen->base[RSND_GEN2_SSIU] = devm_ioremap_resource(dev, ssiu_res); 298 RSND_GEN_M_REG(SRC_ADINR, 0x214, 0x40),
367 gen->base[RSND_GEN2_SSI] = devm_ioremap_resource(dev, ssi_res); 299 RSND_GEN_M_REG(SRC_IFSCR, 0x21c, 0x40),
368 if (IS_ERR(gen->base[RSND_GEN2_SCU]) || 300 RSND_GEN_M_REG(SRC_IFSVR, 0x220, 0x40),
369 IS_ERR(gen->base[RSND_GEN2_ADG]) || 301 RSND_GEN_M_REG(SRC_SRCCR, 0x224, 0x40),
370 IS_ERR(gen->base[RSND_GEN2_SSIU]) || 302 RSND_GEN_M_REG(SRC_BSDSR, 0x22c, 0x40),
371 IS_ERR(gen->base[RSND_GEN2_SSI])) 303 RSND_GEN_M_REG(SRC_BSISR, 0x238, 0x40),
372 return -ENODEV; 304 RSND_GEN_M_REG(DVC_SWRSR, 0xe00, 0x100),
373 305 RSND_GEN_M_REG(DVC_DVUIR, 0xe04, 0x100),
374 ret = rsnd_gen2_regmap_init(priv, gen); 306 RSND_GEN_M_REG(DVC_ADINR, 0xe08, 0x100),
375 if (ret < 0) 307 RSND_GEN_M_REG(DVC_DVUCR, 0xe10, 0x100),
376 return ret; 308 RSND_GEN_M_REG(DVC_ZCMCR, 0xe14, 0x100),
377 309 RSND_GEN_M_REG(DVC_VOL0R, 0xe28, 0x100),
378 dev_dbg(dev, "Gen2 device probed\n"); 310 RSND_GEN_M_REG(DVC_VOL1R, 0xe2c, 0x100),
379 dev_dbg(dev, "SCU : %pap => %p\n", &scu_res->start, 311 RSND_GEN_M_REG(DVC_DVUER, 0xe48, 0x100),
380 gen->base[RSND_GEN2_SCU]); 312 };
381 dev_dbg(dev, "ADG : %pap => %p\n", &adg_res->start, 313 struct rsnd_regmap_field_conf conf_adg[] = {
382 gen->base[RSND_GEN2_ADG]); 314 RSND_GEN_S_REG(BRRA, 0x00),
383 dev_dbg(dev, "SSIU : %pap => %p\n", &ssiu_res->start, 315 RSND_GEN_S_REG(BRRB, 0x04),
384 gen->base[RSND_GEN2_SSIU]); 316 RSND_GEN_S_REG(SSICKR, 0x08),
385 dev_dbg(dev, "SSI : %pap => %p\n", &ssi_res->start, 317 RSND_GEN_S_REG(AUDIO_CLK_SEL0, 0x0c),
386 gen->base[RSND_GEN2_SSI]); 318 RSND_GEN_S_REG(AUDIO_CLK_SEL1, 0x10),
319 RSND_GEN_S_REG(AUDIO_CLK_SEL2, 0x14),
320 RSND_GEN_S_REG(DIV_EN, 0x30),
321 RSND_GEN_S_REG(SRCIN_TIMSEL0, 0x34),
322 RSND_GEN_S_REG(SRCIN_TIMSEL1, 0x38),
323 RSND_GEN_S_REG(SRCIN_TIMSEL2, 0x3c),
324 RSND_GEN_S_REG(SRCIN_TIMSEL3, 0x40),
325 RSND_GEN_S_REG(SRCIN_TIMSEL4, 0x44),
326 RSND_GEN_S_REG(SRCOUT_TIMSEL0, 0x48),
327 RSND_GEN_S_REG(SRCOUT_TIMSEL1, 0x4c),
328 RSND_GEN_S_REG(SRCOUT_TIMSEL2, 0x50),
329 RSND_GEN_S_REG(SRCOUT_TIMSEL3, 0x54),
330 RSND_GEN_S_REG(SRCOUT_TIMSEL4, 0x58),
331 RSND_GEN_S_REG(CMDOUT_TIMSEL, 0x5c),
332 };
333 struct rsnd_regmap_field_conf conf_ssi[] = {
334 RSND_GEN_M_REG(SSICR, 0x00, 0x40),
335 RSND_GEN_M_REG(SSISR, 0x04, 0x40),
336 RSND_GEN_M_REG(SSITDR, 0x08, 0x40),
337 RSND_GEN_M_REG(SSIRDR, 0x0c, 0x40),
338 RSND_GEN_M_REG(SSIWSR, 0x20, 0x40),
339 };
340 int ret_ssiu;
341 int ret_scu;
342 int ret_adg;
343 int ret_ssi;
344
345 ret_ssiu = rsnd_gen_regmap_init(priv, 10, RSND_GEN2_SSIU, conf_ssiu);
346 ret_scu = rsnd_gen_regmap_init(priv, 10, RSND_GEN2_SCU, conf_scu);
347 ret_adg = rsnd_gen_regmap_init(priv, 10, RSND_GEN2_ADG, conf_adg);
348 ret_ssi = rsnd_gen_regmap_init(priv, 10, RSND_GEN2_SSI, conf_ssi);
349 if (ret_ssiu < 0 ||
350 ret_scu < 0 ||
351 ret_adg < 0 ||
352 ret_ssi < 0)
353 return ret_ssiu | ret_scu | ret_adg | ret_ssi;
354
355 dev_dbg(dev, "Gen2 is probed\n");
387 356
388 return 0; 357 return 0;
389} 358}
@@ -392,92 +361,60 @@ static int rsnd_gen2_probe(struct platform_device *pdev,
392 * Gen1 361 * Gen1
393 */ 362 */
394 363
395/* single address mapping */
396#define RSND_GEN1_S_REG(gen, reg, id, offset) \
397 RSND_REG_SET(gen, RSND_REG_##id, RSND_GEN1_##reg, offset, 0, 9)
398
399/* multi address mapping */
400#define RSND_GEN1_M_REG(gen, reg, id, offset, _id_offset) \
401 RSND_REG_SET(gen, RSND_REG_##id, RSND_GEN1_##reg, offset, _id_offset, 9)
402
403static int rsnd_gen1_regmap_init(struct rsnd_priv *priv, struct rsnd_gen *gen)
404{
405 struct reg_field regf[RSND_REG_MAX] = {
406 RSND_GEN1_S_REG(gen, SRU, SRC_ROUTE_SEL, 0x00),
407 RSND_GEN1_S_REG(gen, SRU, SRC_TMG_SEL0, 0x08),
408 RSND_GEN1_S_REG(gen, SRU, SRC_TMG_SEL1, 0x0c),
409 RSND_GEN1_S_REG(gen, SRU, SRC_TMG_SEL2, 0x10),
410 RSND_GEN1_S_REG(gen, SRU, SRC_ROUTE_CTRL, 0xc0),
411 RSND_GEN1_S_REG(gen, SRU, SSI_MODE0, 0xD0),
412 RSND_GEN1_S_REG(gen, SRU, SSI_MODE1, 0xD4),
413 RSND_GEN1_M_REG(gen, SRU, SRC_BUSIF_MODE, 0x20, 0x4),
414 RSND_GEN1_M_REG(gen, SRU, SRC_ROUTE_MODE0,0x50, 0x8),
415 RSND_GEN1_M_REG(gen, SRU, SRC_SWRSR, 0x200, 0x40),
416 RSND_GEN1_M_REG(gen, SRU, SRC_SRCIR, 0x204, 0x40),
417 RSND_GEN1_M_REG(gen, SRU, SRC_ADINR, 0x214, 0x40),
418 RSND_GEN1_M_REG(gen, SRU, SRC_IFSCR, 0x21c, 0x40),
419 RSND_GEN1_M_REG(gen, SRU, SRC_IFSVR, 0x220, 0x40),
420 RSND_GEN1_M_REG(gen, SRU, SRC_SRCCR, 0x224, 0x40),
421 RSND_GEN1_M_REG(gen, SRU, SRC_MNFSR, 0x228, 0x40),
422
423 RSND_GEN1_S_REG(gen, ADG, BRRA, 0x00),
424 RSND_GEN1_S_REG(gen, ADG, BRRB, 0x04),
425 RSND_GEN1_S_REG(gen, ADG, SSICKR, 0x08),
426 RSND_GEN1_S_REG(gen, ADG, AUDIO_CLK_SEL0, 0x0c),
427 RSND_GEN1_S_REG(gen, ADG, AUDIO_CLK_SEL1, 0x10),
428 RSND_GEN1_S_REG(gen, ADG, AUDIO_CLK_SEL3, 0x18),
429 RSND_GEN1_S_REG(gen, ADG, AUDIO_CLK_SEL4, 0x1c),
430 RSND_GEN1_S_REG(gen, ADG, AUDIO_CLK_SEL5, 0x20),
431
432 RSND_GEN1_M_REG(gen, SSI, SSICR, 0x00, 0x40),
433 RSND_GEN1_M_REG(gen, SSI, SSISR, 0x04, 0x40),
434 RSND_GEN1_M_REG(gen, SSI, SSITDR, 0x08, 0x40),
435 RSND_GEN1_M_REG(gen, SSI, SSIRDR, 0x0c, 0x40),
436 RSND_GEN1_M_REG(gen, SSI, SSIWSR, 0x20, 0x40),
437 };
438
439 return rsnd_gen_regmap_init(priv, gen, regf);
440}
441
442static int rsnd_gen1_probe(struct platform_device *pdev, 364static int rsnd_gen1_probe(struct platform_device *pdev,
443 struct rsnd_priv *priv) 365 struct rsnd_priv *priv)
444{ 366{
445 struct device *dev = rsnd_priv_to_dev(priv); 367 struct device *dev = rsnd_priv_to_dev(priv);
446 struct rsnd_gen *gen = rsnd_priv_to_gen(priv); 368 struct rsnd_regmap_field_conf conf_sru[] = {
447 struct resource *sru_res; 369 RSND_GEN_S_REG(SRC_ROUTE_SEL, 0x00),
448 struct resource *adg_res; 370 RSND_GEN_S_REG(SRC_TMG_SEL0, 0x08),
449 struct resource *ssi_res; 371 RSND_GEN_S_REG(SRC_TMG_SEL1, 0x0c),
450 int ret; 372 RSND_GEN_S_REG(SRC_TMG_SEL2, 0x10),
451 373 RSND_GEN_S_REG(SRC_ROUTE_CTRL, 0xc0),
452 /* 374 RSND_GEN_S_REG(SSI_MODE0, 0xD0),
453 * map address 375 RSND_GEN_S_REG(SSI_MODE1, 0xD4),
454 */ 376 RSND_GEN_M_REG(SRC_BUSIF_MODE, 0x20, 0x4),
455 sru_res = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN1_SRU); 377 RSND_GEN_M_REG(SRC_ROUTE_MODE0, 0x50, 0x8),
456 adg_res = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN1_ADG); 378 RSND_GEN_M_REG(SRC_SWRSR, 0x200, 0x40),
457 ssi_res = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN1_SSI); 379 RSND_GEN_M_REG(SRC_SRCIR, 0x204, 0x40),
458 380 RSND_GEN_M_REG(SRC_ADINR, 0x214, 0x40),
459 gen->base[RSND_GEN1_SRU] = devm_ioremap_resource(dev, sru_res); 381 RSND_GEN_M_REG(SRC_IFSCR, 0x21c, 0x40),
460 gen->base[RSND_GEN1_ADG] = devm_ioremap_resource(dev, adg_res); 382 RSND_GEN_M_REG(SRC_IFSVR, 0x220, 0x40),
461 gen->base[RSND_GEN1_SSI] = devm_ioremap_resource(dev, ssi_res); 383 RSND_GEN_M_REG(SRC_SRCCR, 0x224, 0x40),
462 if (IS_ERR(gen->base[RSND_GEN1_SRU]) || 384 RSND_GEN_M_REG(SRC_MNFSR, 0x228, 0x40),
463 IS_ERR(gen->base[RSND_GEN1_ADG]) || 385 };
464 IS_ERR(gen->base[RSND_GEN1_SSI])) 386 struct rsnd_regmap_field_conf conf_adg[] = {
465 return -ENODEV; 387 RSND_GEN_S_REG(BRRA, 0x00),
388 RSND_GEN_S_REG(BRRB, 0x04),
389 RSND_GEN_S_REG(SSICKR, 0x08),
390 RSND_GEN_S_REG(AUDIO_CLK_SEL0, 0x0c),
391 RSND_GEN_S_REG(AUDIO_CLK_SEL1, 0x10),
392 RSND_GEN_S_REG(AUDIO_CLK_SEL3, 0x18),
393 RSND_GEN_S_REG(AUDIO_CLK_SEL4, 0x1c),
394 RSND_GEN_S_REG(AUDIO_CLK_SEL5, 0x20),
395 };
396 struct rsnd_regmap_field_conf conf_ssi[] = {
397 RSND_GEN_M_REG(SSICR, 0x00, 0x40),
398 RSND_GEN_M_REG(SSISR, 0x04, 0x40),
399 RSND_GEN_M_REG(SSITDR, 0x08, 0x40),
400 RSND_GEN_M_REG(SSIRDR, 0x0c, 0x40),
401 RSND_GEN_M_REG(SSIWSR, 0x20, 0x40),
402 };
403 int ret_sru;
404 int ret_adg;
405 int ret_ssi;
466 406
467 ret = rsnd_gen1_regmap_init(priv, gen); 407 ret_sru = rsnd_gen_regmap_init(priv, 9, RSND_GEN1_SRU, conf_sru);
468 if (ret < 0) 408 ret_adg = rsnd_gen_regmap_init(priv, 9, RSND_GEN1_ADG, conf_adg);
469 return ret; 409 ret_ssi = rsnd_gen_regmap_init(priv, 9, RSND_GEN1_SSI, conf_ssi);
410 if (ret_sru < 0 ||
411 ret_adg < 0 ||
412 ret_ssi < 0)
413 return ret_sru | ret_adg | ret_ssi;
470 414
471 dev_dbg(dev, "Gen1 device probed\n"); 415 dev_dbg(dev, "Gen1 is probed\n");
472 dev_dbg(dev, "SRU : %pap => %p\n", &sru_res->start,
473 gen->base[RSND_GEN1_SRU]);
474 dev_dbg(dev, "ADG : %pap => %p\n", &adg_res->start,
475 gen->base[RSND_GEN1_ADG]);
476 dev_dbg(dev, "SSI : %pap => %p\n", &ssi_res->start,
477 gen->base[RSND_GEN1_SSI]);
478 416
479 return 0; 417 return 0;
480
481} 418}
482 419
483/* 420/*
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-24 01:25:53 -0400