diff options
author | Haojian Zhuang <haojian.zhuang@linaro.org> | 2014-05-11 04:05:58 -0400 |
---|---|---|
committer | Jason Cooper <jason@lakedaemon.net> | 2014-05-18 20:35:23 -0400 |
commit | b8802f76fe473d91886220498aeda157c492f2d1 (patch) | |
tree | 577ce870c39992ca6638ee3d3c0d66548a57db61 | |
parent | c9eaa447e77efe77b7fa4c953bd62de8297fd6c5 (diff) |
irqchip: gic: Use mask field in GICC_IAR
Bit[9:0] is interrupt ID field in GICC_IAR. Bit[12:10] is CPU ID field,
and others are reserved.
So we should use GICC_IAR_INT_ID_MASK to get interrupt ID. It's not a good way
to use ~0x1c00 (CPU ID field) to get interrupt ID.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Link: https://lkml.kernel.org/r/1399795571-17231-3-git-send-email-haojian.zhuang@linaro.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
-rw-r--r-- | drivers/irqchip/irq-gic.c | 2 | ||||
-rw-r--r-- | include/linux/irqchip/arm-gic.h | 2 |
2 files changed, 3 insertions, 1 deletions
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index 4300b6606f5e..f711fb6af7a9 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c | |||
@@ -287,7 +287,7 @@ static void __exception_irq_entry gic_handle_irq(struct pt_regs *regs) | |||
287 | 287 | ||
288 | do { | 288 | do { |
289 | irqstat = readl_relaxed(cpu_base + GIC_CPU_INTACK); | 289 | irqstat = readl_relaxed(cpu_base + GIC_CPU_INTACK); |
290 | irqnr = irqstat & ~0x1c00; | 290 | irqnr = irqstat & GICC_IAR_INT_ID_MASK; |
291 | 291 | ||
292 | if (likely(irqnr > 15 && irqnr < 1021)) { | 292 | if (likely(irqnr > 15 && irqnr < 1021)) { |
293 | irqnr = irq_find_mapping(gic->domain, irqnr); | 293 | irqnr = irq_find_mapping(gic->domain, irqnr); |
diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h index 7ed92d0560d5..45e2d8c15bd2 100644 --- a/include/linux/irqchip/arm-gic.h +++ b/include/linux/irqchip/arm-gic.h | |||
@@ -21,6 +21,8 @@ | |||
21 | #define GIC_CPU_ACTIVEPRIO 0xd0 | 21 | #define GIC_CPU_ACTIVEPRIO 0xd0 |
22 | #define GIC_CPU_IDENT 0xfc | 22 | #define GIC_CPU_IDENT 0xfc |
23 | 23 | ||
24 | #define GICC_IAR_INT_ID_MASK 0x3ff | ||
25 | |||
24 | #define GIC_DIST_CTRL 0x000 | 26 | #define GIC_DIST_CTRL 0x000 |
25 | #define GIC_DIST_CTR 0x004 | 27 | #define GIC_DIST_CTR 0x004 |
26 | #define GIC_DIST_IGROUP 0x080 | 28 | #define GIC_DIST_IGROUP 0x080 |