diff options
author | Mark Brown <broonie@linaro.org> | 2013-07-15 06:13:55 -0400 |
---|---|---|
committer | Mark Brown <broonie@linaro.org> | 2013-07-15 06:13:55 -0400 |
commit | b87b26ae0eea5200172fae1c668c81daeda0da83 (patch) | |
tree | d14c3454e416e860ac0308be5a68caea70c039ae | |
parent | 441c93ed6e8776ce34c59af486b21c43ace177fb (diff) | |
parent | 5c78dfe87ea04b501ee000a7f03b9432ac9d008c (diff) |
Merge remote-tracking branch 'asoc/fix/sgtl5000' into asoc-linus
-rw-r--r-- | sound/soc/codecs/sgtl5000.c | 2 | ||||
-rw-r--r-- | sound/soc/codecs/sgtl5000.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/sound/soc/codecs/sgtl5000.c b/sound/soc/codecs/sgtl5000.c index d441559dc92c..d659d3adcfb3 100644 --- a/sound/soc/codecs/sgtl5000.c +++ b/sound/soc/codecs/sgtl5000.c | |||
@@ -38,7 +38,7 @@ | |||
38 | static const struct reg_default sgtl5000_reg_defaults[] = { | 38 | static const struct reg_default sgtl5000_reg_defaults[] = { |
39 | { SGTL5000_CHIP_CLK_CTRL, 0x0008 }, | 39 | { SGTL5000_CHIP_CLK_CTRL, 0x0008 }, |
40 | { SGTL5000_CHIP_I2S_CTRL, 0x0010 }, | 40 | { SGTL5000_CHIP_I2S_CTRL, 0x0010 }, |
41 | { SGTL5000_CHIP_SSS_CTRL, 0x0008 }, | 41 | { SGTL5000_CHIP_SSS_CTRL, 0x0010 }, |
42 | { SGTL5000_CHIP_DAC_VOL, 0x3c3c }, | 42 | { SGTL5000_CHIP_DAC_VOL, 0x3c3c }, |
43 | { SGTL5000_CHIP_PAD_STRENGTH, 0x015f }, | 43 | { SGTL5000_CHIP_PAD_STRENGTH, 0x015f }, |
44 | { SGTL5000_CHIP_ANA_HP_CTRL, 0x1818 }, | 44 | { SGTL5000_CHIP_ANA_HP_CTRL, 0x1818 }, |
diff --git a/sound/soc/codecs/sgtl5000.h b/sound/soc/codecs/sgtl5000.h index 4b69229a9818..2f8c88931f69 100644 --- a/sound/soc/codecs/sgtl5000.h +++ b/sound/soc/codecs/sgtl5000.h | |||
@@ -347,7 +347,7 @@ | |||
347 | #define SGTL5000_PLL_INT_DIV_MASK 0xf800 | 347 | #define SGTL5000_PLL_INT_DIV_MASK 0xf800 |
348 | #define SGTL5000_PLL_INT_DIV_SHIFT 11 | 348 | #define SGTL5000_PLL_INT_DIV_SHIFT 11 |
349 | #define SGTL5000_PLL_INT_DIV_WIDTH 5 | 349 | #define SGTL5000_PLL_INT_DIV_WIDTH 5 |
350 | #define SGTL5000_PLL_FRAC_DIV_MASK 0x0700 | 350 | #define SGTL5000_PLL_FRAC_DIV_MASK 0x07ff |
351 | #define SGTL5000_PLL_FRAC_DIV_SHIFT 0 | 351 | #define SGTL5000_PLL_FRAC_DIV_SHIFT 0 |
352 | #define SGTL5000_PLL_FRAC_DIV_WIDTH 11 | 352 | #define SGTL5000_PLL_FRAC_DIV_WIDTH 11 |
353 | 353 | ||