V4L/DVB (12271): lgs8gxx: add lgs8g75 support

lgs8gxx: add lgs8g75 demodulator support

Signed-off-by: David T.L. Wong <davidtlwong@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>

3 files changed, 401 insertions, 106 deletions

diff --git a/drivers/media/dvb/frontends/lgs8gxx.c b/drivers/media/dvb/frontends/lgs8gxx.c
index fde27645bbed..eabcadc425d5 100644
--- a/drivers/media/dvb/frontends/lgs8gxx.c
+++ b/drivers/media/dvb/frontends/lgs8gxx.c
@@ -1,9 +1,9 @@
 /*
- *    Support for Legend Silicon DMB-TH demodulator
- *    LGS8913, LGS8GL5
+ *    Support for Legend Silicon GB20600 (a.k.a DMB-TH) demodulator
+ *    LGS8913, LGS8GL5, LGS8G75
  *    experimental support LGS8G42, LGS8G52
  *
- *    Copyright (C) 2007,2008 David T.L. Wong <davidtlwong@gmail.com>
+ *    Copyright (C) 2007-2009 David T.L. Wong <davidtlwong@gmail.com>
  *    Copyright (C) 2008 Sirius International (Hong Kong) Limited
  *    Timothy Lee <timothy.lee@siriushk.com> (for initial work on LGS8GL5)
  *
@@ -46,6 +46,42 @@ module_param(fake_signal_str, int, 0644);
 MODULE_PARM_DESC(fake_signal_str, "fake signal strength for LGS8913."
 "Signal strength calculation is slow.(default:on).");
 
+static const u8 lgs8g75_initdat[] = {
+        0x01, 0x30, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+        0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+        0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+        0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+        0x00, 0x01, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+        0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+        0xE4, 0xF5, 0xA8, 0xF5, 0xB8, 0xF5, 0x88, 0xF5,
+        0x89, 0xF5, 0x87, 0x75, 0xD0, 0x00, 0x11, 0x50,
+        0x11, 0x50, 0xF4, 0xF5, 0x80, 0xF5, 0x90, 0xF5,
+        0xA0, 0xF5, 0xB0, 0x75, 0x81, 0x30, 0x80, 0x01,
+        0x32, 0x90, 0x80, 0x12, 0x74, 0xFF, 0xF0, 0x90,
+        0x80, 0x13, 0x74, 0x1F, 0xF0, 0x90, 0x80, 0x23,
+        0x74, 0x01, 0xF0, 0x90, 0x80, 0x22, 0xF0, 0x90,
+        0x00, 0x48, 0x74, 0x00, 0xF0, 0x90, 0x80, 0x4D,
+        0x74, 0x05, 0xF0, 0x90, 0x80, 0x09, 0xE0, 0x60,
+        0x21, 0x12, 0x00, 0xDD, 0x14, 0x60, 0x1B, 0x12,
+        0x00, 0xDD, 0x14, 0x60, 0x15, 0x12, 0x00, 0xDD,
+        0x14, 0x60, 0x0F, 0x12, 0x00, 0xDD, 0x14, 0x60,
+        0x09, 0x12, 0x00, 0xDD, 0x14, 0x60, 0x03, 0x12,
+        0x00, 0xDD, 0x90, 0x80, 0x42, 0xE0, 0x60, 0x0B,
+        0x14, 0x60, 0x0C, 0x14, 0x60, 0x0D, 0x14, 0x60,
+        0x0E, 0x01, 0xB3, 0x74, 0x04, 0x01, 0xB9, 0x74,
+        0x05, 0x01, 0xB9, 0x74, 0x07, 0x01, 0xB9, 0x74,
+        0x0A, 0xC0, 0xE0, 0x74, 0xC8, 0x12, 0x00, 0xE2,
+        0xD0, 0xE0, 0x14, 0x70, 0xF4, 0x90, 0x80, 0x09,
+        0xE0, 0x70, 0xAE, 0x12, 0x00, 0xF6, 0x12, 0x00,
+        0xFE, 0x90, 0x00, 0x48, 0xE0, 0x04, 0xF0, 0x90,
+        0x80, 0x4E, 0xF0, 0x01, 0x73, 0x90, 0x80, 0x08,
+        0xF0, 0x22, 0xF8, 0x7A, 0x0C, 0x79, 0xFD, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xD9,
+        0xF6, 0xDA, 0xF2, 0xD8, 0xEE, 0x22, 0x90, 0x80,
+        0x65, 0xE0, 0x54, 0xFD, 0xF0, 0x22, 0x90, 0x80,
+        0x65, 0xE0, 0x44, 0xC2, 0xF0, 0x22
+};
+
 /* LGS8GXX internal helper functions */
 
 static int lgs8gxx_write_reg(struct lgs8gxx_state *priv, u8 reg, u8 data)
@@ -55,7 +91,7 @@ static int lgs8gxx_write_reg(struct lgs8gxx_state *priv, u8 reg, u8 data)
         struct i2c_msg msg = { .flags = 0, .buf = buf, .len = 2 };
 
         msg.addr = priv->config->demod_address;
-        if (reg >= 0xC0)
+        if (priv->config->prod != LGS8GXX_PROD_LGS8G75 && reg >= 0xC0)
                 msg.addr += 0x02;
 
         if (debug >= 2)
@@ -84,7 +120,7 @@ static int lgs8gxx_read_reg(struct lgs8gxx_state *priv, u8 reg, u8 *p_data)
         };
 
         dev_addr = priv->config->demod_address;
-        if (reg >= 0xC0)
+        if (priv->config->prod != LGS8GXX_PROD_LGS8G75 && reg >= 0xC0)
                 dev_addr += 0x02;
         msg[1].addr =  msg[0].addr = dev_addr;
 
@@ -112,19 +148,36 @@ static int lgs8gxx_soft_reset(struct lgs8gxx_state *priv)
         return 0;
 }
 
+static int wait_reg_mask(struct lgs8gxx_state *priv, u8 reg, u8 mask,
+        u8 val, u8 delay, u8 tries)
+{
+        u8 t;
+        int i;
+
+        for (i = 0; i < tries; i++) {
+                lgs8gxx_read_reg(priv, reg, &t);
+
+                if ((t & mask) == val)
+                        return 0;
+                msleep(delay);
+        }
+
+        return 1;
+}
+
 static int lgs8gxx_set_ad_mode(struct lgs8gxx_state *priv)
 {
         const struct lgs8gxx_config *config = priv->config;
         u8 if_conf;
 
-        if_conf = 0x10; /* AGC output on; */
+        if_conf = 0x10; /* AGC output on, RF_AGC output off; */
 
         if_conf |=
                 ((config->ext_adc) ? 0x80 : 0x00) |
                 ((config->if_neg_center) ? 0x04 : 0x00) |
                 ((config->if_freq == 0) ? 0x08 : 0x00) | /* Baseband */
-                ((config->ext_adc && config->adc_signed) ? 0x02 : 0x00) |
-                ((config->ext_adc && config->if_neg_edge) ? 0x01 : 0x00);
+                ((config->adc_signed) ? 0x02 : 0x00) |
+                ((config->if_neg_edge) ? 0x01 : 0x00);
 
         if (config->ext_adc &&
                 (config->prod == LGS8GXX_PROD_LGS8G52)) {
@@ -157,39 +210,82 @@ static int lgs8gxx_set_if_freq(struct lgs8gxx_state *priv, u32 freq /*in kHz*/)
         }
         dprintk("AFC_INIT_FREQ = 0x%08X\n", v32);
 
-        lgs8gxx_write_reg(priv, 0x09, 0xFF & (v32));
-        lgs8gxx_write_reg(priv, 0x0A, 0xFF & (v32 >> 8));
-        lgs8gxx_write_reg(priv, 0x0B, 0xFF & (v32 >> 16));
-        lgs8gxx_write_reg(priv, 0x0C, 0xFF & (v32 >> 24));
+        if (priv->config->prod == LGS8GXX_PROD_LGS8G75) {
+                lgs8gxx_write_reg(priv, 0x08, 0xFF & (v32));
+                lgs8gxx_write_reg(priv, 0x09, 0xFF & (v32 >> 8));
+                lgs8gxx_write_reg(priv, 0x0A, 0xFF & (v32 >> 16));
+                lgs8gxx_write_reg(priv, 0x0B, 0xFF & (v32 >> 24));
+        } else {
+                lgs8gxx_write_reg(priv, 0x09, 0xFF & (v32));
+                lgs8gxx_write_reg(priv, 0x0A, 0xFF & (v32 >> 8));
+                lgs8gxx_write_reg(priv, 0x0B, 0xFF & (v32 >> 16));
+                lgs8gxx_write_reg(priv, 0x0C, 0xFF & (v32 >> 24));
+        }
+
+        return 0;
+}
+
+static int lgs8gxx_get_afc_phase(struct lgs8gxx_state *priv)
+{
+        u64 val;
+        u32 v32 = 0;
+        u8 reg_addr, t;
+        int i;
+
+        if (priv->config->prod == LGS8GXX_PROD_LGS8G75)
+                reg_addr = 0x23;
+        else
+                reg_addr = 0x48;
+
+        for (i = 0; i < 4; i++) {
+                lgs8gxx_read_reg(priv, reg_addr, &t);
+                v32 <<= 8;
+                v32 |= t;
+                reg_addr--;
+        }
 
+        val = v32;
+        val *= priv->config->if_clk_freq;
+        val /= (u64)1 << 32;
+        dprintk("AFC = %u kHz\n", (u32)val);
         return 0;
 }