diff options
author | Joseph Lo <josephl@nvidia.com> | 2012-08-17 02:51:21 -0400 |
---|---|---|
committer | Stephen Warren <swarren@nvidia.com> | 2012-09-06 13:47:20 -0400 |
commit | b78c030cebdaf8da14b44a4454146a7919e763a8 (patch) | |
tree | 6653a77c931ed128d588a2604145769d03ca6a40 | |
parent | 1dfacc1613d088a99ac0360f6e276cad7f7cdf0c (diff) |
ARM: tegra: clocks: separate tegra_clk_32k_ops from Tegra20 and Tegra30
Currently the tegra20 and tegra30 share the same symbol for
tegra_clk_32k_ops. This will cause a compile error when building
a tegra20-only kernel image. Add tegra_clk_32k_ops for tegra20 and
modify tegra30_clk_32k_ops for tegra30.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
-rw-r--r-- | arch/arm/mach-tegra/tegra20_clocks.c | 10 | ||||
-rw-r--r-- | arch/arm/mach-tegra/tegra30_clocks.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-tegra/tegra30_clocks.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-tegra/tegra30_clocks_data.c | 2 |
4 files changed, 13 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/tegra20_clocks.c b/arch/arm/mach-tegra/tegra20_clocks.c index a1e0f8a26b3d..b9124afcca11 100644 --- a/arch/arm/mach-tegra/tegra20_clocks.c +++ b/arch/arm/mach-tegra/tegra20_clocks.c | |||
@@ -231,6 +231,16 @@ static int clk_div16_get_divider(unsigned long parent_rate, unsigned long rate) | |||
231 | return divider_u16 - 1; | 231 | return divider_u16 - 1; |
232 | } | 232 | } |
233 | 233 | ||
234 | static unsigned long tegra_clk_fixed_recalc_rate(struct clk_hw *hw, | ||
235 | unsigned long parent_rate) | ||
236 | { | ||
237 | return to_clk_tegra(hw)->fixed_rate; | ||
238 | } | ||
239 | |||
240 | struct clk_ops tegra_clk_32k_ops = { | ||
241 | .recalc_rate = tegra_clk_fixed_recalc_rate, | ||
242 | }; | ||
243 | |||
234 | /* clk_m functions */ | 244 | /* clk_m functions */ |
235 | static unsigned long tegra20_clk_m_recalc_rate(struct clk_hw *hw, | 245 | static unsigned long tegra20_clk_m_recalc_rate(struct clk_hw *hw, |
236 | unsigned long prate) | 246 | unsigned long prate) |
diff --git a/arch/arm/mach-tegra/tegra30_clocks.c b/arch/arm/mach-tegra/tegra30_clocks.c index a9fa8ea0b6e0..3129c2f21d81 100644 --- a/arch/arm/mach-tegra/tegra30_clocks.c +++ b/arch/arm/mach-tegra/tegra30_clocks.c | |||
@@ -478,7 +478,7 @@ static unsigned long tegra30_clk_fixed_recalc_rate(struct clk_hw *hw, | |||
478 | return to_clk_tegra(hw)->fixed_rate; | 478 | return to_clk_tegra(hw)->fixed_rate; |
479 | } | 479 | } |
480 | 480 | ||
481 | struct clk_ops tegra_clk_32k_ops = { | 481 | struct clk_ops tegra30_clk_32k_ops = { |
482 | .recalc_rate = tegra30_clk_fixed_recalc_rate, | 482 | .recalc_rate = tegra30_clk_fixed_recalc_rate, |
483 | }; | 483 | }; |
484 | 484 | ||
diff --git a/arch/arm/mach-tegra/tegra30_clocks.h b/arch/arm/mach-tegra/tegra30_clocks.h index aeb4e963f632..b08b8d9024a6 100644 --- a/arch/arm/mach-tegra/tegra30_clocks.h +++ b/arch/arm/mach-tegra/tegra30_clocks.h | |||
@@ -17,7 +17,7 @@ | |||
17 | #ifndef __MACH_TEGRA30_CLOCK_H | 17 | #ifndef __MACH_TEGRA30_CLOCK_H |
18 | #define __MACH_TEGRA30_CLOCK_H | 18 | #define __MACH_TEGRA30_CLOCK_H |
19 | 19 | ||
20 | extern struct clk_ops tegra_clk_32k_ops; | 20 | extern struct clk_ops tegra30_clk_32k_ops; |
21 | extern struct clk_ops tegra30_clk_m_ops; | 21 | extern struct clk_ops tegra30_clk_m_ops; |
22 | extern struct clk_ops tegra_clk_m_div_ops; | 22 | extern struct clk_ops tegra_clk_m_div_ops; |
23 | extern struct clk_ops tegra_pll_ref_ops; | 23 | extern struct clk_ops tegra_pll_ref_ops; |
diff --git a/arch/arm/mach-tegra/tegra30_clocks_data.c b/arch/arm/mach-tegra/tegra30_clocks_data.c index c924240cb693..267350675a88 100644 --- a/arch/arm/mach-tegra/tegra30_clocks_data.c +++ b/arch/arm/mach-tegra/tegra30_clocks_data.c | |||
@@ -57,7 +57,7 @@ static struct clk_tegra tegra_clk_32k_hw = { | |||
57 | static struct clk tegra_clk_32k = { | 57 | static struct clk tegra_clk_32k = { |
58 | .name = "clk_32k", | 58 | .name = "clk_32k", |
59 | .hw = &tegra_clk_32k_hw.hw, | 59 | .hw = &tegra_clk_32k_hw.hw, |
60 | .ops = &tegra_clk_32k_ops, | 60 | .ops = &tegra30_clk_32k_ops, |
61 | .flags = CLK_IS_ROOT, | 61 | .flags = CLK_IS_ROOT, |
62 | }; | 62 | }; |
63 | 63 | ||