diff options
author | Dave Jones <davej@redhat.com> | 2009-01-17 22:39:47 -0500 |
---|---|---|
committer | Dave Jones <davej@redhat.com> | 2009-02-24 22:47:28 -0500 |
commit | b5c916666240032b29f73a1ca52c3e0fac37335c (patch) | |
tree | fc7658f45840af7b0942a776769836659a888214 | |
parent | fff78ad5cee1d6f695103ec590cbd2a9f3c39e8c (diff) |
[CPUFREQ] checkpatch cleanups for cpufreq-nforce2
Signed-off-by: Dave Jones <davej@redhat.com>
-rw-r--r-- | arch/x86/kernel/cpu/cpufreq/cpufreq-nforce2.c | 38 |
1 files changed, 21 insertions, 17 deletions
diff --git a/arch/x86/kernel/cpu/cpufreq/cpufreq-nforce2.c b/arch/x86/kernel/cpu/cpufreq/cpufreq-nforce2.c index 965ea52767ac..ad8284f0e865 100644 --- a/arch/x86/kernel/cpu/cpufreq/cpufreq-nforce2.c +++ b/arch/x86/kernel/cpu/cpufreq/cpufreq-nforce2.c | |||
@@ -32,7 +32,7 @@ | |||
32 | * nforce2_chipset: | 32 | * nforce2_chipset: |
33 | * FSB is changed using the chipset | 33 | * FSB is changed using the chipset |
34 | */ | 34 | */ |
35 | static struct pci_dev *nforce2_chipset_dev; | 35 | static struct pci_dev *nforce2_dev; |
36 | 36 | ||
37 | /* fid: | 37 | /* fid: |
38 | * multiplier * 10 | 38 | * multiplier * 10 |
@@ -56,7 +56,8 @@ MODULE_PARM_DESC(fid, "CPU multiplier to use (11.5 = 115)"); | |||
56 | MODULE_PARM_DESC(min_fsb, | 56 | MODULE_PARM_DESC(min_fsb, |
57 | "Minimum FSB to use, if not defined: current FSB - 50"); | 57 | "Minimum FSB to use, if not defined: current FSB - 50"); |
58 | 58 | ||
59 | #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "cpufreq-nforce2", msg) | 59 | #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \ |
60 | "cpufreq-nforce2", msg) | ||
60 | 61 | ||
61 | /** | 62 | /** |
62 | * nforce2_calc_fsb - calculate FSB | 63 | * nforce2_calc_fsb - calculate FSB |
@@ -118,11 +119,11 @@ static void nforce2_write_pll(int pll) | |||
118 | int temp; | 119 | int temp; |
119 | 120 | ||
120 | /* Set the pll addr. to 0x00 */ | 121 | /* Set the pll addr. to 0x00 */ |
121 | pci_write_config_dword(nforce2_chipset_dev, NFORCE2_PLLADR, 0); | 122 | pci_write_config_dword(nforce2_dev, NFORCE2_PLLADR, 0); |
122 | 123 | ||
123 | /* Now write the value in all 64 registers */ | 124 | /* Now write the value in all 64 registers */ |
124 | for (temp = 0; temp <= 0x3f; temp++) | 125 | for (temp = 0; temp <= 0x3f; temp++) |
125 | pci_write_config_dword(nforce2_chipset_dev, NFORCE2_PLLREG, pll); | 126 | pci_write_config_dword(nforce2_dev, NFORCE2_PLLREG, pll); |
126 | 127 | ||
127 | return; | 128 | return; |
128 | } | 129 | } |
@@ -139,8 +140,8 @@ static unsigned int nforce2_fsb_read(int bootfsb) | |||
139 | u32 fsb, temp = 0; | 140 | u32 fsb, temp = 0; |
140 | 141 | ||
141 | /* Get chipset boot FSB from subdevice 5 (FSB at boot-time) */ | 142 | /* Get chipset boot FSB from subdevice 5 (FSB at boot-time) */ |
142 | nforce2_sub5 = pci_get_subsys(PCI_VENDOR_ID_NVIDIA, | 143 | nforce2_sub5 = pci_get_subsys(PCI_VENDOR_ID_NVIDIA, 0x01EF, |
143 | 0x01EF, PCI_ANY_ID, PCI_ANY_ID, NULL); | 144 | PCI_ANY_ID, PCI_ANY_ID, NULL); |
144 | if (!nforce2_sub5) | 145 | if (!nforce2_sub5) |
145 | return 0; | 146 | return 0; |
146 | 147 | ||
@@ -148,13 +149,13 @@ static unsigned int nforce2_fsb_read(int bootfsb) | |||
148 | fsb /= 1000000; | 149 | fsb /= 1000000; |
149 | 150 | ||
150 | /* Check if PLL register is already set */ | 151 | /* Check if PLL register is already set */ |
151 | pci_read_config_byte(nforce2_chipset_dev, NFORCE2_PLLENABLE, (u8 *)&temp); | 152 | pci_read_config_byte(nforce2_dev, NFORCE2_PLLENABLE, (u8 *)&temp); |
152 | 153 | ||
153 | if (bootfsb || !temp) | 154 | if (bootfsb || !temp) |
154 | return fsb; | 155 | return fsb; |
155 | 156 | ||
156 | /* Use PLL register FSB value */ | 157 | /* Use PLL register FSB value */ |
157 | pci_read_config_dword(nforce2_chipset_dev, NFORCE2_PLLREG, &temp); | 158 | pci_read_config_dword(nforce2_dev, NFORCE2_PLLREG, &temp); |
158 | fsb = nforce2_calc_fsb(temp); | 159 | fsb = nforce2_calc_fsb(temp); |
159 | 160 | ||
160 | return fsb; | 161 | return fsb; |
@@ -185,7 +186,7 @@ static int nforce2_set_fsb(unsigned int fsb) | |||
185 | } | 186 | } |
186 | 187 | ||
187 | /* First write? Then set actual value */ | 188 | /* First write? Then set actual value */ |
188 | pci_read_config_byte(nforce2_chipset_dev, NFORCE2_PLLENABLE, (u8 *)&temp); | 189 | pci_read_config_byte(nforce2_dev, NFORCE2_PLLENABLE, (u8 *)&temp); |
189 | if (!temp) { | 190 | if (!temp) { |
190 | pll = nforce2_calc_pll(tfsb); | 191 | pll = nforce2_calc_pll(tfsb); |
191 | 192 | ||
@@ -197,7 +198,7 @@ static int nforce2_set_fsb(unsigned int fsb) | |||
197 | 198 | ||
198 | /* Enable write access */ | 199 | /* Enable write access */ |
199 | temp = 0x01; | 200 | temp = 0x01; |
200 | pci_write_config_byte(nforce2_chipset_dev, NFORCE2_PLLENABLE, (u8)temp); | 201 | pci_write_config_byte(nforce2_dev, NFORCE2_PLLENABLE, (u8)temp); |
201 | 202 | ||
202 | diff = tfsb - fsb; | 203 | diff = tfsb - fsb; |
203 | 204 | ||
@@ -222,7 +223,7 @@ static int nforce2_set_fsb(unsigned int fsb) | |||
222 | } | 223 | } |
223 | 224 | ||
224 | temp = 0x40; | 225 | temp = 0x40; |
225 | pci_write_config_byte(nforce2_chipset_dev, NFORCE2_PLLADR, (u8)temp); | 226 | pci_write_config_byte(nforce2_dev, NFORCE2_PLLADR, (u8)temp); |
226 | 227 | ||
227 | return 0; | 228 | return 0; |
228 | } | 229 | } |
@@ -244,7 +245,8 @@ static unsigned int nforce2_get(unsigned int cpu) | |||
244 | * nforce2_target - set a new CPUFreq policy | 245 | * nforce2_target - set a new CPUFreq policy |
245 | * @policy: new policy | 246 | * @policy: new policy |
246 | * @target_freq: the target frequency | 247 | * @target_freq: the target frequency |
247 | * @relation: how that frequency relates to achieved frequency (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H) | 248 | * @relation: how that frequency relates to achieved frequency |
249 | * (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H) | ||
248 | * | 250 | * |
249 | * Sets a new CPUFreq policy. | 251 | * Sets a new CPUFreq policy. |
250 | */ | 252 | */ |
@@ -328,7 +330,8 @@ static int nforce2_cpu_init(struct cpufreq_policy *policy) | |||
328 | if (!fid) { | 330 | if (!fid) { |
329 | if (!cpu_khz) { | 331 | if (!cpu_khz) { |
330 | printk(KERN_WARNING | 332 | printk(KERN_WARNING |
331 | "cpufreq: cpu_khz not set, can't calculate multiplier!\n"); | 333 | "cpufreq: cpu_khz not set, " |
334 | "can't calculate multiplier!\n"); | ||
332 | return -ENODEV; | 335 | return -ENODEV; |
333 | } | 336 | } |
334 | 337 | ||
@@ -392,17 +395,18 @@ static struct cpufreq_driver nforce2_driver = { | |||
392 | */ | 395 | */ |
393 | static unsigned int nforce2_detect_chipset(void) | 396 | static unsigned int nforce2_detect_chipset(void) |
394 | { | 397 | { |
395 | nforce2_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_NVIDIA, | 398 | nforce2_dev = pci_get_subsys(PCI_VENDOR_ID_NVIDIA, |
396 | PCI_DEVICE_ID_NVIDIA_NFORCE2, | 399 | PCI_DEVICE_ID_NVIDIA_NFORCE2, |
397 | PCI_ANY_ID, PCI_ANY_ID, NULL); | 400 | PCI_ANY_ID, PCI_ANY_ID, NULL); |
398 | 401 | ||
399 | if (nforce2_chipset_dev == NULL) | 402 | if (nforce2_dev == NULL) |
400 | return -ENODEV; | 403 | return -ENODEV; |
401 | 404 | ||
402 | printk(KERN_INFO "cpufreq: Detected nForce2 chipset revision %X\n", | 405 | printk(KERN_INFO "cpufreq: Detected nForce2 chipset revision %X\n", |
403 | nforce2_chipset_dev->revision); | 406 | nforce2_dev->revision); |
404 | printk(KERN_INFO | 407 | printk(KERN_INFO |
405 | "cpufreq: FSB changing is maybe unstable and can lead to crashes and data loss.\n"); | 408 | "cpufreq: FSB changing is maybe unstable and can lead to " |
409 | "crashes and data loss.\n"); | ||
406 | 410 | ||
407 | return 0; | 411 | return 0; |
408 | } | 412 | } |