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authorKumar Gala <galak@kernel.crashing.org>2007-07-03 03:35:35 -0400
committerKumar Gala <galak@kernel.crashing.org>2007-07-03 03:35:35 -0400
commitb533f8ae796d1ee0289bf04d4f1e72c02ad4a17d (patch)
tree4bec480194b251e18fee511df1cf4840a1995c88
parenteae98266e78e5659d75dbb62b4601960c15c7830 (diff)
[POWERPC] Reworked interrupt numbers for OpenPIC based Freescale chips
Make the interrupt numbers match the OpenPIC spec intead of the Freescale docs which distinguish between internal and external interrupts. Now we can use the interrupt number directly to find the register offset associated with it. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat
-rw-r--r--arch/powerpc/boot/dts/mpc8540ads.dts120
-rw-r--r--arch/powerpc/boot/dts/mpc8541cds.dts86
-rw-r--r--arch/powerpc/boot/dts/mpc8544ds.dts18
-rw-r--r--arch/powerpc/boot/dts/mpc8548cds.dts94
-rw-r--r--arch/powerpc/boot/dts/mpc8555cds.dts86
-rw-r--r--arch/powerpc/boot/dts/mpc8560ads.dts116
-rw-r--r--arch/powerpc/boot/dts/mpc8568mds.dts36
-rw-r--r--arch/powerpc/boot/dts/mpc8641_hpcn.dts18
-rw-r--r--arch/powerpc/platforms/85xx/mpc8544_ds.c15
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_ads.c22
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_cds.c23
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_mds.c21
-rw-r--r--arch/powerpc/platforms/86xx/mpc86xx_hpcn.c15
13 files changed, 292 insertions, 378 deletions
diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts
index 78828b239d0e..364a969f5c2f 100644
--- a/arch/powerpc/boot/dts/mpc8540ads.dts
+++ b/arch/powerpc/boot/dts/mpc8540ads.dts
@@ -52,7 +52,7 @@
52 compatible = "fsl,8540-memory-controller"; 52 compatible = "fsl,8540-memory-controller";
53 reg = <2000 1000>; 53 reg = <2000 1000>;
54 interrupt-parent = <&mpic>; 54 interrupt-parent = <&mpic>;
55 interrupts = <2 2>; 55 interrupts = <12 2>;
56 }; 56 };
57 57
58 l2-cache-controller@20000 { 58 l2-cache-controller@20000 {
@@ -61,14 +61,14 @@
61 cache-line-size = <20>; // 32 bytes 61 cache-line-size = <20>; // 32 bytes
62 cache-size = <40000>; // L2, 256K 62 cache-size = <40000>; // L2, 256K
63 interrupt-parent = <&mpic>; 63 interrupt-parent = <&mpic>;
64 interrupts = <0 2>; 64 interrupts = <10 2>;
65 }; 65 };
66 66
67 i2c@3000 { 67 i2c@3000 {
68 device_type = "i2c"; 68 device_type = "i2c";
69 compatible = "fsl-i2c"; 69 compatible = "fsl-i2c";
70 reg = <3000 100>; 70 reg = <3000 100>;
71 interrupts = <1b 2>; 71 interrupts = <2b 2>;
72 interrupt-parent = <&mpic>; 72 interrupt-parent = <&mpic>;
73 dfsrr; 73 dfsrr;
74 }; 74 };
@@ -81,19 +81,19 @@
81 reg = <24520 20>; 81 reg = <24520 20>;
82 phy0: ethernet-phy@0 { 82 phy0: ethernet-phy@0 {
83 interrupt-parent = <&mpic>; 83 interrupt-parent = <&mpic>;
84 interrupts = <35 1>; 84 interrupts = <5 1>;
85 reg = <0>; 85 reg = <0>;
86 device_type = "ethernet-phy"; 86 device_type = "ethernet-phy";
87 }; 87 };
88 phy1: ethernet-phy@1 { 88 phy1: ethernet-phy@1 {
89 interrupt-parent = <&mpic>; 89 interrupt-parent = <&mpic>;
90 interrupts = <35 1>; 90 interrupts = <5 1>;
91 reg = <1>; 91 reg = <1>;
92 device_type = "ethernet-phy"; 92 device_type = "ethernet-phy";
93 }; 93 };
94 phy3: ethernet-phy@3 { 94 phy3: ethernet-phy@3 {
95 interrupt-parent = <&mpic>; 95 interrupt-parent = <&mpic>;
96 interrupts = <37 1>; 96 interrupts = <7 1>;
97 reg = <3>; 97 reg = <3>;
98 device_type = "ethernet-phy"; 98 device_type = "ethernet-phy";
99 }; 99 };
@@ -113,7 +113,7 @@
113 */ 113 */
114 address = [ 00 00 00 00 00 00 ]; 114 address = [ 00 00 00 00 00 00 ];
115 local-mac-address = [ 00 00 00 00 00 00 ]; 115 local-mac-address = [ 00 00 00 00 00 00 ];
116 interrupts = <d 2 e 2 12 2>; 116 interrupts = <1d 2 1e 2 22 2>;
117 interrupt-parent = <&mpic>; 117 interrupt-parent = <&mpic>;
118 phy-handle = <&phy0>; 118 phy-handle = <&phy0>;
119 }; 119 };
@@ -132,7 +132,7 @@
132 */ 132 */
133 address = [ 00 00 00 00 00 00 ]; 133 address = [ 00 00 00 00 00 00 ];
134 local-mac-address = [ 00 00 00 00 00 00 ]; 134 local-mac-address = [ 00 00 00 00 00 00 ];
135 interrupts = <13 2 14 2 18 2>; 135 interrupts = <23 2 24 2 28 2>;
136 interrupt-parent = <&mpic>; 136 interrupt-parent = <&mpic>;
137 phy-handle = <&phy1>; 137 phy-handle = <&phy1>;
138 }; 138 };
@@ -151,7 +151,7 @@
151 */ 151 */
152 address = [ 00 00 00 00 00 00 ]; 152 address = [ 00 00 00 00 00 00 ];
153 local-mac-address = [ 00 00 00 00 00 00 ]; 153 local-mac-address = [ 00 00 00 00 00 00 ];
154 interrupts = <19 2>; 154 interrupts = <29 2>;
155 interrupt-parent = <&mpic>; 155 interrupt-parent = <&mpic>;
156 phy-handle = <&phy3>; 156 phy-handle = <&phy3>;
157 }; 157 };
@@ -161,7 +161,7 @@
161 compatible = "ns16550"; 161 compatible = "ns16550";
162 reg = <4500 100>; // reg base, size 162 reg = <4500 100>; // reg base, size
163 clock-frequency = <0>; // should we fill in in uboot? 163 clock-frequency = <0>; // should we fill in in uboot?
164 interrupts = <1a 2>; 164 interrupts = <2a 2>;
165 interrupt-parent = <&mpic>; 165 interrupt-parent = <&mpic>;
166 }; 166 };
167 167
@@ -170,7 +170,7 @@
170 compatible = "ns16550"; 170 compatible = "ns16550";
171 reg = <4600 100>; // reg base, size 171 reg = <4600 100>; // reg base, size
172 clock-frequency = <0>; // should we fill in in uboot? 172 clock-frequency = <0>; // should we fill in in uboot?
173 interrupts = <1a 2>; 173 interrupts = <2a 2>;
174 interrupt-parent = <&mpic>; 174 interrupt-parent = <&mpic>;
175 }; 175 };
176 pci@8000 { 176 pci@8000 {
@@ -178,78 +178,78 @@
178 interrupt-map = < 178 interrupt-map = <
179 179
180 /* IDSEL 0x02 */ 180 /* IDSEL 0x02 */
181 1000 0 0 1 &mpic 31 1 181 1000 0 0 1 &mpic 1 1
182 1000 0 0 2 &mpic 32 1 182 1000 0 0 2 &mpic 2 1
183 1000 0 0 3 &mpic 33 1 183 1000 0 0 3 &mpic 3 1
184 1000 0 0 4 &mpic 34 1 184 1000 0 0 4 &mpic 4 1
185 185
186 /* IDSEL 0x03 */ 186 /* IDSEL 0x03 */
187 1800 0 0 1 &mpic 34 1 187 1800 0 0 1 &mpic 4 1
188 1800 0 0 2 &mpic 31 1 188 1800 0 0 2 &mpic 1 1
189 1800 0 0 3 &mpic 32 1 189 1800 0 0 3 &mpic 2 1
190 1800 0 0 4 &mpic 33 1 190 1800 0 0 4 &mpic 3 1
191 191
192 /* IDSEL 0x04 */ 192 /* IDSEL 0x04 */
193 2000 0 0 1 &mpic 33 1 193 2000 0 0 1 &mpic 3 1
194 2000 0 0 2 &mpic 34 1 194 2000 0 0 2 &mpic 4 1
195 2000 0 0 3 &mpic 31 1 195 2000 0 0 3 &mpic 1 1
196 2000 0 0 4 &mpic 32 1 196 2000 0 0 4 &mpic 2 1
197 197
198 /* IDSEL 0x05 */ 198 /* IDSEL 0x05 */
199 2800 0 0 1 &mpic 32 1 199 2800 0 0 1 &mpic 2 1
200 2800 0 0 2 &mpic 33 1 200 2800 0 0 2 &mpic 3 1
201 2800 0 0 3 &mpic 34 1 201 2800 0 0 3 &mpic 4 1
202 2800 0 0 4 &mpic 31 1 202 2800 0 0 4 &mpic 1 1
203 203
204 /* IDSEL 0x0c */ 204 /* IDSEL 0x0c */
205 6000 0 0 1 &mpic 31 1 205 6000 0 0 1 &mpic 1 1
206 6000 0 0 2 &mpic 32 1 206 6000 0 0 2 &mpic 2 1
207 6000 0 0 3 &mpic 33 1 207 6000 0 0 3 &mpic 3 1
208 6000 0 0 4 &mpic 34 1 208 6000 0 0 4 &mpic 4 1
209 209
210 /* IDSEL 0x0d */ 210 /* IDSEL 0x0d */
211 6800 0 0 1 &mpic 34 1 211 6800 0 0 1 &mpic 4 1
212 6800 0 0 2 &mpic 31 1 212 6800 0 0 2 &mpic 1 1
213 6800 0 0 3 &mpic 32 1 213 6800 0 0 3 &mpic 2 1
214 6800 0 0 4 &mpic 33 1 214 6800 0 0 4 &mpic 3 1
215 215
216 /* IDSEL 0x0e */ 216 /* IDSEL 0x0e */
217 7000 0 0 1 &mpic 33 1 217 7000 0 0 1 &mpic 3 1
218 7000 0 0 2 &mpic 34 1 218 7000 0 0 2 &mpic 4 1
219 7000 0 0 3 &mpic 31 1 219 7000 0 0 3 &mpic 1 1
220 7000 0 0 4 &mpic 32 1 220 7000 0 0 4 &mpic 2 1
221 221
222 /* IDSEL 0x0f */ 222 /* IDSEL 0x0f */
223 7800 0 0 1 &mpic 32 1 223 7800 0 0 1 &mpic 2 1
224 7800 0 0 2 &mpic 33 1 224 7800 0 0 2 &mpic 3 1
225 7800 0 0 3 &mpic 34 1 225 7800 0 0 3 &mpic 4 1
226 7800 0 0 4 &mpic 31 1 226 7800 0 0 4 &mpic 1 1
227 227
228 /* IDSEL 0x12 */ 228 /* IDSEL 0x12 */
229 9000 0 0 1 &mpic 31 1 229 9000 0 0 1 &mpic 1 1
230 9000 0 0 2 &mpic 32 1 230 9000 0 0 2 &mpic 2 1
231 9000 0 0 3 &mpic 33 1 231 9000 0 0 3 &mpic 3 1
232 9000 0 0 4 &mpic 34 1 232 9000 0 0 4 &mpic 4 1
233 233
234 /* IDSEL 0x13 */ 234 /* IDSEL 0x13 */
235 9800 0 0 1 &mpic 34 1 235 9800 0 0 1 &mpic 4 1
236 9800 0 0 2 &mpic 31 1 236 9800 0 0 2 &mpic 1 1
237 9800 0 0 3 &mpic 32 1 237 9800 0 0 3 &mpic 2 1
238 9800 0 0 4 &mpic 33 1 238 9800 0 0 4 &mpic 3 1
239 239
240 /* IDSEL 0x14 */ 240 /* IDSEL 0x14 */
241 a000 0 0 1 &mpic 33 1 241 a000 0 0 1 &mpic 3 1
242 a000 0 0 2 &mpic 34 1 242 a000 0 0 2 &mpic 4 1
243 a000 0 0 3 &mpic 31 1 243 a000 0 0 3 &mpic 1 1
244 a000 0 0 4 &mpic 32 1 244 a000 0 0 4 &mpic 2 1
245 245
246 /* IDSEL 0x15 */ 246 /* IDSEL 0x15 */
247 a800 0 0 1 &mpic 32 1 247 a800 0 0 1 &mpic 2 1
248 a800 0 0 2 &mpic 33 1 248 a800 0 0 2 &mpic 3 1
249 a800 0 0 3 &mpic 34 1 249 a800 0 0 3 &mpic 4 1
250 a800 0 0 4 &mpic 31 1>; 250 a800 0 0 4 &mpic 1 1>;
251 interrupt-parent = <&mpic>; 251 interrupt-parent = <&mpic>;
252 interrupts = <08 2>; 252 interrupts = <18 2>;
253 bus-range = <0 0>; 253 bus-range = <0 0>;
254 ranges = <02000000 0 80000000 80000000 0 20000000 254 ranges = <02000000 0 80000000 80000000 0 20000000
255 01000000 0 00000000 e2000000 0 00100000>; 255 01000000 0 00000000 e2000000 0 00100000>;
diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts
index 2a0afbcebe37..c35f1690f2c7 100644
--- a/arch/powerpc/boot/dts/mpc8541cds.dts
+++ b/arch/powerpc/boot/dts/mpc8541cds.dts
@@ -52,7 +52,7 @@
52 compatible = "fsl,8541-memory-controller"; 52 compatible = "fsl,8541-memory-controller";
53 reg = <2000 1000>; 53 reg = <2000 1000>;
54 interrupt-parent = <&mpic>; 54 interrupt-parent = <&mpic>;
55 interrupts = <2 2>; 55 interrupts = <12 2>;
56 }; 56 };
57 57
58 l2-cache-controller@20000 { 58 l2-cache-controller@20000 {
@@ -61,14 +61,14 @@
61 cache-line-size = <20>; // 32 bytes 61 cache-line-size = <20>; // 32 bytes
62 cache-size = <40000>; // L2, 256K 62 cache-size = <40000>; // L2, 256K
63 interrupt-parent = <&mpic>; 63 interrupt-parent = <&mpic>;
64 interrupts = <0 2>; 64 interrupts = <10 2>;
65 }; 65 };
66 66
67 i2c@3000 { 67 i2c@3000 {
68 device_type = "i2c"; 68 device_type = "i2c";
69 compatible = "fsl-i2c"; 69 compatible = "fsl-i2c";
70 reg = <3000 100>; 70 reg = <3000 100>;
71 interrupts = <1b 2>; 71 interrupts = <2b 2>;
72 interrupt-parent = <&mpic>; 72 interrupt-parent = <&mpic>;
73 dfsrr; 73 dfsrr;
74 }; 74 };
@@ -81,13 +81,13 @@
81 reg = <24520 20>; 81 reg = <24520 20>;
82 phy0: ethernet-phy@0 { 82 phy0: ethernet-phy@0 {
83 interrupt-parent = <&mpic>; 83 interrupt-parent = <&mpic>;
84 interrupts = <35 0>; 84 interrupts = <5 0>;
85 reg = <0>; 85 reg = <0>;
86 device_type = "ethernet-phy"; 86 device_type = "ethernet-phy";
87 }; 87 };
88 phy1: ethernet-phy@1 { 88 phy1: ethernet-phy@1 {
89 interrupt-parent = <&mpic>; 89 interrupt-parent = <&mpic>;
90 interrupts = <35 0>; 90 interrupts = <5 0>;
91 reg = <1>; 91 reg = <1>;
92 device_type = "ethernet-phy"; 92 device_type = "ethernet-phy";
93 }; 93 };
@@ -101,7 +101,7 @@
101 compatible = "gianfar"; 101 compatible = "gianfar";
102 reg = <24000 1000>; 102 reg = <24000 1000>;
103 local-mac-address = [ 00 00 00 00 00 00 ]; 103 local-mac-address = [ 00 00 00 00 00 00 ];
104 interrupts = <d 2 e 2 12 2>; 104 interrupts = <1d 2 1e 2 22 2>;
105 interrupt-parent = <&mpic>; 105 interrupt-parent = <&mpic>;
106 phy-handle = <&phy0>; 106 phy-handle = <&phy0>;
107 }; 107 };
@@ -114,7 +114,7 @@
114 compatible = "gianfar"; 114 compatible = "gianfar";
115 reg = <25000 1000>; 115 reg = <25000 1000>;
116 local-mac-address = [ 00 00 00 00 00 00 ]; 116 local-mac-address = [ 00 00 00 00 00 00 ];
117 interrupts = <13 2 14 2 18 2>; 117 interrupts = <23 2 24 2 28 2>;
118 interrupt-parent = <&mpic>; 118 interrupt-parent = <&mpic>;
119 phy-handle = <&phy1>; 119 phy-handle = <&phy1>;
120 }; 120 };
@@ -124,7 +124,7 @@
124 compatible = "ns16550"; 124 compatible = "ns16550";
125 reg = <4500 100>; // reg base, size 125 reg = <4500 100>; // reg base, size
126 clock-frequency = <0>; // should we fill in in uboot? 126 clock-frequency = <0>; // should we fill in in uboot?
127 interrupts = <1a 2>; 127 interrupts = <2a 2>;
128 interrupt-parent = <&mpic>; 128 interrupt-parent = <&mpic>;
129 }; 129 };
130 130
@@ -133,7 +133,7 @@
133 compatible = "ns16550"; 133 compatible = "ns16550";
134 reg = <4600 100>; // reg base, size 134 reg = <4600 100>; // reg base, size
135 clock-frequency = <0>; // should we fill in in uboot? 135 clock-frequency = <0>; // should we fill in in uboot?
136 interrupts = <1a 2>; 136 interrupts = <2a 2>;
137 interrupt-parent = <&mpic>; 137 interrupt-parent = <&mpic>;
138 }; 138 };
139 139
@@ -142,49 +142,49 @@
142 interrupt-map = < 142 interrupt-map = <
143 143
144 /* IDSEL 0x10 */ 144 /* IDSEL 0x10 */
145 08000 0 0 1 &mpic 30 1 145 08000 0 0 1 &mpic 0 1
146 08000 0 0 2 &mpic 31 1 146 08000 0 0 2 &mpic 1 1
147 08000 0 0 3 &mpic 32 1 147 08000 0 0 3 &mpic 2 1
148 08000 0 0 4 &mpic 33 1 148 08000 0 0 4 &mpic 3 1
149 149
150 /* IDSEL 0x11 */ 150 /* IDSEL 0x11 */
151 08800 0 0 1 &mpic 30 1 151 08800 0 0 1 &mpic 0 1
152 08800 0 0 2 &mpic 31 1 152 08800 0 0 2 &mpic 1 1
153 08800 0 0 3 &mpic 32 1 153 08800 0 0 3 &mpic 2 1
154 08800 0 0 4 &mpic 33 1 154 08800 0 0 4 &mpic 3 1
155 155
156 /* IDSEL 0x12 (Slot 1) */ 156 /* IDSEL 0x12 (Slot 1) */
157 09000 0 0 1 &mpic 30 1 157 09000 0 0 1 &mpic 0 1
158 09000 0 0 2 &mpic 31 1 158 09000 0 0 2 &mpic 1 1
159 09000 0 0 3 &mpic 32 1 159 09000 0 0 3 &mpic 2 1
160 09000 0 0 4 &mpic 33 1 160 09000 0 0 4 &mpic 3 1
161 161
162 /* IDSEL 0x13 (Slot 2) */ 162 /* IDSEL 0x13 (Slot 2) */
163 09800 0 0 1 &mpic 31 1 163 09800 0 0 1 &mpic 1 1
164 09800 0 0 2 &mpic 32 1 164 09800 0 0 2 &mpic 2 1
165 09800 0 0 3 &mpic 33 1 165 09800 0 0 3 &mpic 3 1
166 09800 0 0 4 &mpic 30 1 166 09800 0 0 4 &mpic 0 1
167 167
168 /* IDSEL 0x14 (Slot 3) */ 168 /* IDSEL 0x14 (Slot 3) */
169 0a000 0 0 1 &mpic 32 1 169 0a000 0 0 1 &mpic 2 1
170 0a000 0 0 2 &mpic 33 1 170 0a000 0 0 2 &mpic 3 1
171 0a000 0 0 3 &mpic 30 1 171 0a000 0 0 3 &mpic 0 1
172 0a000 0 0 4 &mpic 31 1 172 0a000 0 0 4 &mpic 1 1
173 173
174 /* IDSEL 0x15 (Slot 4) */ 174 /* IDSEL 0x15 (Slot 4) */
175 0a800 0 0 1 &mpic 33 1 175 0a800 0 0 1 &mpic 3 1
176 0a800 0 0 2 &mpic 30 1 176 0a800 0 0 2 &mpic 0 1
177 0a800 0 0 3 &mpic 31 1 177 0a800 0 0 3 &mpic 1 1
178 0a800 0 0 4 &mpic 32 1 178 0a800 0 0 4 &mpic 2 1
179 179
180 /* Bus 1 (Tundra Bridge) */ 180 /* Bus 1 (Tundra Bridge) */
181 /* IDSEL 0x12 (ISA bridge) */ 181 /* IDSEL 0x12 (ISA bridge) */
182 19000 0 0 1 &mpic 30 1 182 19000 0 0 1 &mpic 0 1
183 19000 0 0 2 &mpic 31 1 183 19000 0 0 2 &mpic 1 1
184 19000 0 0 3 &mpic 32 1 184 19000 0 0 3 &mpic 2 1
185 19000 0 0 4 &mpic 33 1>; 185 19000 0 0 4 &mpic 3 1>;
186 interrupt-parent = <&mpic>; 186 interrupt-parent = <&mpic>;
187 interrupts = <08 2>; 187 interrupts = <18 2>;
188 bus-range = <0 0>; 188 bus-range = <0 0>;
189 ranges = <02000000 0 80000000 80000000 0 20000000 189 ranges = <02000000 0 80000000 80000000 0 20000000
190 01000000 0 00000000 e2000000 0 00100000>; 190 01000000 0 00000000 e2000000 0 00100000>;
@@ -216,12 +216,12 @@
216 interrupt-map = < 216 interrupt-map = <
217 217
218 /* IDSEL 0x15 */ 218 /* IDSEL 0x15 */
219 a800 0 0 1 &mpic 3b 1 219 a800 0 0 1 &mpic b 1
220 a800 0 0 2 &mpic 3b 1 220 a800 0 0 2 &mpic b 1
221 a800 0 0 3 &mpic 3b 1 221 a800 0 0 3 &mpic b 1
222 a800 0 0 4 &mpic 3b 1>; 222 a800 0 0 4 &mpic b 1>;
223 interrupt-parent = <&mpic>; 223 interrupt-parent = <&mpic>;
224 interrupts = <09 2>; 224 interrupts = <19 2>;
225 bus-range = <0 0>; 225 bus-range = <0 0>;
226 ranges = <02000000 0 a0000000 a0000000 0 20000000 226 ranges = <02000000 0 a0000000 a0000000 0 20000000
227 01000000 0 00000000 e3000000 0 00100000>; 227 01000000 0 00000000 e3000000 0 00100000>;
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts
index 3033599e74e8..828592592460 100644
--- a/arch/powerpc/boot/dts/mpc8544ds.dts
+++ b/arch/powerpc/boot/dts/mpc8544ds.dts
@@ -52,7 +52,7 @@
52 compatible = "fsl,8544-memory-controller"; 52 compatible = "fsl,8544-memory-controller";
53 reg = <2000 1000>; 53 reg = <2000 1000>;
54 interrupt-parent = <&mpic>; 54 interrupt-parent = <&mpic>;
55 interrupts = <2 2>; 55 interrupts = <12 2>;
56 }; 56 };
57 57
58 l2-cache-controller@20000 { 58 l2-cache-controller@20000 {
@@ -61,14 +61,14 @@
61 cache-line-size = <20>; // 32 bytes 61 cache-line-size = <20>; // 32 bytes
62 cache-size = <40000>; // L2, 256K 62 cache-size = <40000>; // L2, 256K
63 interrupt-parent = <&mpic>; 63 interrupt-parent = <&mpic>;
64 interrupts = <0 2>; 64 interrupts = <10 2>;
65 }; 65 };
66 66
67 i2c@3000 { 67 i2c@3000 {
68 device_type = "i2c"; 68 device_type = "i2c";
69 compatible = "fsl-i2c"; 69 compatible = "fsl-i2c";
70 reg = <3000 100>; 70 reg = <3000 100>;
71 interrupts = <1b 2>; 71 interrupts = <2b 2>;
72 interrupt-parent = <&mpic>; 72 interrupt-parent = <&mpic>;
73 dfsrr; 73 dfsrr;
74 }; 74 };
@@ -81,13 +81,13 @@
81 reg = <24520 20>; 81 reg = <24520 20>;
82 phy0: ethernet-phy@0 { 82 phy0: ethernet-phy@0 {
83 interrupt-parent = <&mpic>; 83 interrupt-parent = <&mpic>;
84 interrupts = <3a 1>; 84 interrupts = <a 1>;
85 reg = <0>; 85 reg = <0>;
86 device_type = "ethernet-phy"; 86 device_type = "ethernet-phy";
87 }; 87 };
88 phy1: ethernet-phy@1 { 88 phy1: ethernet-phy@1 {
89 interrupt-parent = <&mpic>; 89 interrupt-parent = <&mpic>;
90 interrupts = <3a 1>; 90 interrupts = <a 1>;
91 reg = <1>; 91 reg = <1>;
92 device_type = "ethernet-phy"; 92 device_type = "ethernet-phy";
93 }; 93 };
@@ -101,7 +101,7 @@
101 compatible = "gianfar"; 101 compatible = "gianfar";
102 reg = <24000 1000>; 102 reg = <24000 1000>;
103 local-mac-address = [ 00 00 00 00 00 00 ]; 103 local-mac-address = [ 00 00 00 00 00 00 ];
104 interrupts = <d 2 e 2 12 2>; 104 interrupts = <1d 2 1e 2 22 2>;
105 interrupt-parent = <&mpic>; 105 interrupt-parent = <&mpic>;
106 phy-handle = <&phy0>; 106 phy-handle = <&phy0>;
107 }; 107 };
@@ -114,7 +114,7 @@
114 compatible = "gianfar"; 114 compatible = "gianfar";
115 reg = <26000 1000>; 115 reg = <26000 1000>;
116 local-mac-address = [ 00 00 00 00 00 00 ]; 116 local-mac-address = [ 00 00 00 00 00 00 ];
117 interrupts = <f 2 10 2 11 2>; 117 interrupts = <1f 2 20 2 21 2>;
118 interrupt-parent = <&mpic>; 118 interrupt-parent = <&mpic>;
119 phy-handle = <&phy1>; 119 phy-handle = <&phy1>;
120 }; 120 };
@@ -124,7 +124,7 @@
124 compatible = "ns16550"; 124 compatible = "ns16550";
125 reg = <4500 100>; 125 reg = <4500 100>;
126 clock-frequency = <0>; 126 clock-frequency = <0>;
127 interrupts = <1a 2>; 127 interrupts = <2a 2>;
128 interrupt-parent = <&mpic>; 128 interrupt-parent = <&mpic>;
129 }; 129 };
130 130
@@ -133,7 +133,7 @@
133 compatible = "ns16550"; 133 compatible = "ns16550";
134 reg = <4600 100>; 134 reg = <4600 100>;
135 clock-frequency = <0>; 135 clock-frequency = <0>;
136 interrupts = <1a 2>; 136 interrupts = <2a 2>;
137 interrupt-parent = <&mpic>; 137 interrupt-parent = <&mpic>;
138 }; 138 };
139 139
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts
index ea9b12662630..2293036f7624 100644
--- a/arch/powerpc/boot/dts/mpc8548cds.dts
+++ b/arch/powerpc/boot/dts/mpc8548cds.dts
@@ -52,7 +52,7 @@
52 compatible = "fsl,8548-memory-controller"; 52 compatible = "fsl,8548-memory-controller";
53 reg = <2000 1000>; 53 reg = <2000 1000>;
54 interrupt-parent = <&mpic>; 54 interrupt-parent = <&mpic>;
55 interrupts = <2 2>; 55 interrupts = <12 2>;
56 }; 56 };
57 57
58 l2-cache-controller@20000 { 58 l2-cache-controller@20000 {
@@ -61,14 +61,14 @@
61 cache-line-size = <20>; // 32 bytes 61 cache-line-size = <20>; // 32 bytes
62 cache-size = <80000>; // L2, 512K 62 cache-size = <80000>; // L2, 512K
63 interrupt-parent = <&mpic>; 63 interrupt-parent = <&mpic>;
64 interrupts = <0 2>; 64 interrupts = <10 2>;
65 }; 65 };
66 66
67 i2c@3000 { 67 i2c@3000 {
68 device_type = "i2c"; 68 device_type = "i2c";
69 compatible = "fsl-i2c"; 69 compatible = "fsl-i2c";
70 reg = <3000 100>; 70 reg = <3000 100>;
71 interrupts = <1b 2>; 71 interrupts = <2b 2>;
72 interrupt-parent = <&mpic>; 72 interrupt-parent = <&mpic>;
73 dfsrr; 73 dfsrr;
74 }; 74 };
@@ -81,25 +81,25 @@
81 reg = <24520 20>; 81 reg = <24520 20>;
82 phy0: ethernet-phy@0 { 82 phy0: ethernet-phy@0 {
83 interrupt-parent = <&mpic>; 83 interrupt-parent = <&mpic>;
84 interrupts = <35 0>; 84 interrupts = <5 0>;
85 reg = <0>; 85 reg = <0>;
86 device_type = "ethernet-phy"; 86 device_type = "ethernet-phy";
87 }; 87 };
88 phy1: ethernet-phy@1 { 88 phy1: ethernet-phy@1 {
89 interrupt-parent = <&mpic>; 89 interrupt-parent = <&mpic>;
90 interrupts = <35 0>; 90 interrupts = <5 0>;
91 reg = <1>; 91 reg = <1>;
92 device_type = "ethernet-phy"; 92 device_type = "ethernet-phy";
93 }; 93 };
94 phy2: ethernet-phy@2 { 94 phy2: ethernet-phy@2 {
95 interrupt-parent = <&mpic>; 95 interrupt-parent = <&mpic>;
96 interrupts = <35 0>; 96 interrupts = <5 0>;
97 reg = <2>; 97 reg = <2>;
98 device_type = "ethernet-phy"; 98 device_type = "ethernet-phy";
99 }; 99 };
100 phy3: ethernet-phy@3 { 100 phy3: ethernet-phy@3 {
101 interrupt-parent = <&mpic>; 101 interrupt-parent = <&mpic>;
102 interrupts = <35 0>; 102 interrupts = <5 0>;
103 reg = <3>; 103 reg = <3>;
104 device_type = "ethernet-phy"; 104 device_type = "ethernet-phy";
105 }; 105 };
@@ -113,7 +113,7 @@
113 compatible = "gianfar"; 113 compatible = "gianfar";
114 reg = <24000 1000>; 114 reg = <24000 1000>;
115 local-mac-address = [ 00 00 00 00 00 00 ]; 115 local-mac-address = [ 00 00 00 00 00 00 ];
116 interrupts = <d 2 e 2 12 2>; 116 interrupts = <1d 2 1e 2 22 2>;
117 interrupt-parent = <&mpic>; 117 interrupt-parent = <&mpic>;
118 phy-handle = <&phy0>; 118 phy-handle = <&phy0>;
119 }; 119 };
@@ -126,7 +126,7 @@
126 compatible = "gianfar"; 126 compatible = "gianfar";
127 reg = <25000 1000>; 127 reg = <25000 1000>;
128 local-mac-address = [ 00 00 00 00 00 00 ]; 128 local-mac-address = [ 00 00 00 00 00 00 ];
129 interrupts = <13 2 14 2 18 2>; 129 interrupts = <23 2 24 2 28 2>;
130 interrupt-parent = <&mpic>; 130 interrupt-parent = <&mpic>;
131 phy-handle = <&phy1>; 131 phy-handle = <&phy1>;
132 }; 132 };
@@ -140,7 +140,7 @@
140 compatible = "gianfar"; 140 compatible = "gianfar";
141 reg = <26000 1000>; 141 reg = <26000 1000>;
142 local-mac-address = [ 00 00 00 00 00 00 ]; 142 local-mac-address = [ 00 00 00 00 00 00 ];
143 interrupts = <f 2 10 2 11 2>; 143 interrupts = <1f 2 20 2 21 2>;
144 interrupt-parent = <&mpic>; 144 interrupt-parent = <&mpic>;
145 phy-handle = <&phy2>; 145 phy-handle = <&phy2>;
146 }; 146 };
@@ -153,7 +153,7 @@
153 compatible = "gianfar"; 153 compatible = "gianfar";
154 reg = <27000 1000>; 154 reg = <27000 1000>;
155 local-mac-address = [ 00 00 00 00 00 00 ]; 155 local-mac-address = [ 00 00 00 00 00 00 ];
156 interrupts = <15 2 16 2 17 2>; 156 interrupts = <25 2 26 2 27 2>;
157 interrupt-parent = <&mpic>; 157 interrupt-parent = <&mpic>;
158 phy-handle = <&phy3>; 158 phy-handle = <&phy3>;
159 }; 159 };
@@ -164,7 +164,7 @@
164 compatible = "ns16550"; 164 compatible = "ns16550";
165 reg = <4500 100>; // reg base, size 165 reg = <4500 100>; // reg base, size
166 clock-frequency = <0>; // should we fill in in uboot? 166 clock-frequency = <0>; // should we fill in in uboot?
167 interrupts = <1a 2>; 167 interrupts = <2a 2>;
168 interrupt-parent = <&mpic>; 168 interrupt-parent = <&mpic>;
169 }; 169 };
170 170
@@ -173,7 +173,7 @@
173 compatible = "ns16550"; 173 compatible = "ns16550";
174 reg = <4600 100>; // reg base, size 174 reg = <4600 100>; // reg base, size
175 clock-frequency = <0>; // should we fill in in uboot? 175 clock-frequency = <0>; // should we fill in in uboot?
176 interrupts = <1a 2>; 176 interrupts = <2a 2>;
177 interrupt-parent = <&mpic>; 177 interrupt-parent = <&mpic>;
178 }; 178 };
179 179
@@ -188,49 +188,49 @@
188 interrupt-map = < 188 interrupt-map = <
189 189
190 /* IDSEL 0x10 */ 190 /* IDSEL 0x10 */
191 08000 0 0 1 &mpic 30 1 191 08000 0 0 1 &mpic 0 1
192 08000 0 0 2 &mpic 31 1 192 08000 0 0 2 &mpic 1 1
193 08000 0 0 3 &mpic 32 1 193 08000 0 0 3 &mpic 2 1
194 08000 0 0 4 &mpic 33 1 194 08000 0 0 4 &mpic 3 1
195 195
196 /* IDSEL 0x11 */ 196 /* IDSEL 0x11 */
197 08800 0 0 1 &mpic 30 1 197 08800 0 0 1 &mpic 0 1
198 08800 0 0 2 &mpic 31 1 198 08800 0 0 2 &mpic 1 1
199 08800 0 0 3 &mpic 32 1 199 08800 0 0 3 &mpic 2 1
200 08800 0 0 4 &mpic 33 1 200 08800 0 0 4 &mpic 3 1
201 201
202 /* IDSEL 0x12 (Slot 1) */ 202 /* IDSEL 0x12 (Slot 1) */
203 09000 0 0 1 &mpic 30 1 203 09000 0 0 1 &mpic 0 1
204 09000 0 0 2 &mpic 31 1 204 09000 0 0 2 &mpic 1 1
205 09000 0 0 3 &mpic 32 1 205 09000 0 0 3 &mpic 2 1
206 09000 0 0 4 &mpic 33 1 206 09000 0 0 4 &mpic 3 1
207 207
208 /* IDSEL 0x13 (Slot 2) */ 208 /* IDSEL 0x13 (Slot 2) */
209 09800 0 0 1 &mpic 31 1 209 09800 0 0 1 &mpic 1 1
210 09800 0 0 2 &mpic 32 1 210 09800 0 0 2 &mpic 2 1
211 09800 0 0 3 &mpic 33 1 211 09800 0 0 3 &mpic 3 1
212 09800 0 0 4 &mpic 30 1 212 09800 0 0 4 &mpic 0 1
213 213
214 /* IDSEL 0x14 (Slot 3) */ 214 /* IDSEL 0x14 (Slot 3) */
215 0a000 0 0 1 &mpic 32 1 215 0a000 0 0 1 &mpic 2 1
216 0a000 0 0 2 &mpic 33 1 216 0a000 0 0 2 &mpic 3 1
217 0a000 0 0 3 &mpic 30 1 217 0a000 0 0 3 &mpic 0 1
218 0a000 0 0 4 &mpic 31 1 218 0a000 0 0 4 &mpic 1 1
219 219
220 /* IDSEL 0x15 (Slot 4) */ 220 /* IDSEL 0x15 (Slot 4) */
221 0a800 0 0 1 &mpic 33 1 221 0a800 0 0 1 &mpic 3 1
222 0a800 0 0 2 &mpic 30 1 222 0a800 0 0 2 &mpic 0 1
223 0a800 0 0 3 &mpic 31 1 223 0a800 0 0 3 &mpic 1 1
224 0a800 0 0 4 &mpic 32 1 224 0a800 0 0 4 &mpic 2 1
225 225
226 /* Bus 1 (Tundra Bridge) */ 226 /* Bus 1 (Tundra Bridge) */
227 /* IDSEL 0x12 (ISA bridge) */ 227 /* IDSEL 0x12 (ISA bridge) */
228 19000 0 0 1 &mpic 30 1 228 19000 0 0 1 &mpic 0 1
229 19000 0 0 2 &mpic 31 1 229 19000 0 0 2 &mpic 1 1
230 19000 0 0 3 &mpic 32 1 230 19000 0 0 3 &mpic 2 1
231 19000 0 0 4 &mpic 33 1>; 231 19000 0 0 4 &mpic 3 1>;
232 interrupt-parent = <&mpic>; 232 interrupt-parent = <&mpic>;
233 interrupts = <08 2>; 233 interrupts = <18 2>;
234 bus-range = <0 0>; 234 bus-range = <0 0>;
235 ranges = <02000000 0 80000000 80000000 0 20000000 235 ranges = <02000000 0 80000000 80000000 0 20000000
236 01000000 0 00000000 e2000000 0 00100000>; 236 01000000 0 00000000 e2000000 0 00100000>;
@@ -262,12 +262,12 @@
262 interrupt-map = < 262 interrupt-map = <
263 263
264 /* IDSEL 0x15 */ 264 /* IDSEL 0x15 */
265 a800 0 0 1 &mpic 3b 1 265 a800 0 0 1 &mpic b 1
266 a800 0 0 2 &mpic 3b 1 266 a800 0 0 2 &mpic b 1
267 a800 0 0 3 &mpic 3b 1 267 a800 0 0 3 &mpic b 1
268 a800 0 0 4 &mpic 3b 1>; 268 a800 0 0 4 &mpic b 1>;
269 interrupt-parent = <&mpic>; 269 interrupt-parent = <&mpic>;
270 interrupts = <09 2>; 270 interrupts = <19 2>;
271 bus-range = <0 0>; 271 bus-range = <0 0>;
272 ranges = <02000000 0 a0000000 a0000000 0 20000000 272 ranges = <02000000 0 a0000000 a0000000 0 20000000
273 01000000 0 00000000 e3000000 0 00100000>; 273 01000000 0 00000000 e3000000 0 00100000>;
diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts
index c41ee616603e..9b7268964e95 100644
--- a/arch/powerpc/boot/dts/mpc8555cds.dts
+++ b/arch/powerpc/boot/dts/mpc8555cds.dts
@@ -52,7 +52,7 @@
52 compatible = "fsl,8555-memory-controller"; 52 compatible = "fsl,8555-memory-controller";
53 reg = <2000 1000>; 53 reg = <2000 1000>;
54 interrupt-parent = <&mpic>; 54 interrupt-parent = <&mpic>;
55 interrupts = <2 2>; 55 interrupts = <12 2>;
56 }; 56 };
57 57
58 l2-cache-controller@20000 { 58 l2-cache-controller@20000 {
@@ -61,14 +61,14 @@
61 cache-line-size = <20>; // 32 bytes 61 cache-line-size = <20>; // 32 bytes
62 cache-size = <40000>; // L2, 256K 62 cache-size = <40000>; // L2, 256K
63 interrupt-parent = <&mpic>; 63 interrupt-parent = <&mpic>;
64 interrupts = <0 2>; 64 interrupts = <10 2>;
65 }; 65 };
66 66
67 i2c@3000 { 67 i2c@3000 {
68 device_type = "i2c"; 68 device_type = "i2c";
69 compatible = "fsl-i2c"; 69 compatible = "fsl-i2c";
70 reg = <3000 100>; 70 reg = <3000 100>;
71 interrupts = <1b 2>; 71 interrupts = <2b 2>;
72 interrupt-parent = <&mpic>; 72 interrupt-parent = <&mpic>;
73 dfsrr; 73 dfsrr;
74 }; 74 };
@@ -81,13 +81,13 @@
81 reg = <24520 20>; 81 reg = <24520 20>;
82 phy0: ethernet-phy@0 { 82 phy0: ethernet-phy@0 {
83 interrupt-parent = <&mpic>; 83 interrupt-parent = <&mpic>;
84 interrupts = <35 0>; 84 interrupts = <5 0>;
85 reg = <0>; 85 reg = <0>;
86 device_type = "ethernet-phy"; 86 device_type = "ethernet-phy";
87 }; 87 };
88 phy1: ethernet-phy@1 { 88 phy1: ethernet-phy@1 {
89 interrupt-parent = <&mpic>; 89 interrupt-parent = <&mpic>;
90 interrupts = <35 0>; 90 interrupts = <5 0>;
91 reg = <1>; 91 reg = <1>;
92 device_type = "ethernet-phy"; 92 device_type = "ethernet-phy";
93 }; 93 };
@@ -101,7 +101,7 @@
101 compatible = "gianfar"; 101 compatible = "gianfar";
102 reg = <24000 1000>; 102 reg = <24000 1000>;
103 local-mac-address = [ 00 00 00 00 00 00 ]; 103 local-mac-address = [ 00 00 00 00 00 00 ];
104 interrupts = <0d 2 0e 2 12 2>; 104 interrupts = <1d 2 1e 2 22 2>;
105 interrupt-parent = <&mpic>; 105 interrupt-parent = <&mpic>;
106 phy-handle = <&phy0>; 106 phy-handle = <&phy0>;
107 }; 107 };
@@ -114,7 +114,7 @@
114 compatible = "gianfar"; 114 compatible = "gianfar";
115 reg = <25000 1000>; 115 reg = <25000 1000>;
116 local-mac-address = [ 00 00 00 00 00 00 ]; 116 local-mac-address = [ 00 00 00 00 00 00 ];
117 interrupts = <13 2 14 2 18 2>; 117 interrupts = <23 2 24 2 28 2>;
118 interrupt-parent = <&mpic>; 118 interrupt-parent = <&mpic>;
119 phy-handle = <&phy1>; 119 phy-handle = <&phy1>;
120 }; 120 };
@@ -124,7 +124,7 @@
124 compatible = "ns16550"; 124 compatible = "ns16550";
125 reg = <4500 100>; // reg base, size 125 reg = <4500 100>; // reg base, size
126 clock-frequency = <0>; // should we fill in in uboot? 126 clock-frequency = <0>; // should we fill in in uboot?
127 interrupts = <1a 2>; 127 interrupts = <2a 2>;
128 interrupt-parent = <&mpic>; 128 interrupt-parent = <&mpic>;
129 }; 129 };
130 130
@@ -133,7 +133,7 @@
133 compatible = "ns16550"; 133 compatible = "ns16550";
134 reg = <4600 100>; // reg base, size 134 reg = <4600 100>; // reg base, size
135 clock-frequency = <0>; // should we fill in in uboot? 135 clock-frequency = <0>; // should we fill in in uboot?
136 interrupts = <1a 2>; 136 interrupts = <2a 2>;
137 interrupt-parent = <&mpic>; 137 interrupt-parent = <&mpic>;
138 }; 138 };
139 139
@@ -142,49 +142,49 @@
142 interrupt-map = < 142 interrupt-map = <
143 143
144 /* IDSEL 0x10 */ 144 /* IDSEL 0x10 */
145 08000 0 0 1 &mpic 30 1 145 08000 0 0 1 &mpic 0 1
146 08000 0 0 2 &mpic 31 1 146 08000 0 0 2 &mpic 1 1
147 08000 0 0 3 &mpic 32 1 147 08000 0 0 3 &mpic 2 1
148 08000 0 0 4 &mpic 33 1 148 08000 0 0 4 &mpic 3 1
149 149
150 /* IDSEL 0x11 */ 150 /* IDSEL 0x11 */
151 08800 0 0 1 &mpic 30 1 151 08800 0 0 1 &mpic 0 1
152 08800 0 0 2 &mpic 31 1 152 08800 0 0 2 &mpic 1 1
153 08800 0 0 3 &mpic 32 1 153 08800 0 0 3 &mpic 2 1
154 08800 0 0 4 &mpic 33 1 154 08800 0 0 4 &mpic 3 1
155 155
156 /* IDSEL 0x12 (Slot 1) */ 156 /* IDSEL 0x12 (Slot 1) */
157 09000 0 0 1 &mpic 30 1 157 09000 0 0 1 &mpic 0 1
158 09000 0 0 2 &mpic 31 1 158 09000 0 0 2 &mpic 1 1
159 09000 0 0 3 &mpic 32 1 159 09000 0 0 3 &mpic 2 1
160 09000 0 0 4 &mpic 33 1 160 09000 0 0 4 &mpic 3 1
161 161
162 /* IDSEL 0x13 (Slot 2) */ 162 /* IDSEL 0x13 (Slot 2) */
163 09800 0 0 1 &mpic 31 1 163 09800 0 0 1 &mpic 1 1
164 09800 0 0 2 &mpic 32 1 164 09800 0 0 2 &mpic 2 1
165 09800 0 0 3 &mpic 33 1 165 09800 0 0 3 &mpic 3 1
166 09800 0 0 4 &mpic 30 1 166 09800 0 0 4 &mpic 0 1
167 167
168 /* IDSEL 0x14 (Slot 3) */ 168 /* IDSEL 0x14 (Slot 3) */
169 0a000 0 0 1 &mpic 32 1 169 0a000 0 0 1 &mpic 2 1
170 0a000 0 0 2 &mpic 33 1 170 0a000 0 0 2 &mpic 3 1
171 0a000 0 0 3 &mpic 30 1 171 0a000 0 0 3 &mpic 0 1
172 0a000 0 0 4 &mpic 31 1 172 0a000 0 0 4 &mpic 1 1
173 173
174 /* IDSEL 0x15 (Slot 4) */ 174 /* IDSEL 0x15 (Slot 4) */
175 0a800 0 0 1 &mpic 33 1 175 0a800 0 0 1 &mpic 3 1
176 0a800 0 0 2 &mpic 30 1 176 0a800 0 0 2 &mpic 0 1
177 0a800 0 0 3 &mpic 31 1 177 0a800 0 0 3 &mpic 1 1
178 0a800 0 0 4 &mpic 32 1 178 0a800 0 0 4 &mpic 2 1
179 179
180 /* Bus 1 (Tundra Bridge) */ 180 /* Bus 1 (Tundra Bridge) */
181 /* IDSEL 0x12 (ISA bridge) */ 181 /* IDSEL 0x12 (ISA bridge) */
182 19000 0 0 1 &mpic 30 1 182 19000 0 0 1 &mpic 0 1
183 19000 0 0 2 &mpic 31 1 183 19000 0 0 2 &mpic 1 1
184 19000 0 0 3 &mpic 32 1 184 19000 0 0 3 &mpic 2 1
185 19000 0 0 4 &mpic 33 1>; 185 19000 0 0 4 &mpic 3 1>;
186 interrupt-parent = <&mpic>; 186 interrupt-parent = <&mpic>;
187 interrupts = <08 2>; 187 interrupts = <18 2>;
188 bus-range = <0 0>; 188 bus-range = <0 0>;
189 ranges = <02000000 0 80000000 80000000 0 20000000 189 ranges = <02000000 0 80000000 80000000 0 20000000
190 01000000 0 00000000 e2000000 0 00100000>; 190 01000000 0 00000000 e2000000 0 00100000>;
@@ -216,12 +216,12 @@
216 interrupt-map = < 216 interrupt-map = <
217 217
218 /* IDSEL 0x15 */ 218 /* IDSEL 0x15 */
219 a800 0 0 1 &mpic 3b 1 219 a800 0 0 1 &mpic b 1
220 a800 0 0 2 &mpic 3b 1 220 a800 0 0 2 &mpic b 1
221 a800 0 0 3 &mpic 3b 1 221 a800 0 0 3 &mpic b 1
222 a800 0 0 4 &mpic 3b 1>; 222 a800 0 0 4 &mpic b 1>;
223 interrupt-parent = <&mpic>; 223 interrupt-parent = <&mpic>;
224 interrupts = <09 2>; 224 interrupts = <19 2>;
225 bus-range = <0 0>; 225 bus-range = <0 0>;
226 ranges = <02000000 0 a0000000 a0000000 0 20000000 226 ranges = <02000000 0 a0000000 a0000000 0 20000000
227 01000000 0 00000000 e3000000 0 00100000>; 227 01000000 0 00000000 e3000000 0 00100000>;
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts
index 205ee3219ec6..2d41d549c213 100644
--- a/arch/powerpc/boot/dts/mpc8560ads.dts
+++ b/arch/powerpc/boot/dts/mpc8560ads.dts
@@ -52,7 +52,7 @@
52 compatible = "fsl,8540-memory-controller"; 52 compatible = "fsl,8540-memory-controller";
53 reg = <2000 1000>; 53 reg = <2000 1000>;
54 interrupt-parent = <&mpic>; 54 interrupt-parent = <&mpic>;
55 interrupts = <2 2>; 55 interrupts = <12 2>;
56 }; 56 };
57 57
58 l2-cache-controller@20000 { 58 l2-cache-controller@20000 {
@@ -61,7 +61,7 @@
61 cache-line-size = <20>; // 32 bytes 61 cache-line-size = <20>; // 32 bytes
62 cache-size = <40000>; // L2, 256K 62 cache-size = <40000>; // L2, 256K
63 interrupt-parent = <&mpic>; 63 interrupt-parent = <&mpic>;
64 interrupts = <0 2>; 64 interrupts = <10 2>;
65 }; 65 };
66 66
67 mdio@24520 { 67 mdio@24520 {
@@ -72,25 +72,25 @@
72 #size-cells = <0>; 72 #size-cells = <0>;
73 phy0: ethernet-phy@0 { 73 phy0: ethernet-phy@0 {
74 interrupt-parent = <&mpic>; 74 interrupt-parent = <&mpic>;
75 interrupts = <35 1>; 75 interrupts = <5 1>;
76 reg = <0>; 76 reg = <0>;
77 device_type = "ethernet-phy"; 77 device_type = "ethernet-phy";
78 }; 78 };
79 phy1: ethernet-phy@1 { 79 phy1: ethernet-phy@1 {
80 interrupt-parent = <&mpic>; 80 interrupt-parent = <&mpic>;
81 interrupts = <35 1>; 81 interrupts = <5 1>;
82 reg = <1>; 82 reg = <1>;
83 device_type = "ethernet-phy"; 83 device_type = "ethernet-phy";
84 }; 84 };
85 phy2: ethernet-phy@2 { 85 phy2: ethernet-phy@2 {
86 interrupt-parent = <&mpic>; 86 interrupt-parent = <&mpic>;
87 interrupts = <37 1>; 87 interrupts = <7 1>;
88 reg = <2>; 88 reg = <2>;
89 device_type = "ethernet-phy"; 89 device_type = "ethernet-phy";
90 }; 90 };
91 phy3: ethernet-phy@3 { 91 phy3: ethernet-phy@3 {
92 interrupt-parent = <&mpic>; 92 interrupt-parent = <&mpic>;
93 interrupts = <37 1>; 93 interrupts = <7 1>;
94 reg = <3>; 94 reg = <3>;
95 device_type = "ethernet-phy"; 95 device_type = "ethernet-phy";
96 }; 96 };
@@ -108,7 +108,7 @@
108 */ 108 */
109 address = [ 00 00 00 00 00 00 ]; 109 address = [ 00 00 00 00 00 00 ];
110 local-mac-address = [ 00 00 00 00 00 00 ]; 110 local-mac-address = [ 00 00 00 00 00 00 ];
111 interrupts = <d 2 e 2 12 2>; 111 interrupts = <1d 2 1e 2 22 2>;
112 interrupt-parent = <&mpic>; 112 interrupt-parent = <&mpic>;
113 phy-handle = <&phy0>; 113 phy-handle = <&phy0>;
114 }; 114 };
@@ -127,7 +127,7 @@
127 */ 127 */
128 address = [ 00 00 00 00 00 00 ]; 128 address = [ 00 00 00 00 00 00 ];
129 local-mac-address = [ 00 00 00 00 00 00 ]; 129 local-mac-address = [ 00 00 00 00 00 00 ];
130 interrupts = <13 2 14 2 18 2>; 130 interrupts = <23 2 24 2 28 2>;
131 interrupt-parent = <&mpic>; 131 interrupt-parent = <&mpic>;
132 phy-handle = <&phy1>; 132 phy-handle = <&phy1>;
133 }; 133 };
@@ -144,79 +144,79 @@
144 interrupt-map = < 144 interrupt-map = <
145 145
146 /* IDSEL 0x2 */ 146 /* IDSEL 0x2 */
147 1000 0 0 1 &mpic 31 1 147 1000 0 0 1 &mpic 1 1
148 1000 0 0 2 &mpic 32 1 148 1000 0 0 2 &mpic 2 1
149 1000 0 0 3 &mpic 33 1 149 1000 0 0 3 &mpic 3 1
150 1000 0 0 4 &mpic 34 1 150 1000 0 0 4 &mpic 4 1
151 151
152 /* IDSEL 0x3 */ 152 /* IDSEL 0x3 */
153 1800 0 0 1 &mpic 34 1 153 1800 0 0 1 &mpic 4 1
154 1800 0 0 2 &mpic 31 1 154 1800 0 0 2 &mpic 1 1
155 1800 0 0 3 &mpic 32 1 155 1800 0 0 3 &mpic 2 1
156 1800 0 0 4 &mpic 33 1 156 1800 0 0 4 &mpic 3 1
157 157
158 /* IDSEL 0x4 */ 158 /* IDSEL 0x4 */
159 2000 0 0 1 &mpic 33 1 159 2000 0 0 1 &mpic 3 1
160 2000 0 0 2 &mpic 34 1 160 2000 0 0 2 &mpic 4 1
161 2000 0 0 3 &mpic 31 1 161 2000 0 0 3 &mpic 1 1
162 2000 0 0 4 &mpic 32 1 162 2000 0 0 4 &mpic 2 1
163 163
164 /* IDSEL 0x5 */ 164 /* IDSEL 0x5 */
165 2800 0 0 1 &mpic 32 1 165 2800 0 0 1 &mpic 2 1
166 2800 0 0 2 &mpic 33 1 166 2800 0 0 2 &mpic 3 1
167 2800 0 0 3 &mpic 34 1 167 2800 0 0 3 &mpic 4 1
168 2800 0 0 4 &mpic 31 1 168 2800 0 0 4 &mpic 1 1
169 169
170 /* IDSEL 12 */ 170 /* IDSEL 12 */
171 6000 0 0 1 &mpic 31 1 171 6000 0 0 1 &mpic 1 1
172 6000 0 0 2 &mpic 32 1 172 6000 0 0 2 &mpic 2 1
173 6000 0 0 3 &mpic 33 1 173 6000 0 0 3 &mpic 3 1
174 6000 0 0 4 &mpic 34 1 174 6000 0 0 4 &mpic 4 1
175 175
176 /* IDSEL 13 */ 176 /* IDSEL 13 */
177 6800 0 0 1 &mpic 34 1 177 6800 0 0 1 &mpic 4 1
178 6800 0 0 2 &mpic 31 1 178 6800 0 0 2 &mpic 1 1
179 6800 0 0 3 &mpic 32 1 179 6800 0 0 3 &mpic 2 1
180 6800 0 0 4 &mpic 33 1 180 6800 0 0 4 &mpic 3 1
181 181
182 /* IDSEL 14*/ 182 /* IDSEL 14*/
183 7000 0 0 1 &mpic 33 1 183 7000 0 0 1 &mpic 3 1
184 7000 0 0 2 &mpic 34 1 184 7000 0 0 2 &mpic 4 1
185 7000 0 0 3 &mpic 31 1 185 7000 0 0 3 &mpic 1 1
186 7000 0 0 4 &mpic 32 1 186 7000 0 0 4 &mpic 2 1
187 187
188 /* IDSEL 15 */ 188 /* IDSEL 15 */
189 7800 0 0 1 &mpic 32 1 189 7800 0 0 1 &mpic 2 1
190 7800 0 0 2 &mpic 33 1 190 7800 0 0 2 &mpic 3 1
191 7800 0 0 3 &mpic 34 1 191 7800 0 0 3 &mpic 4 1
192 7800 0 0 4 &mpic 31 1 192 7800 0 0 4 &mpic 1 1
193 193
194 /* IDSEL 18 */ 194 /* IDSEL 18 */
195 9000 0 0 1 &mpic 31 1 195 9000 0 0 1 &mpic 1 1
196 9000 0 0 2 &mpic 32 1 196 9000 0 0 2 &mpic 2 1
197 9000 0 0 3 &mpic 33 1 197 9000 0 0 3 &mpic 3 1
198 9000 0 0 4 &mpic 34 1 198 9000 0 0 4 &mpic 4 1
199 199
200 /* IDSEL 19 */ 200 /* IDSEL 19 */
201 9800 0 0 1 &mpic 34 1 201 9800 0 0 1 &mpic 4 1
202 9800 0 0 2 &mpic 31 1 202 9800 0 0 2 &mpic 1 1
203 9800 0 0 3 &mpic 32 1 203 9800 0 0 3 &mpic 2 1
204 9800 0 0 4 &mpic 33 1 204 9800 0 0 4 &mpic 3 1
205 205
206 /* IDSEL 20 */ 206 /* IDSEL 20 */
207 a000 0 0 1 &mpic 33 1 207 a000 0 0 1 &mpic 3 1
208 a000 0 0 2 &mpic 34 1 208 a000 0 0 2 &mpic 4 1
209 a000 0 0 3 &mpic 31 1 209 a000 0 0 3 &mpic 1 1
210 a000 0 0 4 &mpic 32 1 210 a000 0 0 4 &mpic 2 1
211 211
212 /* IDSEL 21 */ 212 /* IDSEL 21 */
213 a800 0 0 1 &mpic 32 1 213 a800 0 0 1 &mpic 2 1
214 a800 0 0 2 &mpic 33 1 214 a800 0 0 2 &mpic 3 1
215 a800 0 0 3 &mpic 34 1 215 a800 0 0 3 &mpic 4 1
216 a800 0 0 4 &mpic 31 1>; 216 a800 0 0 4 &mpic 1 1>;
217 217
218 interrupt-parent = <&mpic>; 218 interrupt-parent = <&mpic>;
219 interrupts = <8 0>; 219 interrupts = <18 0>;
220 bus-range = <0 0>; 220 bus-range = <0 0>;
221 ranges = <02000000 0 80000000 80000000 0 20000000 221 ranges = <02000000 0 80000000 80000000 0 20000000
222 01000000 0 00000000 e2000000 0 01000000>; 222 01000000 0 00000000 e2000000 0 01000000>;
@@ -246,7 +246,7 @@
246 interrupt-controller; 246 interrupt-controller;
247 #address-cells = <0>; 247 #address-cells = <0>;
248 #interrupt-cells = <2>; 248 #interrupt-cells = <2>;
249 interrupts = <1e 0>; 249 interrupts = <2e 0>;
250 interrupt-parent = <&mpic>; 250 interrupt-parent = <&mpic>;
251 reg = <90c00 80>; 251 reg = <90c00 80>;
252 built-in; 252 built-in;
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
index 479a7a55ede2..6bb18f2807a8 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -61,7 +61,7 @@
61 compatible = "fsl,8568-memory-controller"; 61 compatible = "fsl,8568-memory-controller";
62 reg = <2000 1000>; 62 reg = <2000 1000>;
63 interrupt-parent = <&mpic>; 63 interrupt-parent = <&mpic>;
64 interrupts = <2 2>; 64 interrupts = <12 2>;
65 }; 65 };
66 66
67 l2-cache-controller@20000 { 67 l2-cache-controller@20000 {
@@ -70,14 +70,14 @@
70 cache-line-size = <20>; // 32 bytes 70 cache-line-size = <20>; // 32 bytes
71 cache-size = <80000>; // L2, 512K 71 cache-size = <80000>; // L2, 512K
72 interrupt-parent = <&mpic>; 72 interrupt-parent = <&mpic>;
73 interrupts = <0 2>; 73 interrupts = <10 2>;
74 }; 74 };
75 75
76 i2c@3000 { 76 i2c@3000 {
77 device_type = "i2c"; 77 device_type = "i2c";
78 compatible = "fsl-i2c"; 78 compatible = "fsl-i2c";
79 reg = <3000 100>; 79 reg = <3000 100>;
80 interrupts = <1b 2>; 80 interrupts = <2b 2>;
81 interrupt-parent = <&mpic>; 81 interrupt-parent = <&mpic>;
82 dfsrr; 82 dfsrr;
83 }; 83 };
@@ -86,7 +86,7 @@
86 device_type = "i2c"; 86 device_type = "i2c";
87 compatible = "fsl-i2c"; 87 compatible = "fsl-i2c";
88 reg = <3100 100>; 88 reg = <3100 100>;
89 interrupts = <1b 2>; 89 interrupts = <2b 2>;
90 interrupt-parent = <&mpic>; 90 interrupt-parent = <&mpic>;
91 dfsrr; 91 dfsrr;
92 }; 92 };
@@ -99,25 +99,25 @@
99 reg = <24520 20>; 99 reg = <24520 20>;
100 phy0: ethernet-phy@0 { 100 phy0: ethernet-phy@0 {
101 interrupt-parent = <&mpic>; 101 interrupt-parent = <&mpic>;
102 interrupts = <31 1>; 102 interrupts = <1 1>;
103 reg = <0>; 103 reg = <0>;
104 device_type = "ethernet-phy"; 104 device_type = "ethernet-phy";
105 }; 105 };
106 phy1: ethernet-phy@1 { 106 phy1: ethernet-phy@1 {
107 interrupt-parent = <&mpic>; 107 interrupt-parent = <&mpic>;
108 interrupts = <32 1>; 108 interrupts = <2 1>;
109 reg = <1>; 109 reg = <1>;
110 device_type = "ethernet-phy"; 110 device_type = "ethernet-phy";
111 }; 111 };
112 phy2: ethernet-phy@2 { 112 phy2: ethernet-phy@2 {
113 interrupt-parent = <&mpic>; 113 interrupt-parent = <&mpic>;
114 interrupts = <31 1>; 114 interrupts = <1 1>;
115 reg = <2>; 115 reg = <2>;
116 device_type = "ethernet-phy"; 116 device_type = "ethernet-phy";
117 }; 117 };
118 phy3: ethernet-phy@3 { 118 phy3: ethernet-phy@3 {
119 interrupt-parent = <&mpic>; 119 interrupt-parent = <&mpic>;
120 interrupts = <32 1>; 120 interrupts = <2 1>;
121 reg = <3>; 121 reg = <3>;
122 device_type = "ethernet-phy"; 122 device_type = "ethernet-phy";
123 }; 123 };
@@ -137,7 +137,7 @@
137 */ 137 */
138 mac-address = [ 00 00 00 00 00 00 ]; 138 mac-address = [ 00 00 00 00 00 00 ];
139 local-mac-address = [ 00 00 00 00 00 00 ]; 139 local-mac-address = [ 00 00 00 00 00 00 ];
140 interrupts = <d 2 e 2 12 2>; 140 interrupts = <1d 2 1e 2 22 2>;
141 interrupt-parent = <&mpic>; 141 interrupt-parent = <&mpic>;
142 phy-handle = <&phy2>; 142 phy-handle = <&phy2>;
143 }; 143 };
@@ -156,7 +156,7 @@
156 */ 156 */
157 mac-address = [ 00 00 00 00 00 00 ]; 157 mac-address = [ 00 00 00 00 00 00 ];
158 local-mac-address = [ 00 00 00 00 00 00 ]; 158 local-mac-address = [ 00 00 00 00 00 00 ];
159 interrupts = <13 2 14 2 18 2>; 159 interrupts = <23 2 24 2 28 2>;
160 interrupt-parent = <&mpic>; 160 interrupt-parent = <&mpic>;
161 phy-handle = <&phy3>; 161 phy-handle = <&phy3>;
162 }; 162 };
@@ -166,7 +166,7 @@
166 compatible = "ns16550"; 166 compatible = "ns16550";
167 reg = <4500 100>; 167 reg = <4500 100>;
168 clock-frequency = <0>; 168 clock-frequency = <0>;
169 interrupts = <1a 2>; 169 interrupts = <2a 2>;
170 interrupt-parent = <&mpic>; 170 interrupt-parent = <&mpic>;
171 }; 171 };
172 172
@@ -175,7 +175,7 @@
175 compatible = "ns16550"; 175 compatible = "ns16550";
176 reg = <4600 100>; 176 reg = <4600 100>;
177 clock-frequency = <0>; 177 clock-frequency = <0>;
178 interrupts = <1a 2>; 178 interrupts = <2a 2>;
179 interrupt-parent = <&mpic>; 179 interrupt-parent = <&mpic>;
180 }; 180 };
181 181
@@ -184,7 +184,7 @@
184 model = "SEC2"; 184 model = "SEC2";
185 compatible = "talitos"; 185 compatible = "talitos";
186 reg = <30000 f000>; 186 reg = <30000 f000>;
187 interrupts = <1d 2>; 187 interrupts = <2d 2>;
188 interrupt-parent = <&mpic>; 188 interrupt-parent = <&mpic>;
189 num-channels = <4>; 189 num-channels = <4>;
190 channel-fifo-len = <18>; 190 channel-fifo-len = <18>;
@@ -359,25 +359,25 @@
359 * gianfar's MDIO bus */ 359 * gianfar's MDIO bus */
360 qe_phy0: ethernet-phy@00 { 360 qe_phy0: ethernet-phy@00 {
361 interrupt-parent = <&mpic>; 361 interrupt-parent = <&mpic>;
362 interrupts = <31 1>; 362 interrupts = <1 1>;
363 reg = <0>; 363 reg = <0>;
364 device_type = "ethernet-phy"; 364 device_type = "ethernet-phy";
365 }; 365 };
366 qe_phy1: ethernet-phy@01 { 366 qe_phy1: ethernet-phy@01 {
367 interrupt-parent = <&mpic>; 367 interrupt-parent = <&mpic>;
368 interrupts = <32 1>; 368 interrupts = <2 1>;
369 reg = <1>; 369 reg = <1>;
370 device_type = "ethernet-phy"; 370 device_type = "ethernet-phy";
371 }; 371 };
372 qe_phy2: ethernet-phy@02 { 372 qe_phy2: ethernet-phy@02 {
373 interrupt-parent = <&mpic>; 373 interrupt-parent = <&mpic>;
374 interrupts = <31 1>; 374 interrupts = <1 1>;
375 reg = <2>; 375 reg = <2>;
376 device_type = "ethernet-phy"; 376 device_type = "ethernet-phy";
377 }; 377 };
378 qe_phy3: ethernet-phy@03 { 378 qe_phy3: ethernet-phy@03 {
379 interrupt-parent = <&mpic>; 379 interrupt-parent = <&mpic>;
380 interrupts = <32 1>; 380 interrupts = <2 1>;
381 reg = <3>; 381 reg = <3>;
382 device_type = "ethernet-phy"; 382 device_type = "ethernet-phy";
383 }; 383 };
@@ -391,7 +391,7 @@
391 reg = <80 80>; 391 reg = <80 80>;
392 built-in; 392 built-in;
393 big-endian; 393 big-endian;
394 interrupts = <1e 2 1e 2>; //high:30 low:30 394 interrupts = <2e 2 2e 2>; //high:30 low:30
395 interrupt-parent = <&mpic>; 395 interrupt-parent = <&mpic>;
396 }; 396 };
397 397
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
index 4b8ac7231ac9..db56a02b748f 100644
--- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts
+++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
@@ -90,25 +90,25 @@
90 reg = <24520 20>; 90 reg = <24520 20>;
91 phy0: ethernet-phy@0 { 91 phy0: ethernet-phy@0 {
92 interrupt-parent = <&mpic>; 92 interrupt-parent = <&mpic>;
93 interrupts = <4a 1>; 93 interrupts = <a 1>;
94 reg = <0>; 94 reg = <0>;
95 device_type = "ethernet-phy"; 95 device_type = "ethernet-phy";
96 }; 96 };
97 phy1: ethernet-phy@1 { 97 phy1: ethernet-phy@1 {
98 interrupt-parent = <&mpic>; 98 interrupt-parent = <&mpic>;
99 interrupts = <4a 1>; 99 interrupts = <a 1>;
100 reg = <1>; 100 reg = <1>;
101 device_type = "ethernet-phy"; 101 device_type = "ethernet-phy";
102 }; 102 };
103 phy2: ethernet-phy@2 { 103 phy2: ethernet-phy@2 {
104 interrupt-parent = <&mpic>; 104 interrupt-parent = <&mpic>;
105 interrupts = <4a 1>; 105 interrupts = <a 1>;
106 reg = <2>; 106 reg = <2>;
107 device_type = "ethernet-phy"; 107 device_type = "ethernet-phy";
108 }; 108 };
109 phy3: ethernet-phy@3 { 109 phy3: ethernet-phy@3 {
110 interrupt-parent = <&mpic>; 110 interrupt-parent = <&mpic>;
111 interrupts = <4a 1>; 111 interrupts = <a 1>;
112 reg = <3>; 112 reg = <3>;
113 device_type = "ethernet-phy"; 113 device_type = "ethernet-phy";
114 }; 114 };
@@ -356,7 +356,7 @@
356 #interrupt-cells = <2>; 356 #interrupt-cells = <2>;
357 built-in; 357 built-in;
358 compatible = "chrp,iic"; 358 compatible = "chrp,iic";
359 interrupts = <49 2>; 359 interrupts = <9 2>;
360 interrupt-parent = 360 interrupt-parent =
361 <&mpic>; 361 <&mpic>;
362 }; 362 };
@@ -411,10 +411,10 @@
411 interrupt-map-mask = <f800 0 0 7>; 411 interrupt-map-mask = <f800 0 0 7>;
412 interrupt-map = < 412 interrupt-map = <
413 /* IDSEL 0x0 */ 413 /* IDSEL 0x0 */
414 0000 0 0 1 &mpic 44 1 414 0000 0 0 1 &mpic 4 1
415 0000 0 0 2 &mpic 45 1 415 0000 0 0 2 &mpic 5 1
416 0000 0 0 3 &mpic 46 1 416 0000 0 0 3 &mpic 6 1
417 0000 0 0 4 &mpic 47 1 417 0000 0 0 4 &mpic 7 1
418 >; 418 >;
419 }; 419 };
420 420
diff --git a/arch/powerpc/platforms/85xx/mpc8544_ds.c b/arch/powerpc/platforms/85xx/mpc8544_ds.c
index bec84ffe708e..6fb90aab879f 100644
--- a/arch/powerpc/platforms/85xx/mpc8544_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc8544_ds.c
@@ -61,24 +61,11 @@ void __init mpc8544_ds_pic_init(void)
61 return; 61 return;
62 } 62 }
63 63
64 /* Alloc mpic structure and per isu has 16 INT entries. */
65 mpic = mpic_alloc(np, r.start, 64 mpic = mpic_alloc(np, r.start,
66 MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, 65 MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
67 16, 64, " OPENPIC "); 66 0, 256, " OpenPIC ");
68 BUG_ON(mpic == NULL); 67 BUG_ON(mpic == NULL);
69 68
70 /*
71 * 48 Internal Interrupts
72 */
73 mpic_assign_isu(mpic, 0, r.start + 0x10200);
74 mpic_assign_isu(mpic, 1, r.start + 0x10400);
75 mpic_assign_isu(mpic, 2, r.start + 0x10600);
76
77 /*
78 * 16 External interrupts
79 */
80 mpic_assign_isu(mpic, 3, r.start + 0x10000);
81
82 mpic_init(mpic); 69 mpic_init(mpic);
83 70
84#ifdef CONFIG_PPC_I8259 71#ifdef CONFIG_PPC_I8259
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
index 1262d1b8a442..7235f702394c 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
@@ -87,30 +87,10 @@ static void __init mpc85xx_ads_pic_init(void)
87 87
88 mpic = mpic_alloc(np, r.start, 88 mpic = mpic_alloc(np, r.start,
89 MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, 89 MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
90 4, 0, " OpenPIC "); 90 0, 256, " OpenPIC ");
91 BUG_ON(mpic == NULL); 91 BUG_ON(mpic == NULL);
92 of_node_put(np); 92 of_node_put(np);
93 93
94 mpic_assign_isu(mpic, 0, r.start + 0x10200);
95 mpic_assign_isu(mpic, 1, r.start + 0x10280);
96 mpic_assign_isu(mpic, 2, r.start + 0x10300);
97 mpic_assign_isu(mpic, 3, r.start + 0x10380);
98 mpic_assign_isu(mpic, 4, r.start + 0x10400);
99 mpic_assign_isu(mpic, 5, r.start + 0x10480);
100 mpic_assign_isu(mpic, 6, r.start + 0x10500);
101 mpic_assign_isu(mpic, 7, r.start + 0x10580);
102
103 /* Unused on this platform (leave room for 8548) */
104 mpic_assign_isu(mpic, 8, r.start + 0x10600);
105 mpic_assign_isu(mpic, 9, r.start + 0x10680);
106 mpic_assign_isu(mpic, 10, r.start + 0x10700);
107 mpic_assign_isu(mpic, 11, r.start + 0x10780);
108
109 /* External Interrupts */
110 mpic_assign_isu(mpic, 12, r.start + 0x10000);
111 mpic_assign_isu(mpic, 13, r.start + 0x10080);
112 mpic_assign_isu(mpic, 14, r.start + 0x10100);
113
114 mpic_init(mpic); 94 mpic_init(mpic);
115 95
116#ifdef CONFIG_CPM2 96#ifdef CONFIG_CPM2
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
index 04a1eaa81bbe..2a80c1d0afbc 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
@@ -156,33 +156,12 @@ static void __init mpc85xx_cds_pic_init(void)
156 156
157 mpic = mpic_alloc(np, r.start, 157 mpic = mpic_alloc(np, r.start,
158 MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, 158 MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
159 4, 0, " OpenPIC "); 159 0, 256, " OpenPIC ");
160 BUG_ON(mpic == NULL); 160 BUG_ON(mpic == NULL);
161 161
162 /* Return the mpic node */ 162 /* Return the mpic node */
163 of_node_put(np); 163 of_node_put(np);
164 164
165 mpic_assign_isu(mpic, 0, r.start + 0x10200);
166 mpic_assign_isu(mpic, 1, r.start + 0x10280);
167 mpic_assign_isu(mpic, 2, r.start + 0x10300);
168 mpic_assign_isu(mpic, 3, r.start + 0x10380);
169 mpic_assign_isu(mpic, 4, r.start + 0x10400);
170 mpic_assign_isu(mpic, 5, r.start + 0x10480);
171 mpic_assign_isu(mpic, 6, r.start + 0x10500);
172 mpic_assign_isu(mpic, 7, r.start + 0x10580);
173
174 /* Used only for 8548 so far, but no harm in
175 * allocating them for everyone */
176 mpic_assign_isu(mpic, 8, r.start + 0x10600);
177 mpic_assign_isu(mpic, 9, r.start + 0x10680);
178 mpic_assign_isu(mpic, 10, r.start + 0x10700);
179 mpic_assign_isu(mpic, 11, r.start + 0x10780);
180
181 /* External Interrupts */
182 mpic_assign_isu(mpic, 12, r.start + 0x10000);
183 mpic_assign_isu(mpic, 13, r.start + 0x10080);
184 mpic_assign_isu(mpic, 14, r.start + 0x10100);
185
186 mpic_init(mpic); 165 mpic_init(mpic);
187 166
188#ifdef CONFIG_PPC_I8259 167#ifdef CONFIG_PPC_I8259
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index f55ef5b94f73..004b80bd0b84 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -176,29 +176,10 @@ static void __init mpc85xx_mds_pic_init(void)
176 176
177 mpic = mpic_alloc(np, r.start, 177 mpic = mpic_alloc(np, r.start,
178 MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, 178 MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
179 4, 0, " OpenPIC "); 179 0, 256, " OpenPIC ");
180 BUG_ON(mpic == NULL); 180 BUG_ON(mpic == NULL);
181 of_node_put(np); 181 of_node_put(np);
182 182
183 /* Internal Interrupts */
184 mpic_assign_isu(mpic, 0, r.start + 0x10200);
185 mpic_assign_isu(mpic, 1, r.start + 0x10280);
186 mpic_assign_isu(mpic, 2, r.start + 0x10300);
187 mpic_assign_isu(mpic, 3, r.start + 0x10380);
188 mpic_assign_isu(mpic, 4, r.start + 0x10400);
189 mpic_assign_isu(mpic, 5, r.start + 0x10480);
190 mpic_assign_isu(mpic, 6, r.start + 0x10500);
191 mpic_assign_isu(mpic, 7, r.start + 0x10580);
192 mpic_assign_isu(mpic, 8, r.start + 0x10600);
193 mpic_assign_isu(mpic, 9, r.start + 0x10680);
194 mpic_assign_isu(mpic, 10, r.start + 0x10700);
195 mpic_assign_isu(mpic, 11, r.start + 0x10780);
196
197 /* External Interrupts */
198 mpic_assign_isu(mpic, 12, r.start + 0x10000);
199 mpic_assign_isu(mpic, 13, r.start + 0x10080);
200 mpic_assign_isu(mpic, 14, r.start + 0x10100);
201
202 mpic_init(mpic); 183 mpic_init(mpic);
203 184
204#ifdef CONFIG_QUICC_ENGINE 185#ifdef CONFIG_QUICC_ENGINE
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index 62b8a14213e7..5b01ec7c13dc 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -74,22 +74,9 @@ mpc86xx_hpcn_init_irq(void)
74 /* Alloc mpic structure and per isu has 16 INT entries. */ 74 /* Alloc mpic structure and per isu has 16 INT entries. */
75 mpic1 = mpic_alloc(np, res.start, 75 mpic1 = mpic_alloc(np, res.start,
76 MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, 76 MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
77 16, NR_IRQS - 4, 77 0, 256, " MPIC ");
78 " MPIC ");
79 BUG_ON(mpic1 == NULL); 78 BUG_ON(mpic1 == NULL);
80 79
81 mpic_assign_isu(mpic1, 0, res.start + 0x10000);
82
83 /* 48 Internal Interrupts */
84 mpic_assign_isu(mpic1, 1, res.start + 0x10200);
85 mpic_assign_isu(mpic1, 2, res.start + 0x10400);
86 mpic_assign_isu(mpic1, 3, res.start + 0x10600);
87
88 /* 16 External interrupts
89 * Moving them from [0 - 15] to [64 - 79]
90 */
91 mpic_assign_isu(mpic1, 4, res.start + 0x10000);
92
93 mpic_init(mpic1); 80 mpic_init(mpic1);
94 81
95#ifdef CONFIG_PCI 82#ifdef CONFIG_PCI
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-21 10:13:11 -0400