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authorRussell King <rmk+kernel@arm.linux.org.uk>2014-04-13 13:57:29 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2014-06-02 04:20:11 -0400
commitb4b20ad881f5a5c19ae9199547ddbb00fa4825eb (patch)
treee493f9f397590561e452a7eee1aa83e2fa8c0d28
parent4585eaff634b1bbb09686895221b3645f53f7a60 (diff)
ARM: provide common method to clear bits in CPU control register
Several places open-code this manipulation, let's consolidate this. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/mm/alignment.c5
-rw-r--r--arch/arm/mm/init.c10
-rw-r--r--arch/arm/mm/mm.h4
-rw-r--r--arch/arm/mm/mmu.c10
4 files changed, 20 insertions, 9 deletions
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index 1ab611ce5009..53e268fcae45 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -28,6 +28,7 @@
28#include <asm/opcodes.h> 28#include <asm/opcodes.h>
29 29
30#include "fault.h" 30#include "fault.h"
31#include "mm.h"
31 32
32/* 33/*
33 * 32-bit misaligned trap handler (c) 1998 San Mehat (CCC) -July 1998 34 * 32-bit misaligned trap handler (c) 1998 San Mehat (CCC) -July 1998
@@ -968,9 +969,7 @@ static int __init alignment_init(void)
968 969
969#ifdef CONFIG_CPU_CP15 970#ifdef CONFIG_CPU_CP15
970 if (cpu_is_v6_unaligned()) { 971 if (cpu_is_v6_unaligned()) {
971 cr_alignment &= ~CR_A; 972 set_cr(__clear_cr(CR_A));
972 cr_no_alignment &= ~CR_A;
973 set_cr(cr_alignment);
974 ai_usermode = safe_usermode(ai_usermode, false); 973 ai_usermode = safe_usermode(ai_usermode, false);
975 } 974 }
976#endif 975#endif
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 2a77ba8796ae..94332b1ad4bc 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -23,6 +23,7 @@
23#include <linux/dma-contiguous.h> 23#include <linux/dma-contiguous.h>
24#include <linux/sizes.h> 24#include <linux/sizes.h>
25 25
26#include <asm/cp15.h>
26#include <asm/mach-types.h> 27#include <asm/mach-types.h>
27#include <asm/memblock.h> 28#include <asm/memblock.h>
28#include <asm/prom.h> 29#include <asm/prom.h>
@@ -36,6 +37,15 @@
36 37
37#include "mm.h" 38#include "mm.h"
38 39
40#ifdef CONFIG_CPU_CP15_MMU
41unsigned long __init __clear_cr(unsigned long mask)
42{
43 cr_no_alignment = cr_no_alignment & ~mask;
44 cr_alignment = cr_alignment & ~mask;
45 return cr_alignment;
46}
47#endif
48
39static phys_addr_t phys_initrd_start __initdata = 0; 49static phys_addr_t phys_initrd_start __initdata = 0;
40static unsigned long phys_initrd_size __initdata = 0; 50static unsigned long phys_initrd_size __initdata = 0;
41 51
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h
index 7ea641b7aa7d..ce727d47275c 100644
--- a/arch/arm/mm/mm.h
+++ b/arch/arm/mm/mm.h
@@ -2,6 +2,8 @@
2#include <linux/list.h> 2#include <linux/list.h>
3#include <linux/vmalloc.h> 3#include <linux/vmalloc.h>
4 4
5#include <asm/pgtable.h>
6
5/* the upper-most page table pointer */ 7/* the upper-most page table pointer */
6extern pmd_t *top_pmd; 8extern pmd_t *top_pmd;
7 9
@@ -93,3 +95,5 @@ extern phys_addr_t arm_lowmem_limit;
93void __init bootmem_init(void); 95void __init bootmem_init(void);
94void arm_mm_memblock_reserve(void); 96void arm_mm_memblock_reserve(void);
95void dma_contiguous_remap(void); 97void dma_contiguous_remap(void);
98
99unsigned long __clear_cr(unsigned long mask);
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index b68c6b22e1c8..d97cb2d8953a 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -125,6 +125,7 @@ static struct cachepolicy cache_policies[] __initdata = {
125 */ 125 */
126static int __init early_cachepolicy(char *p) 126static int __init early_cachepolicy(char *p)
127{ 127{
128 unsigned long cr = get_cr();
128 int i; 129 int i;
129 130
130 for (i = 0; i < ARRAY_SIZE(cache_policies); i++) { 131 for (i = 0; i < ARRAY_SIZE(cache_policies); i++) {
@@ -132,8 +133,7 @@ static int __init early_cachepolicy(char *p)
132 133
133 if (memcmp(p, cache_policies[i].policy, len) == 0) { 134 if (memcmp(p, cache_policies[i].policy, len) == 0) {
134 cachepolicy = i; 135 cachepolicy = i;
135 cr_alignment &= ~cache_policies[i].cr_mask; 136 cr = __clear_cr(cache_policies[i].cr_mask);
136 cr_no_alignment &= ~cache_policies[i].cr_mask;
137 break; 137 break;
138 } 138 }
139 } 139 }
@@ -151,7 +151,7 @@ static int __init early_cachepolicy(char *p)
151 cachepolicy = CPOLICY_WRITEBACK; 151 cachepolicy = CPOLICY_WRITEBACK;
152 } 152 }
153 flush_cache_all(); 153 flush_cache_all();
154 set_cr(cr_alignment); 154 set_cr(cr);
155 return 0; 155 return 0;
156} 156}
157early_param("cachepolicy", early_cachepolicy); 157early_param("cachepolicy", early_cachepolicy);
@@ -188,9 +188,7 @@ early_param("ecc", early_ecc);
188 188
189static int __init noalign_setup(char *__unused) 189static int __init noalign_setup(char *__unused)
190{ 190{
191 cr_alignment &= ~CR_A; 191 set_cr(__clear_cr(CR_A));
192 cr_no_alignment &= ~CR_A;
193 set_cr(cr_alignment);
194 return 1; 192 return 1;
195} 193}
196__setup("noalign", noalign_setup); 194__setup("noalign", noalign_setup);