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authorDavid S. Miller <davem@davemloft.net>2014-11-21 16:37:14 -0500
committerDavid S. Miller <davem@davemloft.net>2014-11-21 16:37:14 -0500
commitb48c5ec53ef9f0fe617aafa94a752f528fdad149 (patch)
tree2658bdb4bef662c7febf304de65b6bd15a05dd32
parent37dd9255b2f6201195946014600a8d857f846cf4 (diff)
parent4d0438e56a8f9a1a18ba31bd53b9dc67af224980 (diff)
Merge branch 'defxx-next'
Maciej W. Rozycki says: ==================== defxx: Assorted fixes, mainly for EISA This is another small series fixing issues with the defxx driver, mainly for EISA boards, but there's one patch for PCI as well. In the end, with the inexistent second IDE channel forcefully disabled in the IDE driver, I wasn't able to retrigger spurious IRQ 15 interrupts I previously saw and suspected the DEFEA to be the cause. So it looks to me these were real noise on IRQ 15 rather than the latency in interrupt acknowledge in the DEFEA board causing the slave 8259A to issue the spurious interrupt vector. In any case not an issue with the defxx driver, so nothing to do here unless the problem resurfaces. I haven't seen your announcement about opening net-next since the closure on Oct 6th, but from the patch traffic and the policy described in Documentation/networking/netdev-FAQ.txt I gather your tree is open. And these are bug fixes anyway, not new features, so please apply. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/fddi/defxx.c187
-rw-r--r--drivers/net/fddi/defxx.h4
2 files changed, 129 insertions, 62 deletions
diff --git a/drivers/net/fddi/defxx.c b/drivers/net/fddi/defxx.c
index caed6eee289c..7f975a2c8990 100644
--- a/drivers/net/fddi/defxx.c
+++ b/drivers/net/fddi/defxx.c
@@ -414,7 +414,7 @@ static void dfx_port_read_long(DFX_board_t *bp, int offset, u32 *data)
414 * ================ 414 * ================
415 * 415 *
416 * Overview: 416 * Overview:
417 * Retrieves the address range used to access control and status 417 * Retrieves the address ranges used to access control and status
418 * registers. 418 * registers.
419 * 419 *
420 * Returns: 420 * Returns:
@@ -422,8 +422,8 @@ static void dfx_port_read_long(DFX_board_t *bp, int offset, u32 *data)
422 * 422 *
423 * Arguments: 423 * Arguments:
424 * bdev - pointer to device information 424 * bdev - pointer to device information
425 * bar_start - pointer to store the start address 425 * bar_start - pointer to store the start addresses
426 * bar_len - pointer to store the length of the area 426 * bar_len - pointer to store the lengths of the areas
427 * 427 *
428 * Assumptions: 428 * Assumptions:
429 * I am sure there are some. 429 * I am sure there are some.
@@ -442,38 +442,47 @@ static void dfx_get_bars(struct device *bdev,
442 if (dfx_bus_pci) { 442 if (dfx_bus_pci) {
443 int num = dfx_use_mmio ? 0 : 1; 443 int num = dfx_use_mmio ? 0 : 1;
444 444
445 *bar_start = pci_resource_start(to_pci_dev(bdev), num); 445 bar_start[0] = pci_resource_start(to_pci_dev(bdev), num);
446 *bar_len = pci_resource_len(to_pci_dev(bdev), num); 446 bar_len[0] = pci_resource_len(to_pci_dev(bdev), num);
447 bar_start[2] = bar_start[1] = 0;
448 bar_len[2] = bar_len[1] = 0;
447 } 449 }
448 if (dfx_bus_eisa) { 450 if (dfx_bus_eisa) {
449 unsigned long base_addr = to_eisa_device(bdev)->base_addr; 451 unsigned long base_addr = to_eisa_device(bdev)->base_addr;
450 resource_size_t bar; 452 resource_size_t bar_lo;
453 resource_size_t bar_hi;
451 454
452 if (dfx_use_mmio) { 455 if (dfx_use_mmio) {
453 bar = inb(base_addr + PI_ESIC_K_MEM_ADD_CMP_2); 456 bar_lo = inb(base_addr + PI_ESIC_K_MEM_ADD_LO_CMP_2);
454 bar <<= 8; 457 bar_lo <<= 8;
455 bar |= inb(base_addr + PI_ESIC_K_MEM_ADD_CMP_1); 458 bar_lo |= inb(base_addr + PI_ESIC_K_MEM_ADD_LO_CMP_1);
456 bar <<= 8; 459 bar_lo <<= 8;
457 bar |= inb(base_addr + PI_ESIC_K_MEM_ADD_CMP_0); 460 bar_lo |= inb(base_addr + PI_ESIC_K_MEM_ADD_LO_CMP_0);
458 bar <<= 16; 461 bar_lo <<= 8;
459 *bar_start = bar; 462 bar_start[0] = bar_lo;
460 bar = inb(base_addr + PI_ESIC_K_MEM_ADD_MASK_2); 463 bar_hi = inb(base_addr + PI_ESIC_K_MEM_ADD_HI_CMP_2);
461 bar <<= 8; 464 bar_hi <<= 8;
462 bar |= inb(base_addr + PI_ESIC_K_MEM_ADD_MASK_1); 465 bar_hi |= inb(base_addr + PI_ESIC_K_MEM_ADD_HI_CMP_1);
463 bar <<= 8; 466 bar_hi <<= 8;
464 bar |= inb(base_addr + PI_ESIC_K_MEM_ADD_MASK_0); 467 bar_hi |= inb(base_addr + PI_ESIC_K_MEM_ADD_HI_CMP_0);
465 bar <<= 16; 468 bar_hi <<= 8;
466 *bar_len = (bar | PI_MEM_ADD_MASK_M) + 1; 469 bar_len[0] = ((bar_hi - bar_lo) | PI_MEM_ADD_MASK_M) +
470 1;
467 } else { 471 } else {
468 *bar_start = base_addr; 472 bar_start[0] = base_addr;
469 *bar_len = PI_ESIC_K_CSR_IO_LEN + 473 bar_len[0] = PI_ESIC_K_CSR_IO_LEN;
470 PI_ESIC_K_BURST_HOLDOFF_LEN;
471 } 474 }
475 bar_start[1] = base_addr + PI_DEFEA_K_BURST_HOLDOFF;
476 bar_len[1] = PI_ESIC_K_BURST_HOLDOFF_LEN;
477 bar_start[2] = base_addr + PI_ESIC_K_ESIC_CSR;
478 bar_len[2] = PI_ESIC_K_ESIC_CSR_LEN;
472 } 479 }
473 if (dfx_bus_tc) { 480 if (dfx_bus_tc) {
474 *bar_start = to_tc_dev(bdev)->resource.start + 481 bar_start[0] = to_tc_dev(bdev)->resource.start +
475 PI_TC_K_CSR_OFFSET; 482 PI_TC_K_CSR_OFFSET;
476 *bar_len = PI_TC_K_CSR_LEN; 483 bar_len[0] = PI_TC_K_CSR_LEN;
484 bar_start[2] = bar_start[1] = 0;
485 bar_len[2] = bar_len[1] = 0;
477 } 486 }
478} 487}
479 488
@@ -518,13 +527,14 @@ static int dfx_register(struct device *bdev)
518{ 527{
519 static int version_disp; 528 static int version_disp;
520 int dfx_bus_pci = dev_is_pci(bdev); 529 int dfx_bus_pci = dev_is_pci(bdev);
530 int dfx_bus_eisa = DFX_BUS_EISA(bdev);
521 int dfx_bus_tc = DFX_BUS_TC(bdev); 531 int dfx_bus_tc = DFX_BUS_TC(bdev);
522 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc; 532 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
523 const char *print_name = dev_name(bdev); 533 const char *print_name = dev_name(bdev);
524 struct net_device *dev; 534 struct net_device *dev;
525 DFX_board_t *bp; /* board pointer */ 535 DFX_board_t *bp; /* board pointer */
526 resource_size_t bar_start = 0; /* pointer to port */ 536 resource_size_t bar_start[3]; /* pointers to ports */
527 resource_size_t bar_len = 0; /* resource length */ 537 resource_size_t bar_len[3]; /* resource length */
528 int alloc_size; /* total buffer size used */ 538 int alloc_size; /* total buffer size used */
529 struct resource *region; 539 struct resource *region;
530 int err = 0; 540 int err = 0;
@@ -542,10 +552,13 @@ static int dfx_register(struct device *bdev)
542 } 552 }
543 553
544 /* Enable PCI device. */ 554 /* Enable PCI device. */
545 if (dfx_bus_pci && pci_enable_device(to_pci_dev(bdev))) { 555 if (dfx_bus_pci) {
546 printk(KERN_ERR "%s: Cannot enable PCI device, aborting\n", 556 err = pci_enable_device(to_pci_dev(bdev));
547 print_name); 557 if (err) {
548 goto err_out; 558 pr_err("%s: Cannot enable PCI device, aborting\n",
559 print_name);
560 goto err_out;
561 }
549 } 562 }
550 563
551 SET_NETDEV_DEV(dev, bdev); 564 SET_NETDEV_DEV(dev, bdev);
@@ -554,31 +567,62 @@ static int dfx_register(struct device *bdev)
554 bp->bus_dev = bdev; 567 bp->bus_dev = bdev;
555 dev_set_drvdata(bdev, dev); 568 dev_set_drvdata(bdev, dev);
556 569
557 dfx_get_bars(bdev, &bar_start, &bar_len); 570 dfx_get_bars(bdev, bar_start, bar_len);
571 if (dfx_bus_eisa && dfx_use_mmio && bar_start[0] == 0) {
572 pr_err("%s: Cannot use MMIO, no address set, aborting\n",
573 print_name);
574 pr_err("%s: Run ECU and set adapter's MMIO location\n",
575 print_name);
576 pr_err("%s: Or recompile driver with \"CONFIG_DEFXX_MMIO=n\""
577 "\n", print_name);
578 err = -ENXIO;
579 goto err_out;
580 }
558 581
559 if (dfx_use_mmio) 582 if (dfx_use_mmio)
560 region = request_mem_region(bar_start, bar_len, print_name); 583 region = request_mem_region(bar_start[0], bar_len[0],
584 print_name);
561 else 585 else
562 region = request_region(bar_start, bar_len, print_name); 586 region = request_region(bar_start[0], bar_len[0], print_name);
563 if (!region) { 587 if (!region) {
564 printk(KERN_ERR "%s: Cannot reserve I/O resource " 588 pr_err("%s: Cannot reserve %s resource 0x%lx @ 0x%lx, "
565 "0x%lx @ 0x%lx, aborting\n", 589 "aborting\n", dfx_use_mmio ? "MMIO" : "I/O", print_name,
566 print_name, (long)bar_len, (long)bar_start); 590 (long)bar_len[0], (long)bar_start[0]);
567 err = -EBUSY; 591 err = -EBUSY;
568 goto err_out_disable; 592 goto err_out_disable;
569 } 593 }
594 if (bar_start[1] != 0) {
595 region = request_region(bar_start[1], bar_len[1], print_name);
596 if (!region) {
597 pr_err("%s: Cannot reserve I/O resource "
598 "0x%lx @ 0x%lx, aborting\n", print_name,
599 (long)bar_len[1], (long)bar_start[1]);
600 err = -EBUSY;
601 goto err_out_csr_region;
602 }
603 }
604 if (bar_start[2] != 0) {
605 region = request_region(bar_start[2], bar_len[2], print_name);
606 if (!region) {
607 pr_err("%s: Cannot reserve I/O resource "
608 "0x%lx @ 0x%lx, aborting\n", print_name,
609 (long)bar_len[2], (long)bar_start[2]);
610 err = -EBUSY;
611 goto err_out_bh_region;
612 }
613 }
570 614
571 /* Set up I/O base address. */ 615 /* Set up I/O base address. */
572 if (dfx_use_mmio) { 616 if (dfx_use_mmio) {
573 bp->base.mem = ioremap_nocache(bar_start, bar_len); 617 bp->base.mem = ioremap_nocache(bar_start[0], bar_len[0]);
574 if (!bp->base.mem) { 618 if (!bp->base.mem) {
575 printk(KERN_ERR "%s: Cannot map MMIO\n", print_name); 619 printk(KERN_ERR "%s: Cannot map MMIO\n", print_name);
576 err = -ENOMEM; 620 err = -ENOMEM;
577 goto err_out_region; 621 goto err_out_esic_region;
578 } 622 }
579 } else { 623 } else {
580 bp->base.port = bar_start; 624 bp->base.port = bar_start[0];
581 dev->base_addr = bar_start; 625 dev->base_addr = bar_start[0];
582 } 626 }
583 627
584 /* Initialize new device structure */ 628 /* Initialize new device structure */
@@ -587,7 +631,7 @@ static int dfx_register(struct device *bdev)
587 if (dfx_bus_pci) 631 if (dfx_bus_pci)
588 pci_set_master(to_pci_dev(bdev)); 632 pci_set_master(to_pci_dev(bdev));
589 633
590 if (dfx_driver_init(dev, print_name, bar_start) != DFX_K_SUCCESS) { 634 if (dfx_driver_init(dev, print_name, bar_start[0]) != DFX_K_SUCCESS) {
591 err = -ENODEV; 635 err = -ENODEV;
592 goto err_out_unmap; 636 goto err_out_unmap;
593 } 637 }
@@ -615,11 +659,19 @@ err_out_unmap:
615 if (dfx_use_mmio) 659 if (dfx_use_mmio)
616 iounmap(bp->base.mem); 660 iounmap(bp->base.mem);
617 661
618err_out_region: 662err_out_esic_region:
663 if (bar_start[2] != 0)
664 release_region(bar_start[2], bar_len[2]);
665
666err_out_bh_region:
667 if (bar_start[1] != 0)
668 release_region(bar_start[1], bar_len[1]);
669
670err_out_csr_region:
619 if (dfx_use_mmio) 671 if (dfx_use_mmio)
620 release_mem_region(bar_start, bar_len); 672 release_mem_region(bar_start[0], bar_len[0]);
621 else 673 else
622 release_region(bar_start, bar_len); 674 release_region(bar_start[0], bar_len[0]);
623 675
624err_out_disable: 676err_out_disable:
625 if (dfx_bus_pci) 677 if (dfx_bus_pci)
@@ -711,13 +763,14 @@ static void dfx_bus_init(struct net_device *dev)
711 } 763 }
712 764
713 /* 765 /*
714 * Enable memory decoding (MEMCS0) and/or port decoding 766 * Enable memory decoding (MEMCS1) and/or port decoding
715 * (IOCS1/IOCS0) as appropriate in Function Control 767 * (IOCS1/IOCS0) as appropriate in Function Control
716 * Register. IOCS0 is used for PDQ registers, taking 16 768 * Register. MEMCS1 or IOCS0 is used for PDQ registers,
717 * 32-bit words, while IOCS1 is used for the Burst Holdoff 769 * taking 16 32-bit words, while IOCS1 is used for the
718 * register, taking a single 32-bit word only. We use the 770 * Burst Holdoff register, taking a single 32-bit word
719 * slot-specific I/O range as per the ESIC spec, that is 771 * only. We use the slot-specific I/O range as per the
720 * set bits 15:12 in the mask registers to mask them out. 772 * ESIC spec, that is set bits 15:12 in the mask registers
773 * to mask them out.
721 */ 774 */
722 775
723 /* Set the decode range of the board. */ 776 /* Set the decode range of the board. */
@@ -742,9 +795,11 @@ static void dfx_bus_init(struct net_device *dev)
742 outb(val, base_addr + PI_ESIC_K_IO_ADD_MASK_1_0); 795 outb(val, base_addr + PI_ESIC_K_IO_ADD_MASK_1_0);
743 796
744 /* Enable the decoders. */ 797 /* Enable the decoders. */
745 val = PI_FUNCTION_CNTRL_M_IOCS1 | PI_FUNCTION_CNTRL_M_IOCS0; 798 val = PI_FUNCTION_CNTRL_M_IOCS1;
746 if (dfx_use_mmio) 799 if (dfx_use_mmio)
747 val |= PI_FUNCTION_CNTRL_M_MEMCS0; 800 val |= PI_FUNCTION_CNTRL_M_MEMCS1;
801 else
802 val |= PI_FUNCTION_CNTRL_M_IOCS0;
748 outb(val, base_addr + PI_ESIC_K_FUNCTION_CNTRL); 803 outb(val, base_addr + PI_ESIC_K_FUNCTION_CNTRL);
749 804
750 /* 805 /*
@@ -838,6 +893,12 @@ static void dfx_bus_uninit(struct net_device *dev)
838 val = inb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0); 893 val = inb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0);
839 val &= ~PI_CONFIG_STAT_0_M_INT_ENB; 894 val &= ~PI_CONFIG_STAT_0_M_INT_ENB;
840 outb(val, base_addr + PI_ESIC_K_IO_CONFIG_STAT_0); 895 outb(val, base_addr + PI_ESIC_K_IO_CONFIG_STAT_0);
896
897 /* Disable the board. */
898 outb(0, base_addr + PI_ESIC_K_SLOT_CNTRL);
899
900 /* Disable memory and port decoders. */
901 outb(0, base_addr + PI_ESIC_K_FUNCTION_CNTRL);
841 } 902 }
842 if (dfx_bus_pci) { 903 if (dfx_bus_pci) {
843 /* Disable interrupts at PCI bus interface chip (PFI) */ 904 /* Disable interrupts at PCI bus interface chip (PFI) */
@@ -1061,8 +1122,8 @@ static int dfx_driver_init(struct net_device *dev, const char *print_name,
1061 board_name = "DEFEA"; 1122 board_name = "DEFEA";
1062 if (dfx_bus_pci) 1123 if (dfx_bus_pci)
1063 board_name = "DEFPA"; 1124 board_name = "DEFPA";
1064 pr_info("%s: %s at %saddr = 0x%llx, IRQ = %d, Hardware addr = %pMF\n", 1125 pr_info("%s: %s at %s addr = 0x%llx, IRQ = %d, Hardware addr = %pMF\n",
1065 print_name, board_name, dfx_use_mmio ? "" : "I/O ", 1126 print_name, board_name, dfx_use_mmio ? "MMIO" : "I/O",
1066 (long long)bar_start, dev->irq, dev->dev_addr); 1127 (long long)bar_start, dev->irq, dev->dev_addr);
1067 1128
1068 /* 1129 /*
@@ -3636,8 +3697,8 @@ static void dfx_unregister(struct device *bdev)
3636 int dfx_bus_pci = dev_is_pci(bdev); 3697 int dfx_bus_pci = dev_is_pci(bdev);
3637 int dfx_bus_tc = DFX_BUS_TC(bdev); 3698 int dfx_bus_tc = DFX_BUS_TC(bdev);
3638 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc; 3699 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
3639 resource_size_t bar_start = 0; /* pointer to port */ 3700 resource_size_t bar_start[3]; /* pointers to ports */
3640 resource_size_t bar_len = 0; /* resource length */ 3701 resource_size_t bar_len[3]; /* resource lengths */
3641 int alloc_size; /* total buffer size used */ 3702 int alloc_size; /* total buffer size used */
3642 3703
3643 unregister_netdev(dev); 3704 unregister_netdev(dev);
@@ -3655,12 +3716,16 @@ static void dfx_unregister(struct device *bdev)
3655 3716
3656 dfx_bus_uninit(dev); 3717 dfx_bus_uninit(dev);
3657 3718
3658 dfx_get_bars(bdev, &bar_start, &bar_len); 3719 dfx_get_bars(bdev, bar_start, bar_len);
3720 if (bar_start[2] != 0)
3721 release_region(bar_start[2], bar_len[2]);
3722 if (bar_start[1] != 0)
3723 release_region(bar_start[1], bar_len[1]);
3659 if (dfx_use_mmio) { 3724 if (dfx_use_mmio) {
3660 iounmap(bp->base.mem); 3725 iounmap(bp->base.mem);
3661 release_mem_region(bar_start, bar_len); 3726 release_mem_region(bar_start[0], bar_len[0]);
3662 } else 3727 } else
3663 release_region(bar_start, bar_len); 3728 release_region(bar_start[0], bar_len[0]);
3664 3729
3665 if (dfx_bus_pci) 3730 if (dfx_bus_pci)
3666 pci_disable_device(to_pci_dev(bdev)); 3731 pci_disable_device(to_pci_dev(bdev));
diff --git a/drivers/net/fddi/defxx.h b/drivers/net/fddi/defxx.h
index 9527f0182fd4..9d30fde2ef3c 100644
--- a/drivers/net/fddi/defxx.h
+++ b/drivers/net/fddi/defxx.h
@@ -1481,9 +1481,11 @@ typedef union
1481 1481
1482#define PI_ESIC_K_CSR_IO_LEN 0x40 /* 64 bytes */ 1482#define PI_ESIC_K_CSR_IO_LEN 0x40 /* 64 bytes */
1483#define PI_ESIC_K_BURST_HOLDOFF_LEN 0x04 /* 4 bytes */ 1483#define PI_ESIC_K_BURST_HOLDOFF_LEN 0x04 /* 4 bytes */
1484#define PI_ESIC_K_ESIC_CSR_LEN 0x40 /* 64 bytes */
1484 1485
1485#define PI_DEFEA_K_CSR_IO 0x000 1486#define PI_DEFEA_K_CSR_IO 0x000
1486#define PI_DEFEA_K_BURST_HOLDOFF 0x040 1487#define PI_DEFEA_K_BURST_HOLDOFF 0x040
1488#define PI_ESIC_K_ESIC_CSR 0xC80
1487 1489
1488#define PI_ESIC_K_SLOT_ID 0xC80 1490#define PI_ESIC_K_SLOT_ID 0xC80
1489#define PI_ESIC_K_SLOT_CNTRL 0xC84 1491#define PI_ESIC_K_SLOT_CNTRL 0xC84
@@ -1556,7 +1558,7 @@ typedef union
1556#define PI_BURST_HOLDOFF_V_RESERVED 1 1558#define PI_BURST_HOLDOFF_V_RESERVED 1
1557#define PI_BURST_HOLDOFF_V_MEM_MAP 0 1559#define PI_BURST_HOLDOFF_V_MEM_MAP 0
1558 1560
1559/* Define the implicit mask of the Memory Address Mask Register. */ 1561/* Define the implicit mask of the Memory Address Compare registers. */
1560 1562
1561#define PI_MEM_ADD_MASK_M 0x3ff 1563#define PI_MEM_ADD_MASK_M 0x3ff
1562 1564