drm/i915: fix ELD writing for SandyBridge

SandyBridge should be using the same register addresses as IvyBridge.

Signed-off-by: Wu Fengguang <fengguang.wu@intel.com>
Signed-off-by: Keith Packard <keithp@keithp.com>

1 files changed, 5 insertions, 5 deletions

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index d809b038ca88..8a61b819b4bd 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5876,14 +5876,14 @@ static void ironlake_write_eld(struct drm_connector *connector,
         int aud_cntl_st;
         int aud_cntrl_st2;
 
-        if (IS_IVYBRIDGE(connector->dev)) {
-                hdmiw_hdmiedid = GEN7_HDMIW_HDMIEDID_A;
-                aud_cntl_st = GEN7_AUD_CNTRL_ST_A;
-                aud_cntrl_st2 = GEN7_AUD_CNTRL_ST2;
-        } else {
+        if (HAS_PCH_IBX(connector->dev)) {
                 hdmiw_hdmiedid = GEN5_HDMIW_HDMIEDID_A;
                 aud_cntl_st = GEN5_AUD_CNTL_ST_A;
                 aud_cntrl_st2 = GEN5_AUD_CNTL_ST2;
+        } else {
+                hdmiw_hdmiedid = GEN7_HDMIW_HDMIEDID_A;
+                aud_cntl_st = GEN7_AUD_CNTRL_ST_A;
+                aud_cntrl_st2 = GEN7_AUD_CNTRL_ST2;
         }
 
         i = to_intel_crtc(crtc)->pipe;