drm/radeon: Enable DMA_IB_SWAP_ENABLE on big endian hosts.

Fixes GPU hang during DMA ring IB test.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=59672

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2 files changed, 12 insertions, 4 deletions

diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index 59acabb45c9b..835992d8d067 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -1216,7 +1216,7 @@ void cayman_dma_stop(struct radeon_device *rdev)
 int cayman_dma_resume(struct radeon_device *rdev)
 {
         struct radeon_ring *ring;
-        u32 rb_cntl, dma_cntl;
+        u32 rb_cntl, dma_cntl, ib_cntl;
         u32 rb_bufsz;
         u32 reg_offset, wb_offset;
         int i, r;
@@ -1265,7 +1265,11 @@ int cayman_dma_resume(struct radeon_device *rdev)
                 WREG32(DMA_RB_BASE + reg_offset, ring->gpu_addr >> 8);
 
                 /* enable DMA IBs */
-                WREG32(DMA_IB_CNTL + reg_offset, DMA_IB_ENABLE | CMD_VMID_FORCE);
+                ib_cntl = DMA_IB_ENABLE | CMD_VMID_FORCE;
+#ifdef __BIG_ENDIAN
+                ib_cntl |= DMA_IB_SWAP_ENABLE;
+#endif
+                WREG32(DMA_IB_CNTL + reg_offset, ib_cntl);
 
                 dma_cntl = RREG32(DMA_CNTL + reg_offset);
                 dma_cntl &= ~CTXEMPTY_INT_ENABLE;
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 3cb9d6089373..bc2540b17c5e 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -2313,7 +2313,7 @@ void r600_dma_stop(struct radeon_device *rdev)
 int r600_dma_resume(struct radeon_device *rdev)
 {
         struct radeon_ring *ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX];
-        u32 rb_cntl, dma_cntl;
+        u32 rb_cntl, dma_cntl, ib_cntl;
         u32 rb_bufsz;
         int r;
 
@@ -2353,7 +2353,11 @@ int r600_dma_resume(struct radeon_device *rdev)
         WREG32(DMA_RB_BASE, ring->gpu_addr >> 8);
 
         /* enable DMA IBs */
-        WREG32(DMA_IB_CNTL, DMA_IB_ENABLE);
+        ib_cntl = DMA_IB_ENABLE;
+#ifdef __BIG_ENDIAN
+        ib_cntl |= DMA_IB_SWAP_ENABLE;
+#endif
+        WREG32(DMA_IB_CNTL, ib_cntl);
 
         dma_cntl = RREG32(DMA_CNTL);
         dma_cntl &= ~CTXEMPTY_INT_ENABLE;