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authorLudovic Desroches <ludovic.desroches@atmel.com>2014-11-13 08:18:44 -0500
committerNicolas Ferre <nicolas.ferre@atmel.com>2014-11-19 06:12:15 -0500
commitb3c7a497059cd9020ece1a3dfaddbadb4b7d38b6 (patch)
treee72c17fa42216f9ed6bf57b5556a4595e806d5ef
parent84f017a7b998563ee1f8d0249d0ec7ba295b6427 (diff)
ARM: at91/dt: sama5d4: add DMA support
Add DMA controllers and device configurations. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat
-rw-r--r--arch/arm/boot/dts/sama5d4.dtsi69
1 files changed, 69 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index 338dfd85658f..05e0526a82d2 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -45,6 +45,7 @@
45 45
46#include "skeleton.dtsi" 46#include "skeleton.dtsi"
47#include <dt-bindings/clock/at91.h> 47#include <dt-bindings/clock/at91.h>
48#include <dt-bindings/dma/at91.h>
48#include <dt-bindings/pinctrl/at91.h> 49#include <dt-bindings/pinctrl/at91.h>
49#include <dt-bindings/interrupt-controller/irq.h> 50#include <dt-bindings/interrupt-controller/irq.h>
50#include <dt-bindings/gpio/gpio.h> 51#include <dt-bindings/gpio/gpio.h>
@@ -302,6 +303,15 @@
302 #size-cells = <1>; 303 #size-cells = <1>;
303 ranges; 304 ranges;
304 305
306 dma1: dma-controller@f0004000 {
307 compatible = "atmel,sama5d4-dma";
308 reg = <0xf0004000 0x200>;
309 interrupts = <50 IRQ_TYPE_LEVEL_HIGH 0>;
310 #dma-cells = <1>;
311 clocks = <&dma1_clk>;
312 clock-names = "dma_clk";
313 };
314
305 ramc0: ramc@f0010000 { 315 ramc0: ramc@f0010000 {
306 compatible = "atmel,sama5d3-ddramc"; 316 compatible = "atmel,sama5d3-ddramc";
307 reg = <0xf0010000 0x200>; 317 reg = <0xf0010000 0x200>;
@@ -309,6 +319,15 @@
309 clock-names = "ddrck", "mpddr"; 319 clock-names = "ddrck", "mpddr";
310 }; 320 };
311 321
322 dma0: dma-controller@f0014000 {
323 compatible = "atmel,sama5d4-dma";
324 reg = <0xf0014000 0x200>;
325 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 0>;
326 #dma-cells = <1>;
327 clocks = <&dma0_clk>;
328 clock-names = "dma_clk";
329 };
330
312 pmc: pmc@f0018000 { 331 pmc: pmc@f0018000 {
313 compatible = "atmel,sama5d3-pmc"; 332 compatible = "atmel,sama5d3-pmc";
314 reg = <0xf0018000 0x120>; 333 reg = <0xf0018000 0x120>;
@@ -761,6 +780,10 @@
761 compatible = "atmel,hsmci"; 780 compatible = "atmel,hsmci";
762 reg = <0xf8000000 0x600>; 781 reg = <0xf8000000 0x600>;
763 interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>; 782 interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>;
783 dmas = <&dma1
784 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
785 | AT91_XDMAC_DT_PERID(0))>;
786 dma-names = "rxtx";
764 pinctrl-names = "default"; 787 pinctrl-names = "default";
765 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3>; 788 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3>;
766 status = "disabled"; 789 status = "disabled";
@@ -776,6 +799,13 @@
776 compatible = "atmel,at91rm9200-spi"; 799 compatible = "atmel,at91rm9200-spi";
777 reg = <0xf8010000 0x100>; 800 reg = <0xf8010000 0x100>;
778 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 3>; 801 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 3>;
802 dmas = <&dma1
803 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
804 | AT91_XDMAC_DT_PERID(10))>,
805 <&dma1
806 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
807 | AT91_XDMAC_DT_PERID(11))>;
808 dma-names = "tx", "rx";
779 pinctrl-names = "default"; 809 pinctrl-names = "default";
780 pinctrl-0 = <&pinctrl_spi0>; 810 pinctrl-0 = <&pinctrl_spi0>;
781 clocks = <&spi0_clk>; 811 clocks = <&spi0_clk>;
@@ -787,6 +817,13 @@
787 compatible = "atmel,at91sam9x5-i2c"; 817 compatible = "atmel,at91sam9x5-i2c";
788 reg = <0xf8014000 0x4000>; 818 reg = <0xf8014000 0x4000>;
789 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 6>; 819 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 6>;
820 dmas = <&dma1
821 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
822 | AT91_XDMAC_DT_PERID(2))>,
823 <&dma1
824 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
825 | AT91_XDMAC_DT_PERID(3))>;
826 dma-names = "tx", "rx";
790 pinctrl-names = "default"; 827 pinctrl-names = "default";
791 pinctrl-0 = <&pinctrl_i2c0>; 828 pinctrl-0 = <&pinctrl_i2c0>;
792 #address-cells = <1>; 829 #address-cells = <1>;
@@ -818,6 +855,13 @@
818 compatible = "atmel,at91sam9x5-i2c"; 855 compatible = "atmel,at91sam9x5-i2c";
819 reg = <0xf8024000 0x4000>; 856 reg = <0xf8024000 0x4000>;
820 interrupts = <34 IRQ_TYPE_LEVEL_HIGH 6>; 857 interrupts = <34 IRQ_TYPE_LEVEL_HIGH 6>;
858 dmas = <&dma1
859 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
860 | AT91_XDMAC_DT_PERID(6))>,
861 <&dma1
862 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
863 | AT91_XDMAC_DT_PERID(7))>;
864 dma-names = "tx", "rx";
821 pinctrl-names = "default"; 865 pinctrl-names = "default";
822 pinctrl-0 = <&pinctrl_i2c2>; 866 pinctrl-0 = <&pinctrl_i2c2>;
823 #address-cells = <1>; 867 #address-cells = <1>;
@@ -830,6 +874,10 @@
830 compatible = "atmel,hsmci"; 874 compatible = "atmel,hsmci";
831 reg = <0xfc000000 0x600>; 875 reg = <0xfc000000 0x600>;
832 interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>; 876 interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
877 dmas = <&dma1
878 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
879 | AT91_XDMAC_DT_PERID(1))>;
880 dma-names = "rxtx";
833 pinctrl-names = "default"; 881 pinctrl-names = "default";
834 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>; 882 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
835 status = "disabled"; 883 status = "disabled";
@@ -843,6 +891,13 @@
843 compatible = "atmel,at91sam9260-usart"; 891 compatible = "atmel,at91sam9260-usart";
844 reg = <0xfc008000 0x100>; 892 reg = <0xfc008000 0x100>;
845 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>; 893 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
894 dmas = <&dma1
895 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
896 | AT91_XDMAC_DT_PERID(16))>,
897 <&dma1
898 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
899 | AT91_XDMAC_DT_PERID(17))>;
900 dma-names = "tx", "rx";
846 pinctrl-names = "default"; 901 pinctrl-names = "default";
847 pinctrl-0 = <&pinctrl_usart2 &pinctrl_usart2_rts &pinctrl_usart2_cts>; 902 pinctrl-0 = <&pinctrl_usart2 &pinctrl_usart2_rts &pinctrl_usart2_cts>;
848 clocks = <&usart2_clk>; 903 clocks = <&usart2_clk>;
@@ -854,6 +909,13 @@
854 compatible = "atmel,at91sam9260-usart"; 909 compatible = "atmel,at91sam9260-usart";
855 reg = <0xfc00c000 0x100>; 910 reg = <0xfc00c000 0x100>;
856 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 5>; 911 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 5>;
912 dmas = <&dma1
913 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
914 | AT91_XDMAC_DT_PERID(18))>,
915 <&dma1
916 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
917 | AT91_XDMAC_DT_PERID(19))>;
918 dma-names = "tx", "rx";
857 pinctrl-names = "default"; 919 pinctrl-names = "default";
858 pinctrl-0 = <&pinctrl_usart3>; 920 pinctrl-0 = <&pinctrl_usart3>;
859 clocks = <&usart3_clk>; 921 clocks = <&usart3_clk>;
@@ -865,6 +927,13 @@
865 compatible = "atmel,at91sam9260-usart"; 927 compatible = "atmel,at91sam9260-usart";
866 reg = <0xfc010000 0x100>; 928 reg = <0xfc010000 0x100>;
867 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 5>; 929 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 5>;
930 dmas = <&dma1
931 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
932 | AT91_XDMAC_DT_PERID(20))>,
933 <&dma1
934 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
935 | AT91_XDMAC_DT_PERID(21))>;
936 dma-names = "tx", "rx";
868 pinctrl-names = "default"; 937 pinctrl-names = "default";
869 pinctrl-0 = <&pinctrl_usart4>; 938 pinctrl-0 = <&pinctrl_usart4>;
870 clocks = <&usart4_clk>; 939 clocks = <&usart4_clk>;
generated by cgit v1.2.2 (git 2.25.0) at 2026-04-14 14:04:05 -0400