drm/nve0/bsp: implement initial support for engine

Will allow use of the engine if firmware (nvXX_fuc084) provided.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

5 files changed, 117 insertions, 0 deletions

diff --git a/drivers/gpu/drm/nouveau/Makefile b/drivers/gpu/drm/nouveau/Makefile
index af6c5c236ecb..18bdf7f6eaa8 100644
--- a/drivers/gpu/drm/nouveau/Makefile
+++ b/drivers/gpu/drm/nouveau/Makefile
@@ -125,6 +125,7 @@ nouveau-y += core/engine/dmaobj/nv50.o
 nouveau-y += core/engine/dmaobj/nvc0.o
 nouveau-y += core/engine/dmaobj/nvd0.o
 nouveau-y += core/engine/bsp/nv84.o
+nouveau-y += core/engine/bsp/nve0.o
 nouveau-y += core/engine/copy/nva3.o
 nouveau-y += core/engine/copy/nvc0.o
 nouveau-y += core/engine/copy/nve0.o
diff --git a/drivers/gpu/drm/nouveau/core/engine/bsp/nve0.c b/drivers/gpu/drm/nouveau/core/engine/bsp/nve0.c
new file mode 100644
index 000000000000..d4f23bbd75b4
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/core/engine/bsp/nve0.c
@@ -0,0 +1,110 @@
+/*
+ * Copyright 2012 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+
+#include <core/falcon.h>
+
+#include <engine/bsp.h>
+
+struct nve0_bsp_priv {
+        struct nouveau_falcon base;
+};
+
+/*******************************************************************************
+ * BSP object classes
+ ******************************************************************************/
+
+static struct nouveau_oclass
+nve0_bsp_sclass[] = {
+        { 0x95b1, &nouveau_object_ofuncs },
+        {},
+};
+
+/*******************************************************************************
+ * PBSP context
+ ******************************************************************************/
+
+static struct nouveau_oclass
+nve0_bsp_cclass = {
+        .handle = NV_ENGCTX(BSP, 0xe0),
+        .ofuncs = &(struct nouveau_ofuncs) {
+                .ctor = _nouveau_falcon_context_ctor,
+                .dtor = _nouveau_falcon_context_dtor,
+                .init = _nouveau_falcon_context_init,
+                .fini = _nouveau_falcon_context_fini,
+                .rd32 = _nouveau_falcon_context_rd32,
+                .wr32 = _nouveau_falcon_context_wr32,
+        },
+};
+
+/*******************************************************************************
+ * PBSP engine/subdev functions
+ ******************************************************************************/
+
+static int
+nve0_bsp_init(struct nouveau_object *object)
+{
+        struct nve0_bsp_priv *priv = (void *)object;
+        int ret;
+
+        ret = nouveau_falcon_init(&priv->base);
+        if (ret)
+                return ret;
+
+        nv_wr32(priv, 0x084010, 0x0000fff2);
+        nv_wr32(priv, 0x08401c, 0x0000fff2);
+        return 0;
+}
+
+static int
+nve0_bsp_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
+              struct nouveau_oclass *oclass, void *data, u32 size,
+              struct nouveau_object **pobject)
+{
+        struct nve0_bsp_priv *priv;
+        int ret;
+
+        ret = nouveau_falcon_create(parent, engine, oclass, 0x084000, true,
+                                    "PBSP", "bsp", &priv);
+        *pobject = nv_object(priv);
+        if (ret)
+                return ret;
+
+        nv_subdev(priv)->unit = 0x00008000;
+        nv_engine(priv)->cclass = &nve0_bsp_cclass;
+        nv_engine(priv)->sclass = nve0_bsp_sclass;
+        return 0;
+}
+
+struct nouveau_oclass
+nve0_bsp_oclass = {
+        .handle = NV_ENGINE(BSP, 0xe0),
+        .ofuncs = &(struct nouveau_ofuncs) {
+                .ctor = nve0_bsp_ctor,
+                .dtor = _nouveau_falcon_dtor,
+                .init = nve0_bsp_init,
+                .fini = _nouveau_falcon_fini,
+                .rd32 = _nouveau_falcon_rd32,
+                .wr32 = _nouveau_falcon_wr32,
+        },
+};
diff --git a/drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c b/drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c
index 36e81b6fafbc..35abb29c5ad6 100644
--- a/drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c
+++ b/drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c
@@ -138,6 +138,7 @@ nve0_fifo_context_attach(struct nouveau_object *parent,
         case NVDEV_ENGINE_GR   :
         case NVDEV_ENGINE_COPY0:
         case NVDEV_ENGINE_COPY1: addr = 0x0210; break;
+        case NVDEV_ENGINE_BSP  : addr = 0x0270; break;
         default:
                 return -EINVAL;
         }
@@ -172,6 +173,7 @@ nve0_fifo_context_detach(struct nouveau_object *parent, bool suspend,
         case NVDEV_ENGINE_GR   :
         case NVDEV_ENGINE_COPY0:
         case NVDEV_ENGINE_COPY1: addr = 0x0210; break;
+        case NVDEV_ENGINE_BSP  : addr = 0x0270; break;
         default:
                 return -EINVAL;
         }
diff --git a/drivers/gpu/drm/nouveau/core/include/engine/bsp.h b/drivers/gpu/drm/nouveau/core/include/engine/bsp.h
index 75d1ed5f85fd..0374e345db10 100644
--- a/drivers/gpu/drm/nouveau/core/include/engine/bsp.h
+++ b/drivers/gpu/drm/nouveau/core/include/engine/bsp.h
@@ -41,5 +41,6 @@ struct nouveau_bsp {
 #define _nouveau_bsp_fini _nouveau_engine_fini
 
 extern struct nouveau_oclass nv84_bsp_oclass;
+extern struct nouveau_oclass nve0_bsp_oclass;
 
 #endif
diff --git a/drivers/gpu/drm/nouveau/core/subdev/device/nve0.c b/drivers/gpu/drm/nouveau/core/subdev/device/nve0.c
index 8f1cf51686ed..78c923fa3d0f 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/device/nve0.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/device/nve0.c
@@ -45,6 +45,7 @@
 #include <engine/graph.h>
 #include <engine/disp.h>
 #include <engine/copy.h>
+#include <engine/bsp.h>
 
 int
 nve0_identify(struct nouveau_device *device)
@@ -74,6 +75,7 @@ nve0_identify(struct nouveau_device *device)
                 device->oclass[NVDEV_ENGINE_DISP   ] = &nve0_disp_oclass;
                 device->oclass[NVDEV_ENGINE_COPY0  ] = &nve0_copy0_oclass;
                 device->oclass[NVDEV_ENGINE_COPY1  ] = &nve0_copy1_oclass;
+                device->oclass[NVDEV_ENGINE_BSP    ] = &nve0_bsp_oclass;
                 break;
         case 0xe7:
                 device->cname = "GK107";
@@ -99,6 +101,7 @@ nve0_identify(struct nouveau_device *device)
                 device->oclass[NVDEV_ENGINE_DISP   ] = &nve0_disp_oclass;
                 device->oclass[NVDEV_ENGINE_COPY0  ] = &nve0_copy0_oclass;
                 device->oclass[NVDEV_ENGINE_COPY1  ] = &nve0_copy1_oclass;
+                device->oclass[NVDEV_ENGINE_BSP    ] = &nve0_bsp_oclass;
                 break;
         default:
                 nv_fatal(device, "unknown Kepler chipset\n");