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authorThomas Gleixner <tglx@linutronix.de>2014-05-07 11:44:16 -0400
committerThomas Gleixner <tglx@linutronix.de>2014-05-16 08:05:21 -0400
commitb26d851ff1928b56242c4c5e16cb62bac2d9526c (patch)
treeef1325900428e72bcf4b520f77cba9ab2669fdb3
parent2aa799d891299457e4107d33f07a1ed5ac8849ae (diff)
tile: Use SPARSE_IRQ
Get rid of the private allocator and switch over to sparse IRQs. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Grant Likely <grant.likely@linaro.org> Cc: Tony Luck <tony.luck@intel.com> Cc: Peter Zijlstra <peterz@infradead.org> Acked-by: Chris Metcalf <cmetcalf@tilera.com> Link: http://lkml.kernel.org/r/20140507154338.423715783@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
-rw-r--r--arch/tile/Kconfig2
-rw-r--r--arch/tile/include/asm/irq.h9
-rw-r--r--arch/tile/kernel/irq.c52
3 files changed, 9 insertions, 54 deletions
diff --git a/arch/tile/Kconfig b/arch/tile/Kconfig
index 85258ca43ff5..4f3006b600e3 100644
--- a/arch/tile/Kconfig
+++ b/arch/tile/Kconfig
@@ -125,6 +125,8 @@ config HVC_TILE
125 125
126config TILEGX 126config TILEGX
127 bool "Building for TILE-Gx (64-bit) processor" 127 bool "Building for TILE-Gx (64-bit) processor"
128 select SPARSE_IRQ
129 select GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
128 select HAVE_FUNCTION_TRACER 130 select HAVE_FUNCTION_TRACER
129 select HAVE_FUNCTION_TRACE_MCOUNT_TEST 131 select HAVE_FUNCTION_TRACE_MCOUNT_TEST
130 select HAVE_FUNCTION_GRAPH_TRACER 132 select HAVE_FUNCTION_GRAPH_TRACER
diff --git a/arch/tile/include/asm/irq.h b/arch/tile/include/asm/irq.h
index 9670a39d924d..1fe86911838b 100644
--- a/arch/tile/include/asm/irq.h
+++ b/arch/tile/include/asm/irq.h
@@ -18,10 +18,12 @@
18#include <linux/hardirq.h> 18#include <linux/hardirq.h>
19 19
20/* The hypervisor interface provides 32 IRQs. */ 20/* The hypervisor interface provides 32 IRQs. */
21#define NR_IRQS 32 21#define NR_IRQS 32
22 22
23/* IRQ numbers used for linux IPIs. */ 23/* IRQ numbers used for linux IPIs. */
24#define IRQ_RESCHEDULE 0 24#define IRQ_RESCHEDULE 0
25/* Interrupts for dynamic allocation start at 1. Let the core allocate irq0 */
26#define NR_IRQS_LEGACY 1
25 27
26#define irq_canonicalize(irq) (irq) 28#define irq_canonicalize(irq) (irq)
27 29
@@ -76,7 +78,4 @@ void tile_irq_activate(unsigned int irq, int tile_irq_type);
76 78
77void setup_irq_regs(void); 79void setup_irq_regs(void);
78 80
79unsigned int irq_alloc_hwirq(int node);
80void irq_free_hwirq(unsigned int irq);
81
82#endif /* _ASM_TILE_IRQ_H */ 81#endif /* _ASM_TILE_IRQ_H */
diff --git a/arch/tile/kernel/irq.c b/arch/tile/kernel/irq.c
index 5fd197e0a2d4..637f2ffaa5f5 100644
--- a/arch/tile/kernel/irq.c
+++ b/arch/tile/kernel/irq.c
@@ -54,13 +54,6 @@ static DEFINE_PER_CPU(unsigned long, irq_disable_mask)
54 */ 54 */
55static DEFINE_PER_CPU(int, irq_depth); 55static DEFINE_PER_CPU(int, irq_depth);
56 56
57/* State for allocating IRQs on Gx. */
58#if CHIP_HAS_IPI()
59static unsigned long available_irqs = ((1UL << NR_IRQS) - 1) &
60 (~(1UL << IRQ_RESCHEDULE));
61static DEFINE_SPINLOCK(available_irqs_lock);
62#endif
63
64#if CHIP_HAS_IPI() 57#if CHIP_HAS_IPI()
65/* Use SPRs to manipulate device interrupts. */ 58/* Use SPRs to manipulate device interrupts. */
66#define mask_irqs(irq_mask) __insn_mtspr(SPR_IPI_MASK_SET_K, irq_mask) 59#define mask_irqs(irq_mask) __insn_mtspr(SPR_IPI_MASK_SET_K, irq_mask)
@@ -278,50 +271,11 @@ int arch_show_interrupts(struct seq_file *p, int prec)
278 return 0; 271 return 0;
279} 272}
280 273
281/*
282 * Generic, controller-independent functions:
283 */
284
285#if CHIP_HAS_IPI() 274#if CHIP_HAS_IPI()
286int create_irq(void) 275int arch_setup_hwirq(unsigned int irq, int node)
287{
288 unsigned long flags;
289 int result;
290
291 spin_lock_irqsave(&available_irqs_lock, flags);
292 if (available_irqs == 0)
293 result = -ENOMEM;
294 else {
295 result = __ffs(available_irqs);
296 available_irqs &= ~(1UL << result);
297 dynamic_irq_init(result);
298 }
299 spin_unlock_irqrestore(&available_irqs_lock, flags);
300
301 return result;
302}
303EXPORT_SYMBOL(create_irq);
304
305void destroy_irq(unsigned int irq)
306{
307 unsigned long flags;
308
309 spin_lock_irqsave(&available_irqs_lock, flags);
310 available_irqs |= (1UL << irq);
311 dynamic_irq_cleanup(irq);
312 spin_unlock_irqrestore(&available_irqs_lock, flags);
313}
314EXPORT_SYMBOL(destroy_irq);
315
316unsigned int irq_alloc_hwirq(int node)
317{
318 int ret = create_irq();
319 return ret < 0 ? 0 : ret;
320}
321
322void irq_free_hwirq(unsigned int irq)
323{ 276{
324 destroy_irq(irq); 277 return irq >= NR_IRQS ? -EINVAL : 0;
325} 278}
326 279
280void arch_teardown_hwirq(unsigned int irq) { }
327#endif 281#endif