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authorYaniv Rosner <yanivr@broadcom.com>2011-01-17 23:33:24 -0500
committerDavid S. Miller <davem@davemloft.net>2011-01-18 19:10:36 -0500
commitb21a3424877a4d5ca91a6d446ed581a2bd03160c (patch)
tree6d6f54d787a2bb3c84184f60bce59d33ed2ad901
parent74d7a11979e39adc1fc4d7a77afe83aa12a0f2b1 (diff)
bnx2x: Common init will be executed only once after POR
Common init used to be called by the driver when the first port comes up, mainly to reset and reload external PHY microcode. However, in case management driver is active on the other port, traffic would halted. So limit the common init to be done only once after POR. Signed-off-by: Yaniv Rosner <yanivr@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/bnx2x/bnx2x_link.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/net/bnx2x/bnx2x_link.c b/drivers/net/bnx2x/bnx2x_link.c
index 77f9eb193cba..bdf3c670c8f6 100644
--- a/drivers/net/bnx2x/bnx2x_link.c
+++ b/drivers/net/bnx2x/bnx2x_link.c
@@ -7958,6 +7958,7 @@ u8 bnx2x_common_init_phy(struct bnx2x *bp, u32 shmem_base_path[],
7958 u32 shmem2_base_path[], u32 chip_id) 7958 u32 shmem2_base_path[], u32 chip_id)
7959{ 7959{
7960 u8 rc = 0; 7960 u8 rc = 0;
7961 u32 phy_ver;
7961 u8 phy_index; 7962 u8 phy_index;
7962 u32 ext_phy_type, ext_phy_config; 7963 u32 ext_phy_type, ext_phy_config;
7963 DP(NETIF_MSG_LINK, "Begin common phy init\n"); 7964 DP(NETIF_MSG_LINK, "Begin common phy init\n");
@@ -7965,6 +7966,16 @@ u8 bnx2x_common_init_phy(struct bnx2x *bp, u32 shmem_base_path[],
7965 if (CHIP_REV_IS_EMUL(bp)) 7966 if (CHIP_REV_IS_EMUL(bp))
7966 return 0; 7967 return 0;
7967 7968
7969 /* Check if common init was already done */
7970 phy_ver = REG_RD(bp, shmem_base_path[0] +
7971 offsetof(struct shmem_region,
7972 port_mb[PORT_0].ext_phy_fw_version));
7973 if (phy_ver) {
7974 DP(NETIF_MSG_LINK, "Not doing common init; phy ver is 0x%x\n",
7975 phy_ver);
7976 return 0;
7977 }
7978
7968 /* Read the ext_phy_type for arbitrary port(0) */ 7979 /* Read the ext_phy_type for arbitrary port(0) */
7969 for (phy_index = EXT_PHY1; phy_index < MAX_PHYS; 7980 for (phy_index = EXT_PHY1; phy_index < MAX_PHYS;
7970 phy_index++) { 7981 phy_index++) {