diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2014-11-09 17:46:36 -0500 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2014-11-09 17:46:36 -0500 |
| commit | b1f368b58b3c8095de4cff9eeb69babffab4e3d3 (patch) | |
| tree | efd28998e71ad2a5433ca79e858a2cfc71f30a2d | |
| parent | a3157809772c4a5256ef68a4d5b21ea4ecc80ad4 (diff) | |
| parent | 92c9e0c780e61f821ab8a08f0d4d4fd33ba1197c (diff) | |
Merge tag 'armsoc-for-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"Another quiet week:
- a fix to silence edma probe error on non-supported platforms from
Arnd
- a fix to enable the PL clock for Parallella, to make mainline
usable with the SDK.
- a somewhat verbose fix for the PLL clock tree on VF610
- enabling of SD/MMC on one of the VF610-based boards (for testing)
- a fix for i.MX where CONFIG_SPI used to be implicitly enabled and
now needs to be added to the defconfig instead
- another maintainer added for bcm2835: Lee Jones"
* tag 'armsoc-for-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: dts: zynq: Enable PL clocks for Parallella
dma: edma: move device registration to platform code
ARM: dts: vf610: add SD node to cosmic dts
MAINTAINERS: update bcm2835 entry
ARM: imx: Fix the removal of CONFIG_SPI option
ARM: imx: clk-vf610: define PLL's clock tree
| -rw-r--r-- | MAINTAINERS | 3 | ||||
| -rw-r--r-- | arch/arm/boot/dts/vf610-cosmic.dts | 19 | ||||
| -rw-r--r-- | arch/arm/boot/dts/zynq-parallella.dts | 4 | ||||
| -rw-r--r-- | arch/arm/common/edma.c | 9 | ||||
| -rw-r--r-- | arch/arm/configs/imx_v4_v5_defconfig | 1 | ||||
| -rw-r--r-- | arch/arm/configs/imx_v6_v7_defconfig | 1 | ||||
| -rw-r--r-- | arch/arm/mach-imx/clk-vf610.c | 134 | ||||
| -rw-r--r-- | drivers/dma/edma.c | 40 | ||||
| -rw-r--r-- | include/dt-bindings/clock/vf610-clock.h | 39 |
9 files changed, 160 insertions, 90 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index a0d386e234ed..ea4d0058fd1b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS | |||
| @@ -2072,8 +2072,9 @@ F: drivers/clocksource/bcm_kona_timer.c | |||
| 2072 | 2072 | ||
| 2073 | BROADCOM BCM2835 ARM ARCHITECTURE | 2073 | BROADCOM BCM2835 ARM ARCHITECTURE |
| 2074 | M: Stephen Warren <swarren@wwwdotorg.org> | 2074 | M: Stephen Warren <swarren@wwwdotorg.org> |
| 2075 | M: Lee Jones <lee@kernel.org> | ||
| 2075 | L: linux-rpi-kernel@lists.infradead.org (moderated for non-subscribers) | 2076 | L: linux-rpi-kernel@lists.infradead.org (moderated for non-subscribers) |
| 2076 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi.git | 2077 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/rpi/linux-rpi.git |
| 2077 | S: Maintained | 2078 | S: Maintained |
| 2078 | N: bcm2835 | 2079 | N: bcm2835 |
| 2079 | 2080 | ||
diff --git a/arch/arm/boot/dts/vf610-cosmic.dts b/arch/arm/boot/dts/vf610-cosmic.dts index 3fd1b74e1216..de1b453c2932 100644 --- a/arch/arm/boot/dts/vf610-cosmic.dts +++ b/arch/arm/boot/dts/vf610-cosmic.dts | |||
| @@ -33,6 +33,13 @@ | |||
| 33 | 33 | ||
| 34 | }; | 34 | }; |
| 35 | 35 | ||
| 36 | &esdhc1 { | ||
| 37 | pinctrl-names = "default"; | ||
| 38 | pinctrl-0 = <&pinctrl_esdhc1>; | ||
| 39 | bus-width = <4>; | ||
| 40 | status = "okay"; | ||
| 41 | }; | ||
| 42 | |||
| 36 | &fec1 { | 43 | &fec1 { |
| 37 | phy-mode = "rmii"; | 44 | phy-mode = "rmii"; |
| 38 | pinctrl-names = "default"; | 45 | pinctrl-names = "default"; |
| @@ -42,6 +49,18 @@ | |||
| 42 | 49 | ||
| 43 | &iomuxc { | 50 | &iomuxc { |
| 44 | vf610-cosmic { | 51 | vf610-cosmic { |
| 52 | pinctrl_esdhc1: esdhc1grp { | ||
| 53 | fsl,pins = < | ||
| 54 | VF610_PAD_PTA24__ESDHC1_CLK 0x31ef | ||
| 55 | VF610_PAD_PTA25__ESDHC1_CMD 0x31ef | ||
| 56 | VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef | ||
| 57 | VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef | ||
| 58 | VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef | ||
| 59 | VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef | ||
| 60 | VF610_PAD_PTB28__GPIO_98 0x219d | ||
| 61 | >; | ||
| 62 | }; | ||
| 63 | |||
| 45 | pinctrl_fec1: fec1grp { | 64 | pinctrl_fec1: fec1grp { |
| 46 | fsl,pins = < | 65 | fsl,pins = < |
| 47 | VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2 | 66 | VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2 |
diff --git a/arch/arm/boot/dts/zynq-parallella.dts b/arch/arm/boot/dts/zynq-parallella.dts index e1f51ca127fe..0429bbd89fba 100644 --- a/arch/arm/boot/dts/zynq-parallella.dts +++ b/arch/arm/boot/dts/zynq-parallella.dts | |||
| @@ -34,6 +34,10 @@ | |||
| 34 | }; | 34 | }; |
| 35 | }; | 35 | }; |
| 36 | 36 | ||
| 37 | &clkc { | ||
| 38 | fclk-enable = <0xf>; | ||
| 39 | }; | ||
| 40 | |||
| 37 | &gem0 { | 41 | &gem0 { |
| 38 | status = "okay"; | 42 | status = "okay"; |
| 39 | phy-mode = "rgmii-id"; | 43 | phy-mode = "rgmii-id"; |
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c index d86771abbf57..72041f002b7e 100644 --- a/arch/arm/common/edma.c +++ b/arch/arm/common/edma.c | |||
| @@ -26,6 +26,7 @@ | |||
| 26 | #include <linux/io.h> | 26 | #include <linux/io.h> |
| 27 | #include <linux/slab.h> | 27 | #include <linux/slab.h> |
| 28 | #include <linux/edma.h> | 28 | #include <linux/edma.h> |
| 29 | #include <linux/dma-mapping.h> | ||
| 29 | #include <linux/of_address.h> | 30 | #include <linux/of_address.h> |
| 30 | #include <linux/of_device.h> | 31 | #include <linux/of_device.h> |
| 31 | #include <linux/of_dma.h> | 32 | #include <linux/of_dma.h> |
| @@ -1623,6 +1624,11 @@ static int edma_probe(struct platform_device *pdev) | |||
| 1623 | struct device_node *node = pdev->dev.of_node; | 1624 | struct device_node *node = pdev->dev.of_node; |
| 1624 | struct device *dev = &pdev->dev; | 1625 | struct device *dev = &pdev->dev; |
| 1625 | int ret; | 1626 | int ret; |
| 1627 | struct platform_device_info edma_dev_info = { | ||
| 1628 | .name = "edma-dma-engine", | ||
| 1629 | .dma_mask = DMA_BIT_MASK(32), | ||
| 1630 | .parent = &pdev->dev, | ||
| 1631 | }; | ||
| 1626 | 1632 | ||
| 1627 | if (node) { | 1633 | if (node) { |
| 1628 | /* Check if this is a second instance registered */ | 1634 | /* Check if this is a second instance registered */ |
| @@ -1793,6 +1799,9 @@ static int edma_probe(struct platform_device *pdev) | |||
| 1793 | edma_write_array(j, EDMA_QRAE, i, 0x0); | 1799 | edma_write_array(j, EDMA_QRAE, i, 0x0); |
| 1794 | } | 1800 | } |
| 1795 | arch_num_cc++; | 1801 | arch_num_cc++; |
| 1802 | |||
| 1803 | edma_dev_info.id = j; | ||
| 1804 | platform_device_register_full(&edma_dev_info); | ||
| 1796 | } | 1805 | } |
| 1797 | 1806 | ||
| 1798 | return 0; | 1807 | return 0; |
diff --git a/arch/arm/configs/imx_v4_v5_defconfig b/arch/arm/configs/imx_v4_v5_defconfig index e688741c89aa..e6b0007355f8 100644 --- a/arch/arm/configs/imx_v4_v5_defconfig +++ b/arch/arm/configs/imx_v4_v5_defconfig | |||
| @@ -97,6 +97,7 @@ CONFIG_SERIAL_IMX_CONSOLE=y | |||
| 97 | # CONFIG_HW_RANDOM is not set | 97 | # CONFIG_HW_RANDOM is not set |
| 98 | CONFIG_I2C_CHARDEV=y | 98 | CONFIG_I2C_CHARDEV=y |
| 99 | CONFIG_I2C_IMX=y | 99 | CONFIG_I2C_IMX=y |
| 100 | CONFIG_SPI=y | ||
| 100 | CONFIG_SPI_IMX=y | 101 | CONFIG_SPI_IMX=y |
| 101 | CONFIG_SPI_SPIDEV=y | 102 | CONFIG_SPI_SPIDEV=y |
| 102 | CONFIG_GPIO_SYSFS=y | 103 | CONFIG_GPIO_SYSFS=y |
diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig index 8fca6e276b69..6790f1b3f3a1 100644 --- a/arch/arm/configs/imx_v6_v7_defconfig +++ b/arch/arm/configs/imx_v6_v7_defconfig | |||
| @@ -158,6 +158,7 @@ CONFIG_I2C_CHARDEV=y | |||
| 158 | CONFIG_I2C_ALGOPCF=m | 158 | CONFIG_I2C_ALGOPCF=m |
| 159 | CONFIG_I2C_ALGOPCA=m | 159 | CONFIG_I2C_ALGOPCA=m |
| 160 | CONFIG_I2C_IMX=y | 160 | CONFIG_I2C_IMX=y |
| 161 | CONFIG_SPI=y | ||
| 161 | CONFIG_SPI_IMX=y | 162 | CONFIG_SPI_IMX=y |
| 162 | CONFIG_GPIO_SYSFS=y | 163 | CONFIG_GPIO_SYSFS=y |
| 163 | CONFIG_GPIO_MC9S08DZ60=y | 164 | CONFIG_GPIO_MC9S08DZ60=y |
diff --git a/arch/arm/mach-imx/clk-vf610.c b/arch/arm/mach-imx/clk-vf610.c index a17818475050..409637254594 100644 --- a/arch/arm/mach-imx/clk-vf610.c +++ b/arch/arm/mach-imx/clk-vf610.c | |||
| @@ -58,8 +58,14 @@ | |||
| 58 | #define PFD_PLL1_BASE (anatop_base + 0x2b0) | 58 | #define PFD_PLL1_BASE (anatop_base + 0x2b0) |
| 59 | #define PFD_PLL2_BASE (anatop_base + 0x100) | 59 | #define PFD_PLL2_BASE (anatop_base + 0x100) |
| 60 | #define PFD_PLL3_BASE (anatop_base + 0xf0) | 60 | #define PFD_PLL3_BASE (anatop_base + 0xf0) |
| 61 | #define PLL1_CTRL (anatop_base + 0x270) | ||
| 62 | #define PLL2_CTRL (anatop_base + 0x30) | ||
| 61 | #define PLL3_CTRL (anatop_base + 0x10) | 63 | #define PLL3_CTRL (anatop_base + 0x10) |
| 64 | #define PLL4_CTRL (anatop_base + 0x70) | ||
| 65 | #define PLL5_CTRL (anatop_base + 0xe0) | ||
| 66 | #define PLL6_CTRL (anatop_base + 0xa0) | ||
| 62 | #define PLL7_CTRL (anatop_base + 0x20) | 67 | #define PLL7_CTRL (anatop_base + 0x20) |
| 68 | #define ANA_MISC1 (anatop_base + 0x160) | ||
| 63 | 69 | ||
| 64 | static void __iomem *anatop_base; | 70 | static void __iomem *anatop_base; |
| 65 | static void __iomem *ccm_base; | 71 | static void __iomem *ccm_base; |
| @@ -67,25 +73,34 @@ static void __iomem *ccm_base; | |||
| 67 | /* sources for multiplexer clocks, this is used multiple times */ | 73 | /* sources for multiplexer clocks, this is used multiple times */ |
| 68 | static const char *fast_sels[] = { "firc", "fxosc", }; | 74 | static const char *fast_sels[] = { "firc", "fxosc", }; |
| 69 | static const char *slow_sels[] = { "sirc_32k", "sxosc", }; | 75 | static const char *slow_sels[] = { "sirc_32k", "sxosc", }; |
| 70 | static const char *pll1_sels[] = { "pll1_main", "pll1_pfd1", "pll1_pfd2", "pll1_pfd3", "pll1_pfd4", }; | 76 | static const char *pll1_sels[] = { "pll1_sys", "pll1_pfd1", "pll1_pfd2", "pll1_pfd3", "pll1_pfd4", }; |
| 71 | static const char *pll2_sels[] = { "pll2_main", "pll2_pfd1", "pll2_pfd2", "pll2_pfd3", "pll2_pfd4", }; | 77 | static const char *pll2_sels[] = { "pll2_bus", "pll2_pfd1", "pll2_pfd2", "pll2_pfd3", "pll2_pfd4", }; |
| 72 | static const char *sys_sels[] = { "fast_clk_sel", "slow_clk_sel", "pll2_pfd_sel", "pll2_main", "pll1_pfd_sel", "pll3_main", }; | 78 | static const char *pll_bypass_src_sels[] = { "fast_clk_sel", "lvds1_in", }; |
| 79 | static const char *pll1_bypass_sels[] = { "pll1", "pll1_bypass_src", }; | ||
| 80 | static const char *pll2_bypass_sels[] = { "pll2", "pll2_bypass_src", }; | ||
| 81 | static const char *pll3_bypass_sels[] = { "pll3", "pll3_bypass_src", }; | ||
| 82 | static const char *pll4_bypass_sels[] = { "pll4", "pll4_bypass_src", }; | ||
| 83 | static const char *pll5_bypass_sels[] = { "pll5", "pll5_bypass_src", }; | ||
| 84 | static const char *pll6_bypass_sels[] = { "pll6", "pll6_bypass_src", }; | ||
| 85 | static const char *pll7_bypass_sels[] = { "pll7", "pll7_bypass_src", }; | ||
| 86 | static const char *sys_sels[] = { "fast_clk_sel", "slow_clk_sel", "pll2_pfd_sel", "pll2_bus", "pll1_pfd_sel", "pll3_usb_otg", }; | ||
