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authorVivek Natarajan <vnatarajan@atheros.com>2011-01-27 04:15:07 -0500
committerJohn W. Linville <linville@tuxdriver.com>2011-01-28 15:44:28 -0500
commitb141581923ab4904052174e3b4eb17cc3ce8632c (patch)
tree7b6249510e86a8e72cc10c73ab8e6eeecb631917
parent74f7635930bb157b2e83d38a68177a2b28138ead (diff)
ath9k_hw: Add a function to read sqsum_dvc.
Add a function to observe the delta VC of BB_PLL. For a good chip, the sqsum_dvc is below 2000. Signed-off-by: Vivek Natarajan <vnatarajan@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.c13
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.h1
-rw-r--r--drivers/net/wireless/ath/ath9k/reg.h6
3 files changed, 20 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 48d121c24eb7..0e64d7666057 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -668,6 +668,19 @@ static void ath9k_hw_init_qos(struct ath_hw *ah)
668 REGWRITE_BUFFER_FLUSH(ah); 668 REGWRITE_BUFFER_FLUSH(ah);
669} 669}
670 670
671unsigned long ar9003_get_pll_sqsum_dvc(struct ath_hw *ah)
672{
673 REG_WRITE(ah, PLL3, (REG_READ(ah, PLL3) & ~(PLL3_DO_MEAS_MASK)));
674 udelay(100);
675 REG_WRITE(ah, PLL3, (REG_READ(ah, PLL3) | PLL3_DO_MEAS_MASK));
676
677 while ((REG_READ(ah, PLL4) & PLL4_MEAS_DONE) == 0)
678 udelay(100);
679
680 return (REG_READ(ah, PLL3) & SQSUM_DVC_MASK) >> 3;
681}
682EXPORT_SYMBOL(ar9003_get_pll_sqsum_dvc);
683
671static void ath9k_hw_init_pll(struct ath_hw *ah, 684static void ath9k_hw_init_pll(struct ath_hw *ah,
672 struct ath9k_channel *chan) 685 struct ath9k_channel *chan)
673{ 686{
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index c2b3515deea1..8c688a12cba8 100644
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -928,6 +928,7 @@ void ath9k_hw_settsf64(struct ath_hw *ah, u64 tsf64);
928void ath9k_hw_reset_tsf(struct ath_hw *ah); 928void ath9k_hw_reset_tsf(struct ath_hw *ah);
929void ath9k_hw_set_tsfadjust(struct ath_hw *ah, u32 setting); 929void ath9k_hw_set_tsfadjust(struct ath_hw *ah, u32 setting);
930void ath9k_hw_init_global_settings(struct ath_hw *ah); 930void ath9k_hw_init_global_settings(struct ath_hw *ah);
931unsigned long ar9003_get_pll_sqsum_dvc(struct ath_hw *ah);
931void ath9k_hw_set11nmac2040(struct ath_hw *ah); 932void ath9k_hw_set11nmac2040(struct ath_hw *ah);
932void ath9k_hw_beaconinit(struct ath_hw *ah, u32 next_beacon, u32 beacon_period); 933void ath9k_hw_beaconinit(struct ath_hw *ah, u32 next_beacon, u32 beacon_period);
933void ath9k_hw_set_sta_beacon_timers(struct ath_hw *ah, 934void ath9k_hw_set_sta_beacon_timers(struct ath_hw *ah,
diff --git a/drivers/net/wireless/ath/ath9k/reg.h b/drivers/net/wireless/ath/ath9k/reg.h
index 4df5659c6c16..264aea7919ee 100644
--- a/drivers/net/wireless/ath/ath9k/reg.h
+++ b/drivers/net/wireless/ath/ath9k/reg.h
@@ -1129,6 +1129,12 @@ enum {
1129#define AR_RTC_PLL_CLKSEL 0x00000300 1129#define AR_RTC_PLL_CLKSEL 0x00000300
1130#define AR_RTC_PLL_CLKSEL_S 8 1130#define AR_RTC_PLL_CLKSEL_S 8
1131 1131
1132#define PLL3 0x16188
1133#define PLL3_DO_MEAS_MASK 0x40000000
1134#define PLL4 0x1618c
1135#define PLL4_MEAS_DONE 0x8
1136#define SQSUM_DVC_MASK 0x007ffff8
1137
1132#define AR_RTC_RESET \ 1138#define AR_RTC_RESET \
1133 ((AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0040) : 0x7040) 1139 ((AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0040) : 0x7040)
1134#define AR_RTC_RESET_EN (0x00000001) 1140#define AR_RTC_RESET_EN (0x00000001)