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authorPaul Walmsley <paul@pwsan.com>2012-10-29 22:57:44 -0400
committerPaul Walmsley <paul@pwsan.com>2012-11-08 17:09:26 -0500
commitb13159afb46f8a528fcf30bac26c07dbb40a784a (patch)
treec838c9b8f3fb59c27b89569fe8d18863984b4349
parentd9a16f9ab9332b7cf1c95086a4efb98a0d13a57a (diff)
ARM: OMAP2+: PRCM: consolidate PRCM-related timeout macros
Consolidate all of the copies of MAX_MODULE_HARDRESET_WAIT and MAX_MODULE_SOFTRESET_WAIT into one place, arch/arm/mach-omap2/prm.h. Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
-rw-r--r--arch/arm/mach-omap2/display.c2
-rw-r--r--arch/arm/mach-omap2/hdq1w.c4
-rw-r--r--arch/arm/mach-omap2/i2c.c6
-rw-r--r--arch/arm/mach-omap2/msdi.c4
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c4
-rw-r--r--arch/arm/mach-omap2/prcm-common.h6
-rw-r--r--arch/arm/mach-omap2/prm.h17
-rw-r--r--arch/arm/mach-omap2/prm2xxx_3xxx.h7
-rw-r--r--arch/arm/mach-omap2/wd_timer.c5
9 files changed, 25 insertions, 30 deletions
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index 89c57129357a..38ba58c97628 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -35,6 +35,7 @@
35#include "mux.h" 35#include "mux.h"
36#include "control.h" 36#include "control.h"
37#include "display.h" 37#include "display.h"
38#include "prm.h"
38 39
39#define DISPC_CONTROL 0x0040 40#define DISPC_CONTROL 0x0040
40#define DISPC_CONTROL2 0x0238 41#define DISPC_CONTROL2 0x0238
@@ -512,7 +513,6 @@ static void dispc_disable_outputs(void)
512 } 513 }
513} 514}
514 515
515#define MAX_MODULE_SOFTRESET_WAIT 10000
516int omap_dss_reset(struct omap_hwmod *oh) 516int omap_dss_reset(struct omap_hwmod *oh)
517{ 517{
518 struct omap_hwmod_opt_clk *oc; 518 struct omap_hwmod_opt_clk *oc;
diff --git a/arch/arm/mach-omap2/hdq1w.c b/arch/arm/mach-omap2/hdq1w.c
index 3da8900598c8..ab7bf181a105 100644
--- a/arch/arm/mach-omap2/hdq1w.c
+++ b/arch/arm/mach-omap2/hdq1w.c
@@ -31,11 +31,9 @@
31#include "omap_device.h" 31#include "omap_device.h"
32#include "hdq1w.h" 32#include "hdq1w.h"
33 33
34#include "prm.h"
34#include "common.h" 35#include "common.h"
35 36
36/* Maximum microseconds to wait for OMAP module to softreset */
37#define MAX_MODULE_SOFTRESET_WAIT 10000
38
39/** 37/**
40 * omap_hdq1w_reset - reset the OMAP HDQ1W module 38 * omap_hdq1w_reset - reset the OMAP HDQ1W module
41 * @oh: struct omap_hwmod * 39 * @oh: struct omap_hwmod *
diff --git a/arch/arm/mach-omap2/i2c.c b/arch/arm/mach-omap2/i2c.c
index ad55b943108f..be092e8e5d85 100644
--- a/arch/arm/mach-omap2/i2c.c
+++ b/arch/arm/mach-omap2/i2c.c
@@ -20,10 +20,11 @@
20 */ 20 */
21 21
22#include "soc.h" 22#include "soc.h"
23#include "common.h"
24#include "omap_hwmod.h" 23#include "omap_hwmod.h"
25#include "omap_device.h" 24#include "omap_device.h"
26 25
26#include "prm.h"
27#include "common.h"
27#include "mux.h" 28#include "mux.h"
28#include "i2c.h" 29#include "i2c.h"
29 30
@@ -32,9 +33,6 @@
32#define OMAP2_I2C_CON_OFFSET 0x24 33#define OMAP2_I2C_CON_OFFSET 0x24
33#define OMAP4_I2C_CON_OFFSET 0xA4 34#define OMAP4_I2C_CON_OFFSET 0xA4
34 35
35/* Maximum microseconds to wait for OMAP module to softreset */
36#define MAX_MODULE_SOFTRESET_WAIT 10000
37
38#define MAX_OMAP_I2C_HWMOD_NAME_LEN 16 36#define MAX_OMAP_I2C_HWMOD_NAME_LEN 16
39 37
40static void __init omap2_i2c_mux_pins(int bus_id) 38static void __init omap2_i2c_mux_pins(int bus_id)
diff --git a/arch/arm/mach-omap2/msdi.c b/arch/arm/mach-omap2/msdi.c
index 627e97e30743..aafdd4ca9f4f 100644
--- a/arch/arm/mach-omap2/msdi.c
+++ b/arch/arm/mach-omap2/msdi.c
@@ -25,6 +25,7 @@
25#include <linux/err.h> 25#include <linux/err.h>
26#include <linux/platform_data/gpio-omap.h> 26#include <linux/platform_data/gpio-omap.h>
27 27
28#include "prm.h"
28#include "common.h" 29#include "common.h"
29#include "control.h" 30#include "control.h"
30#include "omap_hwmod.h" 31#include "omap_hwmod.h"
@@ -43,9 +44,6 @@
43#define MSDI_CON_CLKD_MASK (0x3f << 0) 44#define MSDI_CON_CLKD_MASK (0x3f << 0)
44#define MSDI_CON_CLKD_SHIFT 0 45#define MSDI_CON_CLKD_SHIFT 0
45 46
46/* Maximum microseconds to wait for OMAP module to softreset */
47#define MAX_MODULE_SOFTRESET_WAIT 10000
48
49/* MSDI_TARGET_RESET_CLKD: clock divisor to use throughout the reset */ 47/* MSDI_TARGET_RESET_CLKD: clock divisor to use throughout the reset */
50#define MSDI_TARGET_RESET_CLKD 0x3ff 48#define MSDI_TARGET_RESET_CLKD 0x3ff
51 49
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 37eeb45612f8..54b68121734c 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -151,6 +151,7 @@
151#include "cm3xxx.h" 151#include "cm3xxx.h"
152#include "cminst44xx.h" 152#include "cminst44xx.h"
153#include "cm33xx.h" 153#include "cm33xx.h"
154#include "prm.h"
154#include "prm3xxx.h" 155#include "prm3xxx.h"
155#include "prm44xx.h" 156#include "prm44xx.h"
156#include "prm33xx.h" 157#include "prm33xx.h"
@@ -158,9 +159,6 @@
158#include "mux.h" 159#include "mux.h"
159#include "pm.h" 160#include "pm.h"
160 161
161/* Maximum microseconds to wait for OMAP module to softreset */
162#define MAX_MODULE_SOFTRESET_WAIT 10000
163
164/* Name of the OMAP hwmod for the MPU */ 162/* Name of the OMAP hwmod for the MPU */
165#define MPU_INITIATOR_NAME "mpu" 163#define MPU_INITIATOR_NAME "mpu"
166 164
diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h
index b25a32a5e548..c7d355fafd24 100644
--- a/arch/arm/mach-omap2/prcm-common.h
+++ b/arch/arm/mach-omap2/prcm-common.h
@@ -406,11 +406,6 @@
406#define OMAP3430_EN_CORE_MASK (1 << 0) 406#define OMAP3430_EN_CORE_MASK (1 << 0)
407 407
408 408
409/*
410 * MAX_MODULE_HARDRESET_WAIT: Maximum microseconds to wait for an OMAP
411 * submodule to exit hardreset
412 */
413#define MAX_MODULE_HARDRESET_WAIT 10000
414 409
415/* 410/*
416 * Maximum time(us) it takes to output the signal WUCLKOUT of the last 411 * Maximum time(us) it takes to output the signal WUCLKOUT of the last
@@ -419,7 +414,6 @@
419 * microseconds on OMAP4, so this timeout may be too high. 414 * microseconds on OMAP4, so this timeout may be too high.
420 */ 415 */
421#define MAX_IOPAD_LATCH_TIME 100 416#define MAX_IOPAD_LATCH_TIME 100
422
423# ifndef __ASSEMBLER__ 417# ifndef __ASSEMBLER__
424 418
425/** 419/**
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index fb7dee29ce76..a1a266ce90da 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -20,6 +20,23 @@ extern void __iomem *prm_base;
20extern void omap2_set_globals_prm(void __iomem *prm); 20extern void omap2_set_globals_prm(void __iomem *prm);
21# endif 21# endif
22 22
23
24/*
25 * MAX_MODULE_SOFTRESET_WAIT: Maximum microseconds to wait for OMAP
26 * module to softreset
27 */
28#define MAX_MODULE_SOFTRESET_WAIT 10000
29
30/*
31 * MAX_MODULE_HARDRESET_WAIT: Maximum microseconds to wait for an OMAP
32 * submodule to exit hardreset
33 */
34#define MAX_MODULE_HARDRESET_WAIT 10000
35
36/*
37 * Register bitfields
38 */
39
23/* 40/*
24 * 24XX: PM_PWSTST_CORE, PM_PWSTST_GFX, PM_PWSTST_MPU, PM_PWSTST_DSP 41 * 24XX: PM_PWSTST_CORE, PM_PWSTST_GFX, PM_PWSTST_MPU, PM_PWSTST_DSP
25 * 42 *
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h
index 3330b1bf789d..78532d6fecd7 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.h
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h
@@ -241,11 +241,4 @@ extern int omap2_clkdm_clear_all_wkdeps(struct clockdomain *clkdm);
241#define OMAP_LOGICRETSTATE_MASK (1 << 2) 241#define OMAP_LOGICRETSTATE_MASK (1 << 2)
242 242
243 243
244/*
245 * MAX_MODULE_HARDRESET_WAIT: Maximum microseconds to wait for an OMAP
246 * submodule to exit hardreset
247 */
248#define MAX_MODULE_HARDRESET_WAIT 10000
249
250
251#endif 244#endif
diff --git a/arch/arm/mach-omap2/wd_timer.c b/arch/arm/mach-omap2/wd_timer.c
index 5a8629ff0ab0..7c2b4ed38f02 100644
--- a/arch/arm/mach-omap2/wd_timer.c
+++ b/arch/arm/mach-omap2/wd_timer.c
@@ -1,6 +1,8 @@
1/* 1/*
2 * OMAP2+ MPU WD_TIMER-specific code 2 * OMAP2+ MPU WD_TIMER-specific code
3 * 3 *
4 * Copyright (C) 2012 Texas Instruments, Inc.
5 *
4 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or 8 * the Free Software Foundation; either version 2 of the License, or
@@ -30,9 +32,6 @@
30#define OMAP_WDT_WPS 0x34 32#define OMAP_WDT_WPS 0x34
31#define OMAP_WDT_SPR 0x48 33#define OMAP_WDT_SPR 0x48
32 34
33/* Maximum microseconds to wait for OMAP module to softreset */
34#define MAX_MODULE_SOFTRESET_WAIT 10000
35
36int omap2_wd_timer_disable(struct omap_hwmod *oh) 35int omap2_wd_timer_disable(struct omap_hwmod *oh)
37{ 36{
38 void __iomem *base; 37 void __iomem *base;