diff options
| author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2009-04-30 09:48:36 -0400 |
|---|---|---|
| committer | Samuel Ortiz <samuel@sortiz.org> | 2009-05-19 16:22:28 -0400 |
| commit | b126d113484886d900179b4ae55ea7fabe15f936 (patch) | |
| tree | 9499c97c8394a117e99910fd4d165d03150bcb7f | |
| parent | 279e677faa775ad16e75c32e1bf4a37f8158bc61 (diff) | |
mfd: Keep a cache of WM8350 volatile values
Due to the way that the WM8350 audio driver handles CODEC_ENA many of
the WM8350 audio registers are marked as volatile when they aren't
actually so. Allow the audio driver to see a cache of these values for
inspection during interrupt context.
To do this we need to stop satisfying any bits from volatile registers
from cache - there's no real benefit from doing so anyway, we did the
read already.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
| -rw-r--r-- | drivers/mfd/wm8350-core.c | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/drivers/mfd/wm8350-core.c b/drivers/mfd/wm8350-core.c index c2be3088e2e1..fe24079387c5 100644 --- a/drivers/mfd/wm8350-core.c +++ b/drivers/mfd/wm8350-core.c | |||
| @@ -79,10 +79,6 @@ static int wm8350_phys_read(struct wm8350 *wm8350, u8 reg, int num_regs, | |||
| 79 | /* Cache is CPU endian */ | 79 | /* Cache is CPU endian */ |
| 80 | dest[i - reg] = be16_to_cpu(dest[i - reg]); | 80 | dest[i - reg] = be16_to_cpu(dest[i - reg]); |
| 81 | 81 | ||
| 82 | /* Satisfy non-volatile bits from cache */ | ||
| 83 | dest[i - reg] &= wm8350_reg_io_map[i].vol; | ||
| 84 | dest[i - reg] |= wm8350->reg_cache[i]; | ||
| 85 | |||
| 86 | /* Mask out non-readable bits */ | 82 | /* Mask out non-readable bits */ |
| 87 | dest[i - reg] &= wm8350_reg_io_map[i].readable; | 83 | dest[i - reg] &= wm8350_reg_io_map[i].readable; |
| 88 | } | 84 | } |
| @@ -182,9 +178,6 @@ static int wm8350_write(struct wm8350 *wm8350, u8 reg, int num_regs, u16 *src) | |||
| 182 | (wm8350->reg_cache[i] & ~wm8350_reg_io_map[i].writable) | 178 | (wm8350->reg_cache[i] & ~wm8350_reg_io_map[i].writable) |
| 183 | | src[i - reg]; | 179 | | src[i - reg]; |
| 184 | 180 | ||
| 185 | /* Don't store volatile bits */ | ||
| 186 | wm8350->reg_cache[i] &= ~wm8350_reg_io_map[i].vol; | ||
| 187 | |||
| 188 | src[i - reg] = cpu_to_be16(src[i - reg]); | 181 | src[i - reg] = cpu_to_be16(src[i - reg]); |
| 189 | } | 182 | } |
| 190 | 183 | ||
| @@ -1261,7 +1254,6 @@ static int wm8350_create_cache(struct wm8350 *wm8350, int type, int mode) | |||
| 1261 | (i < WM8350_CLOCK_CONTROL_1 || i > WM8350_AIF_TEST)) { | 1254 | (i < WM8350_CLOCK_CONTROL_1 || i > WM8350_AIF_TEST)) { |
| 1262 | value = be16_to_cpu(wm8350->reg_cache[i]); | 1255 | value = be16_to_cpu(wm8350->reg_cache[i]); |
| 1263 | value &= wm8350_reg_io_map[i].readable; | 1256 | value &= wm8350_reg_io_map[i].readable; |
| 1264 | value &= ~wm8350_reg_io_map[i].vol; | ||
| 1265 | wm8350->reg_cache[i] = value; | 1257 | wm8350->reg_cache[i] = value; |
| 1266 | } else | 1258 | } else |
| 1267 | wm8350->reg_cache[i] = reg_map[i]; | 1259 | wm8350->reg_cache[i] = reg_map[i]; |
