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authorIdo Yariv <ido@wizery.com>2012-06-19 17:48:23 -0400
committerLuciano Coelho <coelho@ti.com>2012-06-22 03:49:44 -0400
commitb0f0ad39e3d2716fe9ca6e50ce4cda87eb409ee0 (patch)
tree08e84e24d5ff77eced2eabc23d648c4240fe14f1
parent6134323f42b0dbae8e8206414d26cb167b9bedfc (diff)
wlcore: Propagate errors from wl1271_raw_write32
Propagate errors from wl1271_raw_write32 and request for recovery when appropriate. Also rename prefixes of wlcore functions which their prototypes had to be changed. Signed-off-by: Ido Yariv <ido@wizery.com> Signed-off-by: Luciano Coelho <coelho@ti.com>
-rw-r--r--drivers/net/wireless/ti/wl12xx/main.c160
-rw-r--r--drivers/net/wireless/ti/wl18xx/io.c4
-rw-r--r--drivers/net/wireless/ti/wl18xx/main.c86
-rw-r--r--drivers/net/wireless/ti/wlcore/boot.c32
-rw-r--r--drivers/net/wireless/ti/wlcore/cmd.c6
-rw-r--r--drivers/net/wireless/ti/wlcore/event.c4
-rw-r--r--drivers/net/wireless/ti/wlcore/io.c49
-rw-r--r--drivers/net/wireless/ti/wlcore/io.h22
-rw-r--r--drivers/net/wireless/ti/wlcore/main.c20
-rw-r--r--drivers/net/wireless/ti/wlcore/ps.c14
-rw-r--r--drivers/net/wireless/ti/wlcore/rx.c9
-rw-r--r--drivers/net/wireless/ti/wlcore/tx.c17
-rw-r--r--drivers/net/wireless/ti/wlcore/wlcore.h2
13 files changed, 298 insertions, 127 deletions
diff --git a/drivers/net/wireless/ti/wl12xx/main.c b/drivers/net/wireless/ti/wl12xx/main.c
index ab486f71eee4..3a4ab65db0ec 100644
--- a/drivers/net/wireless/ti/wl12xx/main.c
+++ b/drivers/net/wireless/ti/wl12xx/main.c
@@ -688,17 +688,28 @@ out:
688 return ret; 688 return ret;
689} 689}
690 690
691static void wl12xx_top_reg_write(struct wl1271 *wl, int addr, u16 val) 691static int wl12xx_top_reg_write(struct wl1271 *wl, int addr, u16 val)
692{ 692{
693 int ret;
694
693 /* write address >> 1 + 0x30000 to OCP_POR_CTR */ 695 /* write address >> 1 + 0x30000 to OCP_POR_CTR */
694 addr = (addr >> 1) + 0x30000; 696 addr = (addr >> 1) + 0x30000;
695 wl1271_write32(wl, WL12XX_OCP_POR_CTR, addr); 697 ret = wlcore_write32(wl, WL12XX_OCP_POR_CTR, addr);
698 if (ret < 0)
699 goto out;
696 700
697 /* write value to OCP_POR_WDATA */ 701 /* write value to OCP_POR_WDATA */
698 wl1271_write32(wl, WL12XX_OCP_DATA_WRITE, val); 702 ret = wlcore_write32(wl, WL12XX_OCP_DATA_WRITE, val);
703 if (ret < 0)
704 goto out;
699 705
700 /* write 1 to OCP_CMD */ 706 /* write 1 to OCP_CMD */
701 wl1271_write32(wl, WL12XX_OCP_CMD, OCP_CMD_WRITE); 707 ret = wlcore_write32(wl, WL12XX_OCP_CMD, OCP_CMD_WRITE);
708 if (ret < 0)
709 goto out;
710
711out:
712 return ret;
702} 713}
703 714
704static int wl12xx_top_reg_read(struct wl1271 *wl, int addr, u16 *out) 715static int wl12xx_top_reg_read(struct wl1271 *wl, int addr, u16 *out)
@@ -709,10 +720,14 @@ static int wl12xx_top_reg_read(struct wl1271 *wl, int addr, u16 *out)
709 720
710 /* write address >> 1 + 0x30000 to OCP_POR_CTR */ 721 /* write address >> 1 + 0x30000 to OCP_POR_CTR */
711 addr = (addr >> 1) + 0x30000; 722 addr = (addr >> 1) + 0x30000;
712 wl1271_write32(wl, WL12XX_OCP_POR_CTR, addr); 723 ret = wlcore_write32(wl, WL12XX_OCP_POR_CTR, addr);
724 if (ret < 0)
725 return ret;
713 726
714 /* write 2 to OCP_CMD */ 727 /* write 2 to OCP_CMD */
715 wl1271_write32(wl, WL12XX_OCP_CMD, OCP_CMD_READ); 728 ret = wlcore_write32(wl, WL12XX_OCP_CMD, OCP_CMD_READ);
729 if (ret < 0)
730 return ret;
716 731
717 /* poll for data ready */ 732 /* poll for data ready */
718 do { 733 do {
@@ -751,11 +766,15 @@ static int wl128x_switch_tcxo_to_fref(struct wl1271 *wl)
751 if (spare_reg == 0xFFFF) 766 if (spare_reg == 0xFFFF)
752 return -EFAULT; 767 return -EFAULT;
753 spare_reg |= (BIT(3) | BIT(5) | BIT(6)); 768 spare_reg |= (BIT(3) | BIT(5) | BIT(6));
754 wl12xx_top_reg_write(wl, WL_SPARE_REG, spare_reg); 769 ret = wl12xx_top_reg_write(wl, WL_SPARE_REG, spare_reg);
770 if (ret < 0)
771 return ret;
755 772
756 /* Enable FREF_CLK_REQ & mux MCS and coex PLLs to FREF */ 773 /* Enable FREF_CLK_REQ & mux MCS and coex PLLs to FREF */
757 wl12xx_top_reg_write(wl, SYS_CLK_CFG_REG, 774 ret = wl12xx_top_reg_write(wl, SYS_CLK_CFG_REG,
758 WL_CLK_REQ_TYPE_PG2 | MCS_PLL_CLK_SEL_FREF); 775 WL_CLK_REQ_TYPE_PG2 | MCS_PLL_CLK_SEL_FREF);
776 if (ret < 0)
777 return ret;
759 778
760 /* Delay execution for 15msec, to let the HW settle */ 779 /* Delay execution for 15msec, to let the HW settle */
761 mdelay(15); 780 mdelay(15);
@@ -795,11 +814,21 @@ static bool wl128x_is_fref_valid(struct wl1271 *wl)
795 814
796static int wl128x_manually_configure_mcs_pll(struct wl1271 *wl) 815static int wl128x_manually_configure_mcs_pll(struct wl1271 *wl)
797{ 816{
798 wl12xx_top_reg_write(wl, MCS_PLL_M_REG, MCS_PLL_M_REG_VAL); 817 int ret;
799 wl12xx_top_reg_write(wl, MCS_PLL_N_REG, MCS_PLL_N_REG_VAL);
800 wl12xx_top_reg_write(wl, MCS_PLL_CONFIG_REG, MCS_PLL_CONFIG_REG_VAL);
801 818
802 return 0; 819 ret = wl12xx_top_reg_write(wl, MCS_PLL_M_REG, MCS_PLL_M_REG_VAL);
820 if (ret < 0)
821 goto out;
822
823 ret = wl12xx_top_reg_write(wl, MCS_PLL_N_REG, MCS_PLL_N_REG_VAL);
824 if (ret < 0)
825 goto out;
826
827 ret = wl12xx_top_reg_write(wl, MCS_PLL_CONFIG_REG,
828 MCS_PLL_CONFIG_REG_VAL);
829
830out:
831 return ret;
803} 832}
804 833
805static int wl128x_configure_mcs_pll(struct wl1271 *wl, int clk) 834static int wl128x_configure_mcs_pll(struct wl1271 *wl, int clk)
@@ -818,7 +847,9 @@ static int wl128x_configure_mcs_pll(struct wl1271 *wl, int clk)
818 if (spare_reg == 0xFFFF) 847 if (spare_reg == 0xFFFF)
819 return -EFAULT; 848 return -EFAULT;
820 spare_reg |= BIT(2); 849 spare_reg |= BIT(2);
821 wl12xx_top_reg_write(wl, WL_SPARE_REG, spare_reg); 850 ret = wl12xx_top_reg_write(wl, WL_SPARE_REG, spare_reg);
851 if (ret < 0)
852 return ret;
822 853
823 /* Handle special cases of the TCXO clock */ 854 /* Handle special cases of the TCXO clock */
824 if (priv->tcxo_clock == WL12XX_TCXOCLOCK_16_8 || 855 if (priv->tcxo_clock == WL12XX_TCXOCLOCK_16_8 ||
@@ -836,9 +867,9 @@ static int wl128x_configure_mcs_pll(struct wl1271 *wl, int clk)
836 return -EFAULT; 867 return -EFAULT;
837 pll_config |= (input_freq << MCS_SEL_IN_FREQ_SHIFT); 868 pll_config |= (input_freq << MCS_SEL_IN_FREQ_SHIFT);
838 pll_config |= MCS_PLL_ENABLE_HP; 869 pll_config |= MCS_PLL_ENABLE_HP;
839 wl12xx_top_reg_write(wl, MCS_PLL_CONFIG_REG, pll_config); 870 ret = wl12xx_top_reg_write(wl, MCS_PLL_CONFIG_REG, pll_config);
840 871
841 return 0; 872 return ret;
842} 873}
843 874
844/* 875/*
@@ -927,7 +958,9 @@ static int wl127x_boot_clk(struct wl1271 *wl)
927 goto out; 958 goto out;
928 959
929 val &= FREF_CLK_TYPE_BITS; 960 val &= FREF_CLK_TYPE_BITS;
930 wl12xx_top_reg_write(wl, OCP_REG_CLK_TYPE, val); 961 ret = wl12xx_top_reg_write(wl, OCP_REG_CLK_TYPE, val);
962 if (ret < 0)
963 goto out;
931 964
932 /* Set clock pull mode (no pull) */ 965 /* Set clock pull mode (no pull) */
933 ret = wl12xx_top_reg_read(wl, OCP_REG_CLK_PULL, &val); 966 ret = wl12xx_top_reg_read(wl, OCP_REG_CLK_PULL, &val);
@@ -935,7 +968,9 @@ static int wl127x_boot_clk(struct wl1271 *wl)
935 goto out; 968 goto out;
936 969
937 val |= NO_PULL; 970 val |= NO_PULL;
938 wl12xx_top_reg_write(wl, OCP_REG_CLK_PULL, val); 971 ret = wl12xx_top_reg_write(wl, OCP_REG_CLK_PULL, val);
972 if (ret < 0)
973 goto out;
939 } else { 974 } else {
940 u16 val; 975 u16 val;
941 /* Set clock polarity */ 976 /* Set clock polarity */
@@ -945,10 +980,14 @@ static int wl127x_boot_clk(struct wl1271 *wl)
945 980
946 val &= FREF_CLK_POLARITY_BITS; 981 val &= FREF_CLK_POLARITY_BITS;
947 val |= CLK_REQ_OUTN_SEL; 982 val |= CLK_REQ_OUTN_SEL;
948 wl12xx_top_reg_write(wl, OCP_REG_CLK_POLARITY, val); 983 ret = wl12xx_top_reg_write(wl, OCP_REG_CLK_POLARITY, val);
984 if (ret < 0)
985 goto out;
949 } 986 }
950 987
951 wl1271_write32(wl, WL12XX_PLL_PARAMETERS, clk); 988 ret = wlcore_write32(wl, WL12XX_PLL_PARAMETERS, clk);
989 if (ret < 0)
990 goto out;
952 991
953 ret = wlcore_read32(wl, WL12XX_PLL_PARAMETERS, &pause); 992 ret = wlcore_read32(wl, WL12XX_PLL_PARAMETERS, &pause);
954 if (ret < 0) 993 if (ret < 0)
@@ -958,7 +997,7 @@ static int wl127x_boot_clk(struct wl1271 *wl)
958 997
959 pause &= ~(WU_COUNTER_PAUSE_VAL); 998 pause &= ~(WU_COUNTER_PAUSE_VAL);
960 pause |= WU_COUNTER_PAUSE_VAL; 999 pause |= WU_COUNTER_PAUSE_VAL;
961 wl1271_write32(wl, WL12XX_WU_COUNTER_PAUSE, pause); 1000 ret = wlcore_write32(wl, WL12XX_WU_COUNTER_PAUSE, pause);
962 1001
963out: 1002out:
964 return ret; 1003 return ret;
@@ -971,7 +1010,9 @@ static int wl1271_boot_soft_reset(struct wl1271 *wl)
971 int ret = 0; 1010 int ret = 0;
972 1011
973 /* perform soft reset */ 1012 /* perform soft reset */
974 wl1271_write32(wl, WL12XX_SLV_SOFT_RESET, ACX_SLV_SOFT_RESET_BIT); 1013 ret = wlcore_write32(wl, WL12XX_SLV_SOFT_RESET, ACX_SLV_SOFT_RESET_BIT);
1014 if (ret < 0)
1015 goto out;
975 1016
976 /* SOFT_RESET is self clearing */ 1017 /* SOFT_RESET is self clearing */
977 timeout = jiffies + usecs_to_jiffies(SOFT_RESET_MAX_TIME); 1018 timeout = jiffies + usecs_to_jiffies(SOFT_RESET_MAX_TIME);
@@ -995,10 +1036,12 @@ static int wl1271_boot_soft_reset(struct wl1271 *wl)
995 } 1036 }
996 1037
997 /* disable Rx/Tx */ 1038 /* disable Rx/Tx */
998 wl1271_write32(wl, WL12XX_ENABLE, 0x0); 1039 ret = wlcore_write32(wl, WL12XX_ENABLE, 0x0);
1040 if (ret < 0)
1041 goto out;
999 1042
1000 /* disable auto calibration on start*/ 1043 /* disable auto calibration on start*/
1001 wl1271_write32(wl, WL12XX_SPARE_A2, 0xffff); 1044 ret = wlcore_write32(wl, WL12XX_SPARE_A2, 0xffff);
1002 1045
1003out: 1046out:
1004 return ret; 1047 return ret;
@@ -1022,10 +1065,15 @@ static int wl12xx_pre_boot(struct wl1271 *wl)
1022 } 1065 }
1023 1066
1024 /* Continue the ELP wake up sequence */ 1067 /* Continue the ELP wake up sequence */
1025 wl1271_write32(wl, WL12XX_WELP_ARM_COMMAND, WELP_ARM_COMMAND_VAL); 1068 ret = wlcore_write32(wl, WL12XX_WELP_ARM_COMMAND, WELP_ARM_COMMAND_VAL);
1069 if (ret < 0)
1070 goto out;
1071
1026 udelay(500); 1072 udelay(500);
1027 1073
1028 wlcore_set_partition(wl, &wl->ptable[PART_DRPW]); 1074 ret = wlcore_set_partition(wl, &wl->ptable[PART_DRPW]);
1075 if (ret < 0)
1076 goto out;
1029 1077
1030 /* Read-modify-write DRPW_SCRATCH_START register (see next state) 1078 /* Read-modify-write DRPW_SCRATCH_START register (see next state)
1031 to be used by DRPw FW. The RTRIM value will be added by the FW 1079 to be used by DRPw FW. The RTRIM value will be added by the FW
@@ -1042,12 +1090,18 @@ static int wl12xx_pre_boot(struct wl1271 *wl)
1042 else 1090 else
1043 clk |= (priv->ref_clock << 1) << 4; 1091 clk |= (priv->ref_clock << 1) << 4;
1044 1092
1045 wl1271_write32(wl, WL12XX_DRPW_SCRATCH_START, clk); 1093 ret = wlcore_write32(wl, WL12XX_DRPW_SCRATCH_START, clk);
1094 if (ret < 0)
1095 goto out;
1046 1096
1047 wlcore_set_partition(wl, &wl->ptable[PART_WORK]); 1097 ret = wlcore_set_partition(wl, &wl->ptable[PART_WORK]);
1098 if (ret < 0)
1099 goto out;
1048 1100
1049 /* Disable interrupts */ 1101 /* Disable interrupts */
1050 wlcore_write_reg(wl, REG_INTERRUPT_MASK, WL1271_ACX_INTR_ALL); 1102 ret = wlcore_write_reg(wl, REG_INTERRUPT_MASK, WL1271_ACX_INTR_ALL);
1103 if (ret < 0)
1104 goto out;
1051 1105
1052 ret = wl1271_boot_soft_reset(wl); 1106 ret = wl1271_boot_soft_reset(wl);
1053 if (ret < 0) 1107 if (ret < 0)
@@ -1067,7 +1121,9 @@ static int wl12xx_pre_upload(struct wl1271 *wl)
1067 * ACX_EEPROMLESS_IND_REG */ 1121 * ACX_EEPROMLESS_IND_REG */
1068 wl1271_debug(DEBUG_BOOT, "ACX_EEPROMLESS_IND_REG"); 1122 wl1271_debug(DEBUG_BOOT, "ACX_EEPROMLESS_IND_REG");
1069 1123
1070 wl1271_write32(wl, WL12XX_EEPROMLESS_IND, WL12XX_EEPROMLESS_IND); 1124 ret = wlcore_write32(wl, WL12XX_EEPROMLESS_IND, WL12XX_EEPROMLESS_IND);
1125 if (ret < 0)
1126 goto out;
1071 1127
1072 ret = wlcore_read_reg(wl, REG_CHIP_ID_B, &tmp); 1128 ret = wlcore_read_reg(wl, REG_CHIP_ID_B, &tmp);
1073 if (ret < 0) 1129 if (ret < 0)
@@ -1083,8 +1139,11 @@ static int wl12xx_pre_upload(struct wl1271 *wl)
1083 /* WL1271: The reference driver skips steps 7 to 10 (jumps directly 1139 /* WL1271: The reference driver skips steps 7 to 10 (jumps directly
1084 * to upload_fw) */ 1140 * to upload_fw) */
1085 1141
1086 if (wl->chip.id == CHIP_ID_1283_PG20) 1142 if (wl->chip.id == CHIP_ID_1283_PG20) {
1087 wl12xx_top_reg_write(wl, SDIO_IO_DS, HCI_IO_DS_6MA); 1143 ret = wl12xx_top_reg_write(wl, SDIO_IO_DS, HCI_IO_DS_6MA);
1144 if (ret < 0)
1145 goto out;
1146 }
1088 1147
1089 /* polarity must be set before the firmware is loaded */ 1148 /* polarity must be set before the firmware is loaded */
1090 ret = wl12xx_top_reg_read(wl, OCP_REG_POLARITY, &polarity); 1149 ret = wl12xx_top_reg_read(wl, OCP_REG_POLARITY, &polarity);
@@ -1093,21 +1152,31 @@ static int wl12xx_pre_upload(struct wl1271 *wl)
1093 1152
1094 /* We use HIGH polarity, so unset the LOW bit */ 1153 /* We use HIGH polarity, so unset the LOW bit */
1095 polarity &= ~POLARITY_LOW; 1154 polarity &= ~POLARITY_LOW;
1096 wl12xx_top_reg_write(wl, OCP_REG_POLARITY, polarity); 1155 ret = wl12xx_top_reg_write(wl, OCP_REG_POLARITY, polarity);
1097 1156
1098out: 1157out:
1099 return ret; 1158 return ret;
1100} 1159}
1101 1160
1102static void wl12xx_enable_interrupts(struct wl1271 *wl) 1161static int wl12xx_enable_interrupts(struct wl1271 *wl)
1103{ 1162{
1104 wlcore_write_reg(wl, REG_INTERRUPT_MASK, WL12XX_ACX_ALL_EVENTS_VECTOR); 1163 int ret;
1164
1165 ret = wlcore_write_reg(wl, REG_INTERRUPT_MASK,
1166 WL12XX_ACX_ALL_EVENTS_VECTOR);
1167 if (ret < 0)
1168 goto out;
1105 1169
1106 wlcore_enable_interrupts(wl); 1170 wlcore_enable_interrupts(wl);
1107 wlcore_write_reg(wl, REG_INTERRUPT_MASK, 1171 ret = wlcore_write_reg(wl, REG_INTERRUPT_MASK,
1108 WL1271_ACX_INTR_ALL & ~(WL12XX_INTR_MASK)); 1172 WL1271_ACX_INTR_ALL & ~(WL12XX_INTR_MASK));
1173 if (ret < 0)
1174 goto out;
1175
1176 ret = wlcore_write32(wl, WL12XX_HI_CFG, HI_CFG_DEF_VAL);
1109 1177
1110 wl1271_write32(wl, WL12XX_HI_CFG, HI_CFG_DEF_VAL); 1178out:
1179 return ret;
1111} 1180}
1112 1181
1113static int wl12xx_boot(struct wl1271 *wl) 1182static int wl12xx_boot(struct wl1271 *wl)
@@ -1134,7 +1203,7 @@ static int wl12xx_boot(struct wl1271 *wl)
1134 if (ret < 0) 1203 if (ret < 0)
1135 goto out; 1204 goto out;
1136 1205
1137 wl12xx_enable_interrupts(wl); 1206 ret = wl12xx_enable_interrupts(wl);
1138 1207
1139out: 1208out:
1140 return ret; 1209 return ret;
@@ -1149,14 +1218,15 @@ static int wl12xx_trigger_cmd(struct wl1271 *wl, int cmd_box_addr,
1149 if (ret < 0) 1218 if (ret < 0)
1150 return ret; 1219 return ret;
1151 1220
1152 wlcore_write_reg(wl, REG_INTERRUPT_TRIG, WL12XX_INTR_TRIG_CMD); 1221 ret = wlcore_write_reg(wl, REG_INTERRUPT_TRIG, WL12XX_INTR_TRIG_CMD);
1153 1222
1154 return ret; 1223 return ret;
1155} 1224}
1156 1225
1157static void wl12xx_ack_event(struct wl1271 *wl) 1226static int wl12xx_ack_event(struct wl1271 *wl)
1158{ 1227{
1159 wlcore_write_reg(wl, REG_INTERRUPT_TRIG, WL12XX_INTR_TRIG_EVENT_ACK); 1228 return wlcore_write_reg(wl, REG_INTERRUPT_TRIG,
1229 WL12XX_INTR_TRIG_EVENT_ACK);
1160} 1230}
1161 1231
1162static u32 wl12xx_calc_tx_blocks(struct wl1271 *wl, u32 len, u32 spare_blks) 1232static u32 wl12xx_calc_tx_blocks(struct wl1271 *wl, u32 len, u32 spare_blks)
@@ -1348,7 +1418,9 @@ static int wl12xx_get_fuse_mac(struct wl1271 *wl)
1348 u32 mac1, mac2; 1418 u32 mac1, mac2;
1349 int ret; 1419 int ret;
1350 1420
1351 wlcore_set_partition(wl, &wl->ptable[PART_DRPW]); 1421 ret = wlcore_set_partition(wl, &wl->ptable[PART_DRPW]);
1422 if (ret < 0)
1423 goto out;
1352 1424
1353 ret = wlcore_read32(wl, WL12XX_REG_FUSE_BD_ADDR_1, &mac1); 1425 ret = wlcore_read32(wl, WL12XX_REG_FUSE_BD_ADDR_1, &mac1);
1354 if (ret < 0) 1426 if (ret < 0)
@@ -1363,7 +1435,7 @@ static int wl12xx_get_fuse_mac(struct wl1271 *wl)
1363 ((mac1 & 0xff000000) >> 24); 1435 ((mac1 & 0xff000000) >> 24);
1364 wl->fuse_nic_addr = mac1 & 0xffffff; 1436 wl->fuse_nic_addr = mac1 & 0xffffff;
1365 1437
1366 wlcore_set_partition(wl, &wl->ptable[PART_DOWN]); 1438 ret = wlcore_set_partition(wl, &wl->ptable[PART_DOWN]);
1367 1439
1368out: 1440out:
1369 return ret; 1441 return ret;
diff --git a/drivers/net/wireless/ti/wl18xx/io.c b/drivers/net/wireless/ti/wl18xx/io.c
index 92c2c03e4cd8..0c06ccfd1b8c 100644
--- a/drivers/net/wireless/ti/wl18xx/io.c
+++ b/drivers/net/wireless/ti/wl18xx/io.c
@@ -38,14 +38,14 @@ int wl18xx_top_reg_write(struct wl1271 *wl, int addr, u16 val)
38 goto out; 38 goto out;
39 39
40 tmp = (tmp & 0xffff0000) | val; 40 tmp = (tmp & 0xffff0000) | val;
41 wl1271_write32(wl, addr, tmp); 41 ret = wlcore_write32(wl, addr, tmp);
42 } else { 42 } else {
43 ret = wlcore_read32(wl, addr - 2, &tmp); 43 ret = wlcore_read32(wl, addr - 2, &tmp);
44 if (ret < 0) 44 if (ret < 0)
45 goto out; 45 goto out;
46 46
47 tmp = (tmp & 0xffff) | (val << 16); 47 tmp = (tmp & 0xffff) | (val << 16);
48 wl1271_write32(wl, addr - 2, tmp); 48 ret = wlcore_write32(wl, addr - 2, tmp);
49 } 49 }
50 50
51out: 51out:
diff --git a/drivers/net/wireless/ti/wl18xx/main.c b/drivers/net/wireless/ti/wl18xx/main.c
index f99f003ab182..c25b960faa29 100644
--- a/drivers/net/wireless/ti/wl18xx/main.c
+++ b/drivers/net/wireless/ti/wl18xx/main.c
@@ -641,7 +641,9 @@ static int wl18xx_set_clk(struct wl1271 *wl)
641 u16 clk_freq; 641 u16 clk_freq;
642 int ret; 642 int ret;
643 643
644 wlcore_set_partition(wl, &wl->ptable[PART_TOP_PRCM_ELP_SOC]); 644 ret = wlcore_set_partition(wl, &wl->ptable[PART_TOP_PRCM_ELP_SOC]);
645 if (ret < 0)
646 goto out;
645 647
646 /* TODO: PG2: apparently we need to read the clk type */ 648 /* TODO: PG2: apparently we need to read the clk type */
647 649
@@ -699,13 +701,20 @@ out:
699 return ret; 701 return ret;
700} 702}
701 703
702static void wl18xx_boot_soft_reset(struct wl1271 *wl) 704static int wl18xx_boot_soft_reset(struct wl1271 *wl)
703{ 705{
706 int ret;
707
704 /* disable Rx/Tx */ 708 /* disable Rx/Tx */
705 wl1271_write32(wl, WL18XX_ENABLE, 0x0); 709 ret = wlcore_write32(wl, WL18XX_ENABLE, 0x0);
710 if (ret < 0)
711 goto out;
706 712
707 /* disable auto calibration on start*/ 713 /* disable auto calibration on start*/
708 wl1271_write32(wl, WL18XX_SPARE_A2, 0xffff); 714 ret = wlcore_write32(wl, WL18XX_SPARE_A2, 0xffff);
715
716out:
717 return ret;
709} 718}
710 719
711static int wl18xx_pre_boot(struct wl1271 *wl) 720static int wl18xx_pre_boot(struct wl1271 *wl)
@@ -717,15 +726,22 @@ static int wl18xx_pre_boot(struct wl1271 *wl)
717 goto out; 726 goto out;
718 727
719 /* Continue the ELP wake up sequence */ 728 /* Continue the ELP wake up sequence */
720 wl1271_write32(wl, WL18XX_WELP_ARM_COMMAND, WELP_ARM_COMMAND_VAL); 729 ret = wlcore_write32(wl, WL18XX_WELP_ARM_COMMAND, WELP_ARM_COMMAND_VAL);
730 if (ret < 0)
731 goto out;
732
721 udelay(500); 733 udelay(500);
722 734
723 wlcore_set_partition(wl, &wl->ptable[PART_BOOT]); 735 ret = wlcore_set_partition(wl, &wl->ptable[PART_BOOT]);
736 if (ret < 0)
737 goto out;
724 738
725 /* Disable interrupts */ 739 /* Disable interrupts */
726 wlcore_write_reg(wl, REG_INTERRUPT_MASK, WL1271_ACX_INTR_ALL); 740 ret = wlcore_write_reg(wl, REG_INTERRUPT_MASK, WL1271_ACX_INTR_ALL);
741 if (ret < 0)
742 goto out;
727 743
728 wl18xx_boot_soft_reset(wl); 744 ret = wl18xx_boot_soft_reset(wl);
729 745
730out: 746out:
731 return ret; 747 return ret;
@@ -736,10 +752,14 @@ static int wl18xx_pre_upload(struct wl1271 *wl)
736 u32 tmp; 752 u32 tmp;
737 int ret; 753 int ret;
738 754
739 wlcore_set_partition(wl, &wl->ptable[PART_BOOT]); 755 ret = wlcore_set_partition(wl, &wl->ptable[PART_BOOT]);
756 if (ret < 0)
757 goto out;
740 758
741 /* TODO: check if this is all needed */ 759 /* TODO: check if this is all needed */
742 wl1271_write32(wl, WL18XX_EEPROMLESS_IND, WL18XX_EEPROMLESS_IND); 760 ret = wlcore_write32(wl, WL18XX_EEPROMLESS_IND, WL18XX_EEPROMLESS_IND);
761 if (ret < 0)
762 goto out;
743 763
744 ret = wlcore_read_reg(wl, REG_CHIP_ID_B, &tmp); 764 ret = wlcore_read_reg(wl, REG_CHIP_ID_B, &tmp);
745 if (ret < 0) 765 if (ret < 0)
@@ -765,16 +785,21 @@ static int wl18xx_set_mac_and_phy(struct wl1271 *wl)
765 else 785 else
766 len = sizeof(struct wl18xx_mac_and_phy_params); 786 len = sizeof(struct wl18xx_mac_and_phy_params);
767 787
768 wlcore_set_partition(wl, &wl->ptable[PART_PHY_INIT]); 788 ret = wlcore_set_partition(wl, &wl->ptable[PART_PHY_INIT]);
789 if (ret < 0)
790 goto out;
791
769 ret = wlcore_write(wl, WL18XX_PHY_INIT_MEM_ADDR, (u8 *)&priv->conf.phy, 792 ret = wlcore_write(wl, WL18XX_PHY_INIT_MEM_ADDR, (u8 *)&priv->conf.phy,
770 len, false); 793 len, false);
771 794
795out:
772 return ret; 796 return ret;
773} 797}
774 798
775static void wl18xx_enable_interrupts(struct wl1271 *wl) 799static int wl18xx_enable_interrupts(struct wl1271 *wl)
776{ 800{
777 u32 event_mask, intr_mask; 801 u32 event_mask, intr_mask;
802 int ret;
778 803
779 if (wl->chip.id == CHIP_ID_185x_PG10) { 804 if (wl->chip.id == CHIP_ID_185x_PG10) {
780 event_mask = WL18XX_ACX_EVENTS_VECTOR_PG1; 805 event_mask = WL18XX_ACX_EVENTS_VECTOR_PG1;
@@ -784,11 +809,17 @@ static void wl18xx_enable_interrupts(struct wl1271 *wl)
784 intr_mask = WL18XX_INTR_MASK_PG2; 809 intr_mask = WL18XX_INTR_MASK_PG2;
785 } 810 }
786 811
787 wlcore_write_reg(wl, REG_INTERRUPT_MASK, event_mask); 812 ret = wlcore_write_reg(wl, REG_INTERRUPT_MASK, event_mask);
813 if (ret < 0)
814 goto out;
788 815
789 wlcore_enable_interrupts(wl); 816 wlcore_enable_interrupts(wl);
790 wlcore_write_reg(wl, REG_INTERRUPT_MASK, 817
791 WL1271_ACX_INTR_ALL & ~intr_mask); 818 ret = wlcore_write_reg(wl, REG_INTERRUPT_MASK,
819 WL1271_ACX_INTR_ALL & ~intr_mask);
820
821out:
822 return ret;
792} 823}
793 824
794static int wl18xx_boot(struct wl1271 *wl) 825static int wl18xx_boot(struct wl1271 *wl)
@@ -815,7 +846,7 @@ static int wl18xx_boot(struct wl1271 *wl)
815 if (ret < 0) 846 if (ret < 0)
816 goto out; 847 goto out;
817 848
818 wl18xx_enable_interrupts(wl); 849 ret = wl18xx_enable_interrupts(wl);
819 850
820out: 851out:
821 return ret; 852 return ret;
@@ -833,9 +864,10 @@ static int wl18xx_trigger_cmd(struct wl1271 *wl, int cmd_box_addr,
833 WL18XX_CMD_MAX_SIZE, false); 864 WL18XX_CMD_MAX_SIZE, false);
834} 865}
835 866
836static void wl18xx_ack_event(struct wl1271 *wl) 867static int wl18xx_ack_event(struct wl1271 *wl)
837{ 868{
838 wlcore_write_reg(wl, REG_INTERRUPT_TRIG, WL18XX_INTR_TRIG_EVENT_ACK); 869 return wlcore_write_reg(wl, REG_INTERRUPT_TRIG,
870 WL18XX_INTR_TRIG_EVENT_ACK);
839} 871}
840 872
841static u32 wl18xx_calc_tx_blocks(struct wl1271 *wl, u32 len, u32 spare_blks) 873static u32 wl18xx_calc_tx_blocks(struct wl1271 *wl, u32 len, u32 spare_blks)
@@ -1038,7 +1070,9 @@ static int wl18xx_get_pg_ver(struct wl1271 *wl, s8 *ver)
1038 u32 fuse; 1070 u32 fuse;
1039 int ret; 1071 int ret;
1040 1072
1041 wlcore_set_partition(wl, &wl->ptable[PART_TOP_PRCM_ELP_SOC]); 1073 ret = wlcore_set_partition(wl, &wl->ptable[PART_TOP_PRCM_ELP_SOC]);
1074 if (ret < 0)
1075 goto out;
1042 1076
1043 ret = wlcore_read32(wl, WL18XX_REG_FUSE_DATA_1_3, &fuse); 1077 ret = wlcore_read32(wl, WL18XX_REG_FUSE_DATA_1_3, &fuse);
1044 if (ret < 0) 1078 if (ret < 0)
@@ -1047,7 +1081,7 @@ static int wl18xx_get_pg_ver(struct wl1271 *wl, s8 *ver)
1047 if (ver) 1081 if (ver)
1048 *ver = (fuse & WL18XX_PG_VER_MASK) >> WL18XX_PG_VER_OFFSET; 1082 *ver = (fuse & WL18XX_PG_VER_MASK) >> WL18XX_PG_VER_OFFSET;
1049 1083
1050 wlcore_set_partition(wl, &wl->ptable[PART_BOOT]); 1084 ret = wlcore_set_partition(wl, &wl->ptable[PART_BOOT]);
1051 1085
1052out: 1086out:
1053 return ret; 1087 return ret;
@@ -1116,7 +1150,11 @@ out:
1116 1150
1117static int wl18xx_plt_init(struct wl1271 *wl) 1151static int wl18xx_plt_init(struct wl1271 *wl)
1118{ 1152{
1119 wl1271_write32(wl, WL18XX_SCR_PAD8, WL18XX_SCR_PAD8_PLT); 1153 int ret;
1154
1155 ret = wlcore_write32(wl, WL18XX_SCR_PAD8, WL18XX_SCR_PAD8_PLT);
1156 if (ret < 0)
1157 return ret;
1120 1158
1121 return wl->ops->boot(wl); 1159 return wl->ops->boot(wl);
1122} 1160}
@@ -1126,7 +1164,9 @@ static int wl18xx_get_mac(struct wl1271 *wl)
1126 u32 mac1, mac2; 1164 u32 mac1, mac2;
1127 int ret; 1165 int ret;
1128 1166
1129 wlcore_set_partition(wl, &wl->ptable[PART_TOP_PRCM_ELP_SOC]); 1167 ret = wlcore_set_partition(wl, &wl->ptable[PART_TOP_PRCM_ELP_SOC]);
1168 if (ret < 0)
1169 goto out;
1130 1170
1131 ret = wlcore_read32(wl, WL18XX_REG_FUSE_BD_ADDR_1, &mac1); 1171 ret = wlcore_read32(wl, WL18XX_REG_FUSE_BD_ADDR_1, &mac1);
1132 if (ret < 0) 1172 if (ret < 0)
@@ -1141,7 +1181,7 @@ static int wl18xx_get_mac(struct wl1271 *wl)
1141 ((mac1 & 0xff000000) >> 24); 1181 ((mac1 & 0xff000000) >> 24);
1142 wl->fuse_nic_addr = (mac1 & 0xffffff); 1182 wl->fuse_nic_addr = (mac1 & 0xffffff);
1143 1183
1144 wlcore_set_partition(wl, &wl->ptable[PART_DOWN]); 1184 ret = wlcore_set_partition(wl, &wl->ptable[PART_DOWN]);
1145 1185
1146out: 1186out:
1147 return ret; 1187 return ret;
diff --git a/drivers/net/wireless/ti/wlcore/boot.c b/drivers/net/wireless/ti/wlcore/boot.c
index 0aa0e29b8d98..8965960b841a 100644
--- a/drivers/net/wireless/ti/wlcore/boot.c
+++ b/drivers/net/wireless/ti/wlcore/boot.c
@@ -45,7 +45,7 @@ static int wl1271_boot_set_ecpu_ctrl(struct wl1271 *wl, u32 flag)
45 45
46 /* 10.5.1 run the firmware (II) */ 46 /* 10.5.1 run the firmware (II) */
47 cpu_ctrl |= flag; 47 cpu_ctrl |= flag;
48 wlcore_write_reg(wl, REG_ECPU_CONTROL, cpu_ctrl); 48 ret = wlcore_write_reg(wl, REG_ECPU_CONTROL, cpu_ctrl);
49 49
50out: 50out:
51 return ret; 51 return ret;
@@ -139,7 +139,9 @@ static int wl1271_boot_upload_firmware_chunk(struct wl1271 *wl, void *buf,
139 139
140 memcpy(&partition, &wl->ptable[PART_DOWN], sizeof(partition)); 140 memcpy(&partition, &wl->ptable[PART_DOWN], sizeof(partition));
141 partition.mem.start = dest; 141 partition.mem.start = dest;
142 wlcore_set_partition(wl, &partition); 142 ret = wlcore_set_partition(wl, &partition);
143 if (ret < 0)
144 return ret;
143 145
144 /* 10.1 set partition limit and chunk num */ 146 /* 10.1 set partition limit and chunk num */
145 chunk_num = 0; 147 chunk_num = 0;
@@ -153,7 +155,9 @@ static int wl1271_boot_upload_firmware_chunk(struct wl1271 *wl, void *buf,
153 partition_limit = chunk_num * CHUNK_SIZE + 155 partition_limit = chunk_num * CHUNK_SIZE +
154 wl->ptable[PART_DOWN].mem.size; 156 wl->ptable[PART_DOWN].mem.size;
155 partition.mem.start = addr; 157 partition.mem.start = addr;
156 wlcore_set_partition(wl, &partition); 158 ret = wlcore_set_partition(wl, &partition);
159 if (ret < 0)
160 return ret;
157 } 161 }
158 162
159 /* 10.3 upload the chunk */ 163 /* 10.3 upload the chunk */
@@ -320,7 +324,9 @@ int wlcore_boot_upload_nvs(struct wl1271 *wl)
320 wl1271_debug(DEBUG_BOOT, 324 wl1271_debug(DEBUG_BOOT,
321 "nvs burst write 0x%x: 0x%x", 325 "nvs burst write 0x%x: 0x%x",
322 dest_addr, val); 326 dest_addr, val);
323 wl1271_write32(wl, dest_addr, val); 327 ret = wlcore_write32(wl, dest_addr, val);
328 if (ret < 0)
329 return ret;
324 330
325 nvs_ptr += 4; 331 nvs_ptr += 4;
326 dest_addr += 4; 332 dest_addr += 4;
@@ -346,7 +352,9 @@ int wlcore_boot_upload_nvs(struct wl1271 *wl)
346 nvs_len -= nvs_ptr - (u8 *)wl->nvs; 352 nvs_len -= nvs_ptr - (u8 *)wl->nvs;
347 353
348 /* Now we must set the partition correctly */ 354 /* Now we must set the partition correctly */
349 wlcore_set_partition(wl, &wl->ptable[PART_WORK]); 355 ret = wlcore_set_partition(wl, &wl->ptable[PART_WORK]);
356 if (ret < 0)
357 return ret;
350 358
351 /* Copy the NVS tables to a new block to ensure alignment */ 359 /* Copy the NVS tables to a new block to ensure alignment */
352 nvs_aligned = kmemdup(nvs_ptr, nvs_len, GFP_KERNEL); 360 nvs_aligned = kmemdup(nvs_ptr, nvs_len, GFP_KERNEL);
@@ -372,7 +380,9 @@ int wlcore_boot_run_firmware(struct wl1271 *wl)
372 u32 chip_id, intr; 380 u32 chip_id, intr;
373 381
374 /* Make sure we have the boot partition */ 382 /* Make sure we have the boot partition */
375 wlcore_set_partition(wl, &wl->ptable[PART_BOOT]); 383 ret = wlcore_set_partition(wl, &wl->ptable[PART_BOOT]);
384 if (ret < 0)
385 return ret;
376 386
377 ret = wl1271_boot_set_ecpu_ctrl(wl, ECPU_CONTROL_HALT); 387 ret = wl1271_boot_set_ecpu_ctrl(wl, ECPU_CONTROL_HALT);
378 if (ret < 0) 388 if (ret < 0)
@@ -404,8 +414,10 @@ int wlcore_boot_run_firmware(struct wl1271 *wl)
404 } 414 }
405 /* check that ACX_INTR_INIT_COMPLETE is enabled */ 415 /* check that ACX_INTR_INIT_COMPLETE is enabled */
406 else if (intr & WL1271_ACX_INTR_INIT_COMPLETE) { 416 else if (intr & WL1271_ACX_INTR_INIT_COMPLETE) {
407 wlcore_write_reg(wl, REG_INTERRUPT_ACK, 417 ret = wlcore_write_reg(wl, REG_INTERRUPT_ACK,
408 WL1271_ACX_INTR_INIT_COMPLETE); 418 WL1271_ACX_INTR_INIT_COMPLETE);
419 if (ret < 0)
420 return ret;
409 break; 421 break;
410 } 422 }
411 } 423 }
@@ -469,9 +481,9 @@ int wlcore_boot_run_firmware(struct wl1271 *wl)
469 } 481 }
470 482
471 /* set the working partition to its "running" mode offset */ 483 /* set the working partition to its "running" mode offset */
472 wlcore_set_partition(wl, &wl->ptable[PART_WORK]); 484 ret = wlcore_set_partition(wl, &wl->ptable[PART_WORK]);
473 485
474 /* firmware startup completed */ 486 /* firmware startup completed */
475 return 0; 487 return ret;
476} 488}
477EXPORT_SYMBOL_GPL(wlcore_boot_run_firmware); 489EXPORT_SYMBOL_GPL(wlcore_boot_run_firmware);
diff --git a/drivers/net/wireless/ti/wlcore/cmd.c b/drivers/net/wireless/ti/wlcore/cmd.c
index f2ac982a5cf5..84dd808f65fa 100644
--- a/drivers/net/wireless/ti/wlcore/cmd.c
+++ b/drivers/net/wireless/ti/wlcore/cmd.c
@@ -116,7 +116,11 @@ int wl1271_cmd_send(struct wl1271 *wl, u16 id, void *buf, size_t len,
116 goto fail; 116 goto fail;
117 } 117 }
118 118
119 wlcore_write_reg(wl, REG_INTERRUPT_ACK, WL1271_ACX_INTR_CMD_COMPLETE); 119 ret = wlcore_write_reg(wl, REG_INTERRUPT_ACK,
120 WL1271_ACX_INTR_CMD_COMPLETE);
121 if (ret < 0)
122 goto fail;
123
120 return 0; 124 return 0;
121 125
122fail: 126fail:
diff --git a/drivers/net/wireless/ti/wlcore/event.c b/drivers/net/wireless/ti/wlcore/event.c
index 123d26d17ba4..48907054d493 100644
--- a/drivers/net/wireless/ti/wlcore/event.c
+++ b/drivers/net/wireless/ti/wlcore/event.c
@@ -318,7 +318,7 @@ int wl1271_event_handle(struct wl1271 *wl, u8 mbox_num)
318 * TODO: we just need this because one bit is in a different 318 * TODO: we just need this because one bit is in a different
319 * place. Is there any better way? 319 * place. Is there any better way?
320 */ 320 */
321 wl->ops->ack_event(wl); 321 ret = wl->ops->ack_event(wl);
322 322
323 return 0; 323 return ret;
324} 324}
diff --git a/drivers/net/wireless/ti/wlcore/io.c b/drivers/net/wireless/ti/wlcore/io.c
index 62d657389996..9976219c4e49 100644
--- a/drivers/net/wireless/ti/wlcore/io.c
+++ b/drivers/net/wireless/ti/wlcore/io.c
@@ -128,9 +128,11 @@ EXPORT_SYMBOL_GPL(wlcore_translate_addr);
128 * | | 128 * | |
129 * 129 *
130 */ 130 */
131void wlcore_set_partition(struct wl1271 *wl, 131int wlcore_set_partition(struct wl1271 *wl,
132 const struct wlcore_partition_set *p) 132 const struct wlcore_partition_set *p)
133{ 133{
134 int ret;
135
134 /* copy partition info */ 136 /* copy partition info */
135 memcpy(&wl->curr_part, p, sizeof(*p)); 137 memcpy(&wl->curr_part, p, sizeof(*p));
136 138
@@ -143,28 +145,41 @@ void wlcore_set_partition(struct wl1271 *wl,
143 wl1271_debug(DEBUG_IO, "mem3_start %08X mem3_size %08X", 145 wl1271_debug(DEBUG_IO, "mem3_start %08X mem3_size %08X",
144 p->mem3.start, p->mem3.size); 146 p->mem3.start, p->mem3.size);
145 147
146 wl1271_raw_write32(wl, HW_PART0_START_ADDR, p->mem.start); 148 ret = wlcore_raw_write32(wl, HW_PART0_START_ADDR, p->mem.start);
147 wl1271_raw_write32(wl, HW_PART0_SIZE_ADDR, p->mem.size); 149 if (ret < 0)
148 wl1271_raw_write32(wl, HW_PART1_START_ADDR, p->reg.start); 150 goto out;
149 wl1271_raw_write32(wl, HW_PART1_SIZE_ADDR, p->reg.size); 151
150 wl1271_raw_write32(wl, HW_PART2_START_ADDR, p->mem2.start); 152 ret = wlcore_raw_write32(wl, HW_PART0_SIZE_ADDR, p->mem.size);
151 wl1271_raw_write32(wl, HW_PART2_SIZE_ADDR, p->mem2.size); 153 if (ret < 0)
154 goto out;
155
156 ret = wlcore_raw_write32(wl, HW_PART1_START_ADDR, p->reg.start);
157 if (ret < 0)
158 goto out;
159
160 ret = wlcore_raw_write32(wl, HW_PART1_SIZE_ADDR, p->reg.size);
161 if (ret < 0)
162 goto out;
163
164 ret = wlcore_raw_write32(wl, HW_PART2_START_ADDR, p->mem2.start);
165 if (ret < 0)
166 goto out;
167
168 ret = wlcore_raw_write32(wl, HW_PART2_SIZE_ADDR, p->mem2.size);
169 if (ret < 0)
170 goto out;
171
152 /* 172 /*
153 * We don't need the size of the last partition, as it is 173 * We don't need the size of the last partition, as it is
154 * automatically calculated based on the total memory size and 174 * automatically calculated based on the total memory size and
155 * the sizes of the previous partitions. 175 * the sizes of the previous partitions.
156 */ 176 */
157 wl1271_raw_write32(wl, HW_PART3_START_ADDR, p->mem3.start); 177 ret = wlcore_raw_write32(wl, HW_PART3_START_ADDR, p->mem3.start);
158}
159EXPORT_SYMBOL_GPL(wlcore_set_partition);
160 178
161void wlcore_select_partition(struct wl1271 *wl, u8 part) 179out:
162{ 180 return ret;
163 wl1271_debug(DEBUG_IO, "setting partition %d", part);
164
165 wlcore_set_partition(wl, &wl->ptable[part]);
166} 181}
167EXPORT_SYMBOL_GPL(wlcore_select_partition); 182EXPORT_SYMBOL_GPL(wlcore_set_partition);
168 183
169void wl1271_io_reset(struct wl1271 *wl) 184void wl1271_io_reset(struct wl1271 *wl)
170{ 185{
diff --git a/drivers/net/wireless/ti/wlcore/io.h b/drivers/net/wireless/ti/wlcore/io.h
index 0395b030a4d6..5e4a3d174004 100644
--- a/drivers/net/wireless/ti/wlcore/io.h
+++ b/drivers/net/wireless/ti/wlcore/io.h
@@ -92,11 +92,11 @@ static inline int wlcore_raw_read32(struct wl1271 *wl, int addr, u32 *val)
92 return 0; 92 return 0;
93} 93}
94 94
95static inline void wl1271_raw_write32(struct wl1271 *wl, int addr, u32 val) 95static inline int wlcore_raw_write32(struct wl1271 *wl, int addr, u32 val)
96{ 96{
97 wl->buffer_32 = cpu_to_le32(val); 97 wl->buffer_32 = cpu_to_le32(val);
98 wlcore_raw_write(wl, addr, &wl->buffer_32, 98 return wlcore_raw_write(wl, addr, &wl->buffer_32,
99 sizeof(wl->buffer_32), false); 99 sizeof(wl->buffer_32), false);
100} 100}
101 101
102static inline int wlcore_read(struct wl1271 *wl, int addr, void *buf, 102static inline int wlcore_read(struct wl1271 *wl, int addr, void *buf,
@@ -150,9 +150,9 @@ static inline int wlcore_read32(struct wl1271 *wl, int addr, u32 *val)
150 return wlcore_raw_read32(wl, wlcore_translate_addr(wl, addr), val); 150 return wlcore_raw_read32(wl, wlcore_translate_addr(wl, addr), val);
151} 151}
152 152
153static inline void wl1271_write32(struct wl1271 *wl, int addr, u32 val) 153static inline int wlcore_write32(struct wl1271 *wl, int addr, u32 val)
154{ 154{
155 wl1271_raw_write32(wl, wlcore_translate_addr(wl, addr), val); 155 return wlcore_raw_write32(wl, wlcore_translate_addr(wl, addr), val);
156} 156}
157 157
158static inline int wlcore_read_reg(struct wl1271 *wl, int reg, u32 *val) 158static inline int wlcore_read_reg(struct wl1271 *wl, int reg, u32 *val)
@@ -162,9 +162,11 @@ static inline int wlcore_read_reg(struct wl1271 *wl, int reg, u32 *val)
162 val); 162 val);
163} 163}
164 164
165static inline void wlcore_write_reg(struct wl1271 *wl, int reg, u32 val) 165static inline int wlcore_write_reg(struct wl1271 *wl, int reg, u32 val)
166{ 166{
167 wl1271_raw_write32(wl, wlcore_translate_addr(wl, wl->rtable[reg]), val); 167 return wlcore_raw_write32(wl,
168 wlcore_translate_addr(wl, wl->rtable[reg]),
169 val);
168} 170}
169 171
170static inline void wl1271_power_off(struct wl1271 *wl) 172static inline void wl1271_power_off(struct wl1271 *wl)
@@ -188,8 +190,8 @@ static inline int wl1271_power_on(struct wl1271 *wl)
188 return ret; 190 return ret;
189} 191}
190 192
191void wlcore_set_partition(struct wl1271 *wl, 193int wlcore_set_partition(struct wl1271 *wl,
192 const struct wlcore_partition_set *p); 194 const struct wlcore_partition_set *p);
193 195
194bool wl1271_set_block_size(struct wl1271 *wl); 196bool wl1271_set_block_size(struct wl1271 *wl);
195 197
@@ -197,6 +199,4 @@ bool wl1271_set_block_size(struct wl1271 *wl);
197 199
198int wl1271_tx_dummy_packet(struct wl1271 *wl); 200int wl1271_tx_dummy_packet(struct wl1271 *wl);
199 201
200void wlcore_select_partition(struct wl1271 *wl, u8 part);
201
202#endif 202#endif
diff --git a/drivers/net/wireless/ti/wlcore/main.c b/drivers/net/wireless/ti/wlcore/main.c
index c16d266ea6a2..546fcb074c6e 100644
--- a/drivers/net/wireless/ti/wlcore/main.c
+++ b/drivers/net/wireless/ti/wlcore/main.c
@@ -882,7 +882,9 @@ static void wlcore_print_recovery(struct wl1271 *wl)
882 wl->chip.fw_ver_str); 882 wl->chip.fw_ver_str);
883 883
884 /* change partitions momentarily so we can read the FW pc */ 884 /* change partitions momentarily so we can read the FW pc */
885 wlcore_set_partition(wl, &wl->ptable[PART_BOOT]); 885 ret = wlcore_set_partition(wl, &wl->ptable[PART_BOOT]);
886 if (ret < 0)
887 return;
886 888
887 ret = wlcore_read_reg(wl, REG_PC_ON_RECOVERY, &pc); 889 ret = wlcore_read_reg(wl, REG_PC_ON_RECOVERY, &pc);
888 if (ret < 0) 890 if (ret < 0)
@@ -967,9 +969,9 @@ out_unlock:
967 mutex_unlock(&wl->mutex); 969 mutex_unlock(&wl->mutex);
968} 970}
969 971
970static void wl1271_fw_wakeup(struct wl1271 *wl) 972static int wlcore_fw_wakeup(struct wl1271 *wl)
971{ 973{
972 wl1271_raw_write32(wl, HW_ACCESS_ELP_CTRL_REG, ELPCTRL_WAKE_UP); 974 return wlcore_raw_write32(wl, HW_ACCESS_ELP_CTRL_REG, ELPCTRL_WAKE_UP);
973} 975}
974 976
975static int wl1271_setup(struct wl1271 *wl) 977static int wl1271_setup(struct wl1271 *wl)
@@ -1005,13 +1007,21 @@ static int wl12xx_set_power_on(struct wl1271 *wl)
1005 wl1271_io_reset(wl); 1007 wl1271_io_reset(wl);
1006 wl1271_io_init(wl); 1008 wl1271_io_init(wl);
1007 1009
1008 wlcore_set_partition(wl, &wl->ptable[PART_BOOT]); 1010 ret = wlcore_set_partition(wl, &wl->ptable[PART_BOOT]);
1011 if (ret < 0)
1012 goto fail;
1009 1013
1010 /* ELP module wake up */ 1014 /* ELP module wake up */
1011 wl1271_fw_wakeup(wl); 1015 ret = wlcore_fw_wakeup(wl);
1016 if (ret < 0)
1017 goto fail;
1012 1018
1013out: 1019out:
1014 return ret; 1020 return ret;
1021
1022fail:
1023 wl1271_power_off(wl);
1024 return ret;
1015} 1025}
1016 1026
1017static int wl12xx_chip_wakeup(struct wl1271 *wl, bool plt) 1027static int wl12xx_chip_wakeup(struct wl1271 *wl, bool plt)
diff --git a/drivers/net/wireless/ti/wlcore/ps.c b/drivers/net/wireless/ti/wlcore/ps.c
index 95d8797cfa28..46d36fd30eba 100644
--- a/drivers/net/wireless/ti/wlcore/ps.c
+++ b/drivers/net/wireless/ti/wlcore/ps.c
@@ -35,6 +35,7 @@ void wl1271_elp_work(struct work_struct *work)
35 struct delayed_work *dwork; 35 struct delayed_work *dwork;
36 struct wl1271 *wl; 36 struct wl1271 *wl;
37 struct wl12xx_vif *wlvif; 37 struct wl12xx_vif *wlvif;
38 int ret;
38 39
39 dwork = container_of(work, struct delayed_work, work); 40 dwork = container_of(work, struct delayed_work, work);
40 wl = container_of(dwork, struct wl1271, elp_work); 41 wl = container_of(dwork, struct wl1271, elp_work);
@@ -63,7 +64,12 @@ void wl1271_elp_work(struct work_struct *work)
63 } 64 }
64 65
65 wl1271_debug(DEBUG_PSM, "chip to elp"); 66 wl1271_debug(DEBUG_PSM, "chip to elp");
66 wl1271_raw_write32(wl, HW_ACCESS_ELP_CTRL_REG, ELPCTRL_SLEEP); 67 ret = wlcore_raw_write32(wl, HW_ACCESS_ELP_CTRL_REG, ELPCTRL_SLEEP);
68 if (ret < 0) {
69 wl12xx_queue_recovery_work(wl);
70 goto out;
71 }
72
67 set_bit(WL1271_FLAG_IN_ELP, &wl->flags); 73 set_bit(WL1271_FLAG_IN_ELP, &wl->flags);
68 74
69out: 75out:
@@ -135,7 +141,11 @@ int wl1271_ps_elp_wakeup(struct wl1271 *wl)
135 wl->elp_compl = &compl; 141 wl->elp_compl = &compl;
136 spin_unlock_irqrestore(&wl->wl_lock, flags); 142 spin_unlock_irqrestore(&wl->wl_lock, flags);
137 143
138 wl1271_raw_write32(wl, HW_ACCESS_ELP_CTRL_REG, ELPCTRL_WAKE_UP); 144 ret = wlcore_raw_write32(wl, HW_ACCESS_ELP_CTRL_REG, ELPCTRL_WAKE_UP);
145 if (ret < 0) {
146 wl12xx_queue_recovery_work(wl);
147 goto err;
148 }
139 149
140 if (!pending) { 150 if (!pending) {
141 ret = wait_for_completion_timeout( 151 ret = wait_for_completion_timeout(
diff --git a/drivers/net/wireless/ti/wlcore/rx.c b/drivers/net/wireless/ti/wlcore/rx.c
index be24b3030f92..f42b969c1de9 100644
--- a/drivers/net/wireless/ti/wlcore/rx.c
+++ b/drivers/net/wireless/ti/wlcore/rx.c
@@ -279,9 +279,12 @@ int wlcore_rx(struct wl1271 *wl, struct wl_fw_status_1 *status)
279 * Write the driver's packet counter to the FW. This is only required 279 * Write the driver's packet counter to the FW. This is only required
280 * for older hardware revisions 280 * for older hardware revisions
281 */ 281 */
282 if (wl->quirks & WLCORE_QUIRK_END_OF_TRANSACTION) 282 if (wl->quirks & WLCORE_QUIRK_END_OF_TRANSACTION) {
283 wl1271_write32(wl, WL12XX_REG_RX_DRIVER_COUNTER, 283 ret = wlcore_write32(wl, WL12XX_REG_RX_DRIVER_COUNTER,
284 wl->rx_counter); 284 wl->rx_counter);
285 if (ret < 0)
286 goto out;
287 }
285 288
286 wl12xx_rearm_rx_streaming(wl, active_hlids); 289 wl12xx_rearm_rx_streaming(wl, active_hlids);
287 290
diff --git a/drivers/net/wireless/ti/wlcore/tx.c b/drivers/net/wireless/ti/wlcore/tx.c
index 90bddf56f8ed..b5211be229d9 100644
--- a/drivers/net/wireless/ti/wlcore/tx.c
+++ b/drivers/net/wireless/ti/wlcore/tx.c
@@ -746,9 +746,12 @@ out_ack:
746 * Interrupt the firmware with the new packets. This is only 746 * Interrupt the firmware with the new packets. This is only
747 * required for older hardware revisions 747 * required for older hardware revisions
748 */ 748 */
749 if (wl->quirks & WLCORE_QUIRK_END_OF_TRANSACTION) 749 if (wl->quirks & WLCORE_QUIRK_END_OF_TRANSACTION) {
750 wl1271_write32(wl, WL12XX_HOST_WR_ACCESS, 750 ret = wlcore_write32(wl, WL12XX_HOST_WR_ACCESS,
751 wl->tx_packets_count); 751 wl->tx_packets_count);
752 if (ret < 0)
753 goto out;
754 }
752 755
753 wl1271_handle_tx_low_watermark(wl); 756 wl1271_handle_tx_low_watermark(wl);
754 } 757 }
@@ -911,9 +914,11 @@ int wlcore_tx_complete(struct wl1271 *wl)
911 fw_counter = le32_to_cpu(wl->tx_res_if->tx_result_fw_counter); 914 fw_counter = le32_to_cpu(wl->tx_res_if->tx_result_fw_counter);
912 915
913 /* write host counter to chipset (to ack) */ 916 /* write host counter to chipset (to ack) */
914 wl1271_write32(wl, le32_to_cpu(memmap->tx_result) + 917 ret = wlcore_write32(wl, le32_to_cpu(memmap->tx_result) +
915 offsetof(struct wl1271_tx_hw_res_if, 918 offsetof(struct wl1271_tx_hw_res_if,
916 tx_result_host_counter), fw_counter); 919 tx_result_host_counter), fw_counter);
920 if (ret < 0)
921 goto out;
917 922
918 count = fw_counter - wl->tx_results_count; 923 count = fw_counter - wl->tx_results_count;
919 wl1271_debug(DEBUG_TX, "tx_complete received, packets: %d", count); 924 wl1271_debug(DEBUG_TX, "tx_complete received, packets: %d", count);
diff --git a/drivers/net/wireless/ti/wlcore/wlcore.h b/drivers/net/wireless/ti/wlcore/wlcore.h
index 2fb537478ba4..e796974df59b 100644
--- a/drivers/net/wireless/ti/wlcore/wlcore.h
+++ b/drivers/net/wireless/ti/wlcore/wlcore.h
@@ -43,7 +43,7 @@ struct wlcore_ops {
43 int (*plt_init)(struct wl1271 *wl); 43 int (*plt_init)(struct wl1271 *wl);
44 int (*trigger_cmd)(struct wl1271 *wl, int cmd_box_addr, 44 int (*trigger_cmd)(struct wl1271 *wl, int cmd_box_addr,
45 void *buf, size_t len); 45 void *buf, size_t len);
46 void (*ack_event)(struct wl1271 *wl); 46 int (*ack_event)(struct wl1271 *wl);
47 u32 (*calc_tx_blocks)(struct wl1271 *wl, u32 len, u32 spare_blks); 47 u32 (*calc_tx_blocks)(struct wl1271 *wl, u32 len, u32 spare_blks);
48 void (*set_tx_desc_blocks)(struct wl1271 *wl, 48 void (*set_tx_desc_blocks)(struct wl1271 *wl,
49 struct wl1271_tx_hw_descr *desc, 49 struct wl1271_tx_hw_descr *desc,