drm/i915: Sink rate read should be saved in deca-kHz

The sink rate read from supported link rate table is in KHz as per spec
while in drm, the saved clock is in deca-KHz. So divide the link rate by
10 before storing.

Reading of rates was added by:
commit fc0f8e25318f ("drm/i915/skl: Read sink supported rates from edp
panel")

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

1 files changed, 2 insertions, 1 deletions

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 8d534f409b23..f27346e907b1 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -3812,7 +3812,8 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
                         if (val == 0)
                                 break;
 
-                        intel_dp->sink_rates[i] = val * 200;
+                        /* Value read is in kHz while drm clock is saved in deca-kHz */
+                        intel_dp->sink_rates[i] = (val * 200) / 10;
                 }
                 intel_dp->num_sink_rates = i;
         }