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authorYoshihiro YUNOMAE <yoshihiro.yunomae.ez@hitachi.com>2014-07-15 21:19:36 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2014-07-17 21:23:35 -0400
commitaef9a7bd9b676f797dd5cefd43deb30d36b976a9 (patch)
tree58e940226b475c5a8fe8b70d3abeb5806e6a3281
parent266dcff03eed0050b6af11aaf2a61ab837d7ba3f (diff)
serial/uart/8250: Add tunable RX interrupt trigger I/F of FIFO buffers
Add tunable RX interrupt trigger I/F of FIFO buffers. Serial devices are used as not only message communication devices but control or sending communication devices. For the latter uses, normally small data will be exchanged, so user applications want to receive data unit as soon as possible for real-time tendency. If we have a sensor which sends a 1 byte data each time and must control a device based on the sensor feedback, the RX interrupt should be triggered for each data. According to HW specification of serial UART devices, RX interrupt trigger can be changed, but the trigger is hard-coded. For example, RX interrupt trigger in 16550A can be set to 1, 4, 8, or 14 bytes for HW, but current driver sets the trigger to only 8bytes. This patch makes some devices change RX interrupt trigger from userland. <How to use> - Read current setting # cat /sys/class/tty/ttyS0/rx_trig_bytes 8 - Write user setting # echo 1 > /sys/class/tty/ttyS0/rx_trig_bytes # cat /sys/class/tty/ttyS0/rx_trig_bytes 1 <Support uart devices> - 16550A and Tegra (1, 4, 8, or 14 bytes) - 16650V2 (8, 16, 24, or 28 bytes) - 16654 (8, 16, 56, or 60 bytes) - 16750 (1, 16, 32, or 56 bytes) <Change log> Changes in V9: - Use attr_group instead of dev_spec_attr_group of uart_port structure Changes in V8: - Divide this patch from V7's patch based on Greg's comment Changes in V7: - Add Documentation - Change I/F name from rx_int_trig to rx_trig_bytes because the name rx_int_trig is hard to understand how users specify the value Changes in V6: - Move FCR_RX_TRIG_* definition in 8250.h to include/uapi/linux/serial_reg.h, rename those to UART_FCR_R_TRIG_*, and use UART_FCR_TRIGGER_MASK to UART_FCR_R_TRIG_BITS() - Change following function names: convert_fcr2val() => fcr_get_rxtrig_bytes() convert_val2rxtrig() => bytes_to_fcr_rxtrig() - Fix typo in serial8250_do_set_termios() - Delete the verbose error message pr_info() in bytes_to_fcr_rxtrig() - Rename *rx_int_trig/rx_trig* to *rxtrig* for several functions or variables (but UI remains rx_int_trig) - Change the meaningless variable name 'val' to 'bytes' following functions: fcr_get_rxtrig_bytes(), bytes_to_fcr_rxtrig(), do_set_rxtrig(), do_serial8250_set_rxtrig(), and serial8250_set_attr_rxtrig() - Use up->fcr in order to get rxtrig_bytes instead of rx_trig_raw in fcr_get_rxtrig_bytes() - Use conf_type->rxtrig_bytes[0] instead of switch statement for support check in register_dev_spec_attr_grp() - Delete the checking whether a user changed FCR or not when minimum buffer is needed in serial8250_do_set_termios() Changes in V5.1: - Fix FCR_RX_TRIG_MAX_STATE definition Changes in V5: - Support Tegra, 16650V2, 16654, and 16750 - Store default FCR value to up->fcr when the port is first created - Add rx_trig_byte[] in uart_config[] for each device and use rx_trig_byte[] in convert_fcr2val() and convert_val2rxtrig() Changes in V4: - Introduce fifo_bug flag in uart_8250_port structure This is enabled only when parity is enabled and UART_BUG_PARITY is enabled for up->bugs. If this flag is enabled, user cannot set RX trigger. - Return -EOPNOTSUPP when it does not support device at convert_fcr2val() and at convert_val2rxtrig() - Set the nearest lower RX trigger when users input a meaningless value at convert_val2rxtrig() - Check whether p->fcr is existing at serial8250_clear_and_reinit_fifos() - Set fcr = up->fcr in the begging of serial8250_do_set_termios() Changes in V3: - Change I/F from ioctl(2) to sysfs(rx_int_trig) Changed in V2: - Use _IOW for TIOCSFIFORTRIG definition - Pass the interrupt trigger value itself Signed-off-by: Yoshihiro YUNOMAE <yoshihiro.yunomae.ez@hitachi.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--Documentation/ABI/testing/sysfs-tty16
-rw-r--r--drivers/tty/serial/8250/8250.h2
-rw-r--r--drivers/tty/serial/8250/8250_core.c173
-rw-r--r--include/linux/serial_8250.h2
-rw-r--r--include/uapi/linux/serial_reg.h5
5 files changed, 183 insertions, 15 deletions
diff --git a/Documentation/ABI/testing/sysfs-tty b/Documentation/ABI/testing/sysfs-tty
index ad22fb0ee765..9eb3c2b6b040 100644
--- a/Documentation/ABI/testing/sysfs-tty
+++ b/Documentation/ABI/testing/sysfs-tty
@@ -138,3 +138,19 @@ Description:
138 138
139 These sysfs values expose the TIOCGSERIAL interface via 139 These sysfs values expose the TIOCGSERIAL interface via
140 sysfs rather than via ioctls. 140 sysfs rather than via ioctls.
141
142What: /sys/class/tty/ttyS0/rx_trig_bytes
143Date: May 2014
144Contact: Yoshihiro YUNOMAE <yoshihiro.yunomae.ez@hitachi.com>
145Description:
146 Shows current RX interrupt trigger bytes or sets the
147 user specified value to change it for the FIFO buffer.
148 Users can show or set this value regardless of opening the
149 serial device file or not.
150
151 The RX trigger can be set one of four kinds of values for UART
152 serials. When users input a meaning less value to this I/F,
153 the RX trigger is changed to the nearest lower value for the
154 device specification. For example, when user sets 7bytes on
155 16550A, which has 1/4/8/14 bytes trigger, the RX trigger is
156 automatically changed to 4 bytes.
diff --git a/drivers/tty/serial/8250/8250.h b/drivers/tty/serial/8250/8250.h
index 1ebf8538b4fa..1b08c918cd51 100644
--- a/drivers/tty/serial/8250/8250.h
+++ b/drivers/tty/serial/8250/8250.h
@@ -12,6 +12,7 @@
12 */ 12 */
13 13
14#include <linux/serial_8250.h> 14#include <linux/serial_8250.h>
15#include <linux/serial_reg.h>
15#include <linux/dmaengine.h> 16#include <linux/dmaengine.h>
16 17
17struct uart_8250_dma { 18struct uart_8250_dma {
@@ -60,6 +61,7 @@ struct serial8250_config {
60 unsigned short fifo_size; 61 unsigned short fifo_size;
61 unsigned short tx_loadsz; 62 unsigned short tx_loadsz;
62 unsigned char fcr; 63 unsigned char fcr;
64 unsigned char rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE];
63 unsigned int flags; 65 unsigned int flags;
64}; 66};
65 67
diff --git a/drivers/tty/serial/8250/8250_core.c b/drivers/tty/serial/8250/8250_core.c
index 0da01458816e..1d42dba6121d 100644
--- a/drivers/tty/serial/8250/8250_core.c
+++ b/drivers/tty/serial/8250/8250_core.c
@@ -31,7 +31,6 @@
31#include <linux/tty.h> 31#include <linux/tty.h>
32#include <linux/ratelimit.h> 32#include <linux/ratelimit.h>
33#include <linux/tty_flip.h> 33#include <linux/tty_flip.h>
34#include <linux/serial_reg.h>
35#include <linux/serial_core.h> 34#include <linux/serial_core.h>
36#include <linux/serial.h> 35#include <linux/serial.h>
37#include <linux/serial_8250.h> 36#include <linux/serial_8250.h>
@@ -161,6 +160,7 @@ static const struct serial8250_config uart_config[] = {
161 .fifo_size = 16, 160 .fifo_size = 16,
162 .tx_loadsz = 16, 161 .tx_loadsz = 16,
163 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10, 162 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
163 .rxtrig_bytes = {1, 4, 8, 14},
164 .flags = UART_CAP_FIFO, 164 .flags = UART_CAP_FIFO,
165 }, 165 },
166 [PORT_CIRRUS] = { 166 [PORT_CIRRUS] = {
@@ -180,6 +180,7 @@ static const struct serial8250_config uart_config[] = {
180 .tx_loadsz = 16, 180 .tx_loadsz = 16,
181 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 | 181 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
182 UART_FCR_T_TRIG_00, 182 UART_FCR_T_TRIG_00,
183 .rxtrig_bytes = {8, 16, 24, 28},
183 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP, 184 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
184 }, 185 },
185 [PORT_16750] = { 186 [PORT_16750] = {
@@ -188,6 +189,7 @@ static const struct serial8250_config uart_config[] = {
188 .tx_loadsz = 64, 189 .tx_loadsz = 64,
189 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 | 190 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
190 UART_FCR7_64BYTE, 191 UART_FCR7_64BYTE,
192 .rxtrig_bytes = {1, 16, 32, 56},
191 .flags = UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_AFE, 193 .flags = UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_AFE,
192 }, 194 },
193 [PORT_STARTECH] = { 195 [PORT_STARTECH] = {
@@ -209,6 +211,7 @@ static const struct serial8250_config uart_config[] = {
209 .tx_loadsz = 32, 211 .tx_loadsz = 32,
210 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 | 212 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
211 UART_FCR_T_TRIG_10, 213 UART_FCR_T_TRIG_10,
214 .rxtrig_bytes = {8, 16, 56, 60},
212 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP, 215 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
213 }, 216 },
214 [PORT_16850] = { 217 [PORT_16850] = {
@@ -266,6 +269,7 @@ static const struct serial8250_config uart_config[] = {
266 .tx_loadsz = 8, 269 .tx_loadsz = 8,
267 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 | 270 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
268 UART_FCR_T_TRIG_01, 271 UART_FCR_T_TRIG_01,
272 .rxtrig_bytes = {1, 4, 8, 14},
269 .flags = UART_CAP_FIFO | UART_CAP_RTOIE, 273 .flags = UART_CAP_FIFO | UART_CAP_RTOIE,
270 }, 274 },
271 [PORT_XR17D15X] = { 275 [PORT_XR17D15X] = {
@@ -530,11 +534,8 @@ static void serial8250_clear_fifos(struct uart_8250_port *p)
530 534
531void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p) 535void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p)
532{ 536{
533 unsigned char fcr;
534
535 serial8250_clear_fifos(p); 537 serial8250_clear_fifos(p);
536 fcr = uart_config[p->port.type].fcr; 538 serial_out(p, UART_FCR, p->fcr);
537 serial_out(p, UART_FCR, fcr);
538} 539}
539EXPORT_SYMBOL_GPL(serial8250_clear_and_reinit_fifos); 540EXPORT_SYMBOL_GPL(serial8250_clear_and_reinit_fifos);
540 541
@@ -2256,10 +2257,9 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
2256 struct ktermios *old) 2257 struct ktermios *old)
2257{ 2258{
2258 struct uart_8250_port *up = up_to_u8250p(port); 2259 struct uart_8250_port *up = up_to_u8250p(port);
2259 unsigned char cval, fcr = 0; 2260 unsigned char cval;
2260 unsigned long flags; 2261 unsigned long flags;
2261 unsigned int baud, quot; 2262 unsigned int baud, quot;
2262 int fifo_bug = 0;
2263 2263
2264 switch (termios->c_cflag & CSIZE) { 2264 switch (termios->c_cflag & CSIZE) {
2265 case CS5: 2265 case CS5:
@@ -2282,7 +2282,7 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
2282 if (termios->c_cflag & PARENB) { 2282 if (termios->c_cflag & PARENB) {
2283 cval |= UART_LCR_PARITY; 2283 cval |= UART_LCR_PARITY;
2284 if (up->bugs & UART_BUG_PARITY) 2284 if (up->bugs & UART_BUG_PARITY)
2285 fifo_bug = 1; 2285 up->fifo_bug = true;
2286 } 2286 }
2287 if (!(termios->c_cflag & PARODD)) 2287 if (!(termios->c_cflag & PARODD))
2288 cval |= UART_LCR_EPAR; 2288 cval |= UART_LCR_EPAR;
@@ -2306,10 +2306,10 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
2306 quot++; 2306 quot++;
2307 2307
2308 if (up->capabilities & UART_CAP_FIFO && port->fifosize > 1) { 2308 if (up->capabilities & UART_CAP_FIFO && port->fifosize > 1) {
2309 fcr = uart_config[port->type].fcr; 2309 /* NOTE: If fifo_bug is not set, a user can set RX_trigger. */
2310 if ((baud < 2400 && !up->dma) || fifo_bug) { 2310 if ((baud < 2400 && !up->dma) || up->fifo_bug) {
2311 fcr &= ~UART_FCR_TRIGGER_MASK; 2311 up->fcr &= ~UART_FCR_TRIGGER_MASK;
2312 fcr |= UART_FCR_TRIGGER_1; 2312 up->fcr |= UART_FCR_TRIGGER_1;
2313 } 2313 }
2314 } 2314 }
2315 2315
@@ -2442,15 +2442,15 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
2442 * is written without DLAB set, this mode will be disabled. 2442 * is written without DLAB set, this mode will be disabled.
2443 */ 2443 */
2444 if (port->type == PORT_16750) 2444 if (port->type == PORT_16750)
2445 serial_port_out(port, UART_FCR, fcr); 2445 serial_port_out(port, UART_FCR, up->fcr);
2446 2446
2447 serial_port_out(port, UART_LCR, cval); /* reset DLAB */ 2447 serial_port_out(port, UART_LCR, cval); /* reset DLAB */
2448 up->lcr = cval; /* Save LCR */ 2448 up->lcr = cval; /* Save LCR */
2449 if (port->type != PORT_16750) { 2449 if (port->type != PORT_16750) {
2450 /* emulated UARTs (Lucent Venus 167x) need two steps */ 2450 /* emulated UARTs (Lucent Venus 167x) need two steps */
2451 if (fcr & UART_FCR_ENABLE_FIFO) 2451 if (up->fcr & UART_FCR_ENABLE_FIFO)
2452 serial_port_out(port, UART_FCR, UART_FCR_ENABLE_FIFO); 2452 serial_port_out(port, UART_FCR, UART_FCR_ENABLE_FIFO);
2453 serial_port_out(port, UART_FCR, fcr); /* set fcr */ 2453 serial_port_out(port, UART_FCR, up->fcr); /* set fcr */
2454 } 2454 }
2455 serial8250_set_mctrl(port, port->mctrl); 2455 serial8250_set_mctrl(port, port->mctrl);
2456 spin_unlock_irqrestore(&port->lock, flags); 2456 spin_unlock_irqrestore(&port->lock, flags);
@@ -2640,6 +2640,146 @@ static int serial8250_request_port(struct uart_port *port)
2640 return ret; 2640 return ret;
2641} 2641}
2642 2642
2643static int fcr_get_rxtrig_bytes(struct uart_8250_port *up)
2644{
2645 const struct serial8250_config *conf_type = &uart_config[up->port.type];
2646 unsigned char bytes;
2647
2648 bytes = conf_type->rxtrig_bytes[UART_FCR_R_TRIG_BITS(up->fcr)];
2649
2650 return bytes ? bytes : -EOPNOTSUPP;
2651}
2652
2653static int bytes_to_fcr_rxtrig(struct uart_8250_port *up, unsigned char bytes)
2654{
2655 const struct serial8250_config *conf_type = &uart_config[up->port.type];
2656 int i;
2657
2658 if (!conf_type->rxtrig_bytes[UART_FCR_R_TRIG_BITS(UART_FCR_R_TRIG_00)])
2659 return -EOPNOTSUPP;
2660
2661 for (i = 1; i < UART_FCR_R_TRIG_MAX_STATE; i++) {
2662 if (bytes < conf_type->rxtrig_bytes[i])
2663 /* Use the nearest lower value */
2664 return (--i) << UART_FCR_R_TRIG_SHIFT;
2665 }
2666
2667 return UART_FCR_R_TRIG_11;
2668}
2669
2670static int do_get_rxtrig(struct tty_port *port)
2671{
2672 struct uart_state *state = container_of(port, struct uart_state, port);
2673 struct uart_port *uport = state->uart_port;
2674 struct uart_8250_port *up =
2675 container_of(uport, struct uart_8250_port, port);
2676
2677 if (!(up->capabilities & UART_CAP_FIFO) || uport->fifosize <= 1)
2678 return -EINVAL;
2679
2680 return fcr_get_rxtrig_bytes(up);
2681}
2682
2683static int do_serial8250_get_rxtrig(struct tty_port *port)
2684{
2685 int rxtrig_bytes;
2686
2687 mutex_lock(&port->mutex);
2688 rxtrig_bytes = do_get_rxtrig(port);
2689 mutex_unlock(&port->mutex);
2690
2691 return rxtrig_bytes;
2692}
2693
2694static ssize_t serial8250_get_attr_rx_trig_bytes(struct device *dev,
2695 struct device_attribute *attr, char *buf)
2696{
2697 struct tty_port *port = dev_get_drvdata(dev);
2698 int rxtrig_bytes;
2699
2700 rxtrig_bytes = do_serial8250_get_rxtrig(port);
2701 if (rxtrig_bytes < 0)
2702 return rxtrig_bytes;
2703
2704 return snprintf(buf, PAGE_SIZE, "%d\n", rxtrig_bytes);
2705}
2706
2707static int do_set_rxtrig(struct tty_port *port, unsigned char bytes)
2708{
2709 struct uart_state *state = container_of(port, struct uart_state, port);
2710 struct uart_port *uport = state->uart_port;
2711 struct uart_8250_port *up =
2712 container_of(uport, struct uart_8250_port, port);
2713 int rxtrig;
2714
2715 if (!(up->capabilities & UART_CAP_FIFO) || uport->fifosize <= 1 ||
2716 up->fifo_bug)
2717 return -EINVAL;
2718
2719 rxtrig = bytes_to_fcr_rxtrig(up, bytes);
2720 if (rxtrig < 0)
2721 return rxtrig;
2722
2723 serial8250_clear_fifos(up);
2724 up->fcr &= ~UART_FCR_TRIGGER_MASK;
2725 up->fcr |= (unsigned char)rxtrig;
2726 serial_out(up, UART_FCR, up->fcr);
2727 return 0;
2728}
2729
2730static int do_serial8250_set_rxtrig(struct tty_port *port, unsigned char bytes)
2731{
2732 int ret;
2733
2734 mutex_lock(&port->mutex);
2735 ret = do_set_rxtrig(port, bytes);
2736 mutex_unlock(&port->mutex);
2737
2738 return ret;
2739}
2740
2741static ssize_t serial8250_set_attr_rx_trig_bytes(struct device *dev,
2742 struct device_attribute *attr, const char *buf, size_t count)
2743{
2744 struct tty_port *port = dev_get_drvdata(dev);
2745 unsigned char bytes;
2746 int ret;
2747
2748 if (!count)
2749 return -EINVAL;
2750
2751 ret = kstrtou8(buf, 10, &bytes);
2752 if (ret < 0)
2753 return ret;
2754
2755 ret = do_serial8250_set_rxtrig(port, bytes);
2756 if (ret < 0)
2757 return ret;
2758
2759 return count;
2760}
2761
2762static DEVICE_ATTR(rx_trig_bytes, S_IRUSR | S_IWUSR | S_IRGRP,
2763 serial8250_get_attr_rx_trig_bytes,
2764 serial8250_set_attr_rx_trig_bytes);
2765
2766static struct attribute *serial8250_dev_attrs[] = {
2767 &dev_attr_rx_trig_bytes.attr,
2768 NULL,
2769 };
2770
2771static struct attribute_group serial8250_dev_attr_group = {
2772 .attrs = serial8250_dev_attrs,
2773 };
2774
2775static void register_dev_spec_attr_grp(struct uart_8250_port *up)
2776{
2777 const struct serial8250_config *conf_type = &uart_config[up->port.type];
2778
2779 if (conf_type->rxtrig_bytes[0])
2780 up->port.attr_group = &serial8250_dev_attr_group;
2781}
2782
2643static void serial8250_config_port(struct uart_port *port, int flags) 2783static void serial8250_config_port(struct uart_port *port, int flags)
2644{ 2784{
2645 struct uart_8250_port *up = up_to_u8250p(port); 2785 struct uart_8250_port *up = up_to_u8250p(port);
@@ -2687,6 +2827,9 @@ static void serial8250_config_port(struct uart_port *port, int flags)
2687 if ((port->type == PORT_XR17V35X) || 2827 if ((port->type == PORT_XR17V35X) ||
2688 (port->type == PORT_XR17D15X)) 2828 (port->type == PORT_XR17D15X))
2689 port->handle_irq = exar_handle_irq; 2829 port->handle_irq = exar_handle_irq;
2830
2831 register_dev_spec_attr_grp(up);
2832 up->fcr = uart_config[up->port.type].fcr;
2690} 2833}
2691 2834
2692static int 2835static int
diff --git a/include/linux/serial_8250.h b/include/linux/serial_8250.h
index 730ab4b3d686..f93649e22c43 100644
--- a/include/linux/serial_8250.h
+++ b/include/linux/serial_8250.h
@@ -74,8 +74,10 @@ struct uart_8250_port {
74 struct list_head list; /* ports on this IRQ */ 74 struct list_head list; /* ports on this IRQ */
75 unsigned short capabilities; /* port capabilities */ 75 unsigned short capabilities; /* port capabilities */
76 unsigned short bugs; /* port bugs */ 76 unsigned short bugs; /* port bugs */
77 bool fifo_bug; /* min RX trigger if enabled */
77 unsigned int tx_loadsz; /* transmit fifo load size */ 78 unsigned int tx_loadsz; /* transmit fifo load size */
78 unsigned char acr; 79 unsigned char acr;
80 unsigned char fcr;
79 unsigned char ier; 81 unsigned char ier;
80 unsigned char lcr; 82 unsigned char lcr;
81 unsigned char mcr; 83 unsigned char mcr;
diff --git a/include/uapi/linux/serial_reg.h b/include/uapi/linux/serial_reg.h
index 99b47058816a..df6c9ab6b0cd 100644
--- a/include/uapi/linux/serial_reg.h
+++ b/include/uapi/linux/serial_reg.h
@@ -88,6 +88,11 @@
88#define UART_FCR6_T_TRIGGER_30 0x30 /* Mask for transmit trigger set at 30 */ 88#define UART_FCR6_T_TRIGGER_30 0x30 /* Mask for transmit trigger set at 30 */
89#define UART_FCR7_64BYTE 0x20 /* Go into 64 byte mode (TI16C750) */ 89#define UART_FCR7_64BYTE 0x20 /* Go into 64 byte mode (TI16C750) */
90 90
91#define UART_FCR_R_TRIG_SHIFT 6
92#define UART_FCR_R_TRIG_BITS(x) \
93 (((x) & UART_FCR_TRIGGER_MASK) >> UART_FCR_R_TRIG_SHIFT)
94#define UART_FCR_R_TRIG_MAX_STATE 4
95
91#define UART_LCR 3 /* Out: Line Control Register */ 96#define UART_LCR 3 /* Out: Line Control Register */
92/* 97/*
93 * Note: if the word length is 5 bits (UART_LCR_WLEN5), then setting 98 * Note: if the word length is 5 bits (UART_LCR_WLEN5), then setting