diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2013-07-11 14:20:11 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2013-07-14 10:11:25 -0400 |
commit | aeea40cbf9388fc829e66fa049f64d97fd72e118 (patch) | |
tree | 8cf8a60f2dfb2444f9f655fafd4a8439d578c705 | |
parent | 9847b36af413f32528fc929a0b11d32c2872a05c (diff) |
drm/radeon: Disable dma rings for bo moves on r6xx
They still seem to cause instability on some r6xx parts.
As a follow up, we can switch to using CP DMA for bo
moves on r6xx as a lighter weight alternative to using
the 3D engine.
A version of this patch should also go to stable kernels.
Tested-by: J.N. <golden.fleeced@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_asic.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c index 097077499cc6..ea5c52b1f445 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.c +++ b/drivers/gpu/drm/radeon/radeon_asic.c | |||
@@ -1026,8 +1026,8 @@ static struct radeon_asic r600_asic = { | |||
1026 | .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX, | 1026 | .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX, |
1027 | .dma = &r600_copy_dma, | 1027 | .dma = &r600_copy_dma, |
1028 | .dma_ring_index = R600_RING_TYPE_DMA_INDEX, | 1028 | .dma_ring_index = R600_RING_TYPE_DMA_INDEX, |
1029 | .copy = &r600_copy_dma, | 1029 | .copy = &r600_copy_blit, |
1030 | .copy_ring_index = R600_RING_TYPE_DMA_INDEX, | 1030 | .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX, |
1031 | }, | 1031 | }, |
1032 | .surface = { | 1032 | .surface = { |
1033 | .set_reg = r600_set_surface_reg, | 1033 | .set_reg = r600_set_surface_reg, |
@@ -1119,8 +1119,8 @@ static struct radeon_asic rv6xx_asic = { | |||
1119 | .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX, | 1119 | .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX, |
1120 | .dma = &r600_copy_dma, | 1120 | .dma = &r600_copy_dma, |
1121 | .dma_ring_index = R600_RING_TYPE_DMA_INDEX, | 1121 | .dma_ring_index = R600_RING_TYPE_DMA_INDEX, |
1122 | .copy = &r600_copy_dma, | 1122 | .copy = &r600_copy_blit, |
1123 | .copy_ring_index = R600_RING_TYPE_DMA_INDEX, | 1123 | .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX, |
1124 | }, | 1124 | }, |
1125 | .surface = { | 1125 | .surface = { |
1126 | .set_reg = r600_set_surface_reg, | 1126 | .set_reg = r600_set_surface_reg, |
@@ -1229,8 +1229,8 @@ static struct radeon_asic rs780_asic = { | |||
1229 | .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX, | 1229 | .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX, |
1230 | .dma = &r600_copy_dma, | 1230 | .dma = &r600_copy_dma, |
1231 | .dma_ring_index = R600_RING_TYPE_DMA_INDEX, | 1231 | .dma_ring_index = R600_RING_TYPE_DMA_INDEX, |
1232 | .copy = &r600_copy_dma, | 1232 | .copy = &r600_copy_blit, |
1233 | .copy_ring_index = R600_RING_TYPE_DMA_INDEX, | 1233 | .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX, |
1234 | }, | 1234 | }, |
1235 | .surface = { | 1235 | .surface = { |
1236 | .set_reg = r600_set_surface_reg, | 1236 | .set_reg = r600_set_surface_reg, |