diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-11-22 13:56:11 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-11-22 13:56:11 -0500 |
commit | aecde27c4fc4939f7c16ae13645f896438190567 (patch) | |
tree | 6a867d321f71eb1ed9602ae2158b21ac15da6770 | |
parent | e3414786ffb40a1fd524624369d350ed70a90a08 (diff) | |
parent | 760c960bd6880cf22a57c0af9ff60c96250aad39 (diff) |
Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
Pull DRM fixes from Dave Airlie:
"I was going to leave this until post -rc1 but sysfs fixes broke
hotplug in userspace, so I had to fix it harder, otherwise a set of
pulls from intel, radeon and vmware,
The vmware/ttm changes are bit larger but since its early and they are
unlikely to break anything else I put them in, it lets vmware work
with dri3"
* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: (36 commits)
drm/sysfs: fix hotplug regression since lifetime changes
drm/exynos: g2d: fix memory leak to userptr
drm/i915: Fix gen3 self-refresh watermarks
drm/ttm: Remove set_need_resched from the ttm fault handler
drm/ttm: Don't move non-existing data
drm/radeon: hook up backlight functions for CI and KV family.
drm/i915: Replicate BIOS eDP bpp clamping hack for hsw
drm/i915: Do not enable package C8 on unsupported hardware
drm/i915: Hold pc8 lock around toggling pc8.gpu_idle
drm/i915: encoder->get_config is no longer optional
drm/i915/tv: add ->get_config callback
drm/radeon/cik: Add macrotile mode array query
drm/radeon/cik: Return backend map information to userspace
drm/vmwgfx: Make vmwgfx dma buffers prime aware
drm/vmwgfx: Make surfaces prime-aware
drm/vmwgfx: Hook up the prime ioctls
drm/ttm: Add a minimal prime implementation for ttm base objects
drm/vmwgfx: Fix false lockdep warning
drm/ttm: Allow execbuf util reserves without ticket
drm/i915: restore the early forcewake cleanup
...
54 files changed, 1057 insertions, 324 deletions
diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c index 96f958d8cd45..bc4a088f9023 100644 --- a/arch/x86/kernel/early-quirks.c +++ b/arch/x86/kernel/early-quirks.c | |||
@@ -330,8 +330,8 @@ static struct pci_device_id intel_stolen_ids[] __initdata = { | |||
330 | INTEL_I915GM_IDS(gen3_stolen_size), | 330 | INTEL_I915GM_IDS(gen3_stolen_size), |
331 | INTEL_I945G_IDS(gen3_stolen_size), | 331 | INTEL_I945G_IDS(gen3_stolen_size), |
332 | INTEL_I945GM_IDS(gen3_stolen_size), | 332 | INTEL_I945GM_IDS(gen3_stolen_size), |
333 | INTEL_VLV_M_IDS(gen3_stolen_size), | 333 | INTEL_VLV_M_IDS(gen6_stolen_size), |
334 | INTEL_VLV_D_IDS(gen3_stolen_size), | 334 | INTEL_VLV_D_IDS(gen6_stolen_size), |
335 | INTEL_PINEVIEW_IDS(gen3_stolen_size), | 335 | INTEL_PINEVIEW_IDS(gen3_stolen_size), |
336 | INTEL_I965G_IDS(gen3_stolen_size), | 336 | INTEL_I965G_IDS(gen3_stolen_size), |
337 | INTEL_G33_IDS(gen3_stolen_size), | 337 | INTEL_G33_IDS(gen3_stolen_size), |
diff --git a/drivers/gpu/drm/drm_sysfs.c b/drivers/gpu/drm/drm_sysfs.c index 1a35ea53106b..bd2bca395792 100644 --- a/drivers/gpu/drm/drm_sysfs.c +++ b/drivers/gpu/drm/drm_sysfs.c | |||
@@ -489,6 +489,11 @@ void drm_sysfs_hotplug_event(struct drm_device *dev) | |||
489 | } | 489 | } |
490 | EXPORT_SYMBOL(drm_sysfs_hotplug_event); | 490 | EXPORT_SYMBOL(drm_sysfs_hotplug_event); |
491 | 491 | ||
492 | static void drm_sysfs_release(struct device *dev) | ||
493 | { | ||
494 | kfree(dev); | ||
495 | } | ||
496 | |||
492 | /** | 497 | /** |
493 | * drm_sysfs_device_add - adds a class device to sysfs for a character driver | 498 | * drm_sysfs_device_add - adds a class device to sysfs for a character driver |
494 | * @dev: DRM device to be added | 499 | * @dev: DRM device to be added |
@@ -501,6 +506,7 @@ EXPORT_SYMBOL(drm_sysfs_hotplug_event); | |||
501 | int drm_sysfs_device_add(struct drm_minor *minor) | 506 | int drm_sysfs_device_add(struct drm_minor *minor) |
502 | { | 507 | { |
503 | char *minor_str; | 508 | char *minor_str; |
509 | int r; | ||
504 | 510 | ||
505 | if (minor->type == DRM_MINOR_CONTROL) | 511 | if (minor->type == DRM_MINOR_CONTROL) |
506 | minor_str = "controlD%d"; | 512 | minor_str = "controlD%d"; |
@@ -509,14 +515,34 @@ int drm_sysfs_device_add(struct drm_minor *minor) | |||
509 | else | 515 | else |
510 | minor_str = "card%d"; | 516 | minor_str = "card%d"; |
511 | 517 | ||
512 | minor->kdev = device_create(drm_class, minor->dev->dev, | 518 | minor->kdev = kzalloc(sizeof(*minor->kdev), GFP_KERNEL); |
513 | MKDEV(DRM_MAJOR, minor->index), | 519 | if (!minor->dev) { |
514 | minor, minor_str, minor->index); | 520 | r = -ENOMEM; |
515 | if (IS_ERR(minor->kdev)) { | 521 | goto error; |
516 | DRM_ERROR("device create failed %ld\n", PTR_ERR(minor->kdev)); | ||
517 | return PTR_ERR(minor->kdev); | ||
518 | } | 522 | } |
523 | |||
524 | device_initialize(minor->kdev); | ||
525 | minor->kdev->devt = MKDEV(DRM_MAJOR, minor->index); | ||
526 | minor->kdev->class = drm_class; | ||
527 | minor->kdev->type = &drm_sysfs_device_minor; | ||
528 | minor->kdev->parent = minor->dev->dev; | ||
529 | minor->kdev->release = drm_sysfs_release; | ||
530 | dev_set_drvdata(minor->kdev, minor); | ||
531 | |||
532 | r = dev_set_name(minor->kdev, minor_str, minor->index); | ||
533 | if (r < 0) | ||
534 | goto error; | ||
535 | |||
536 | r = device_add(minor->kdev); | ||
537 | if (r < 0) | ||
538 | goto error; | ||
539 | |||
519 | return 0; | 540 | return 0; |
541 | |||
542 | error: | ||
543 | DRM_ERROR("device create failed %d\n", r); | ||
544 | put_device(minor->kdev); | ||
545 | return r; | ||
520 | } | 546 | } |
521 | 547 | ||
522 | /** | 548 | /** |
@@ -529,7 +555,7 @@ int drm_sysfs_device_add(struct drm_minor *minor) | |||
529 | void drm_sysfs_device_remove(struct drm_minor *minor) | 555 | void drm_sysfs_device_remove(struct drm_minor *minor) |
530 | { | 556 | { |
531 | if (minor->kdev) | 557 | if (minor->kdev) |
532 | device_destroy(drm_class, MKDEV(DRM_MAJOR, minor->index)); | 558 | device_unregister(minor->kdev); |
533 | minor->kdev = NULL; | 559 | minor->kdev = NULL; |
534 | } | 560 | } |
535 | 561 | ||
diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c b/drivers/gpu/drm/exynos/exynos_drm_g2d.c index 3271fd4b1724..7bccedca487a 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_g2d.c +++ b/drivers/gpu/drm/exynos/exynos_drm_g2d.c | |||
@@ -383,6 +383,8 @@ out: | |||
383 | g2d_userptr->npages, | 383 | g2d_userptr->npages, |
384 | g2d_userptr->vma); | 384 | g2d_userptr->vma); |
385 | 385 | ||
386 | exynos_gem_put_vma(g2d_userptr->vma); | ||
387 | |||
386 | if (!g2d_userptr->out_of_list) | 388 | if (!g2d_userptr->out_of_list) |
387 | list_del_init(&g2d_userptr->list); | 389 | list_del_init(&g2d_userptr->list); |
388 | 390 | ||
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 8600c315b4c4..ccdbecca070d 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h | |||
@@ -1816,6 +1816,7 @@ struct drm_i915_file_private { | |||
1816 | #define HAS_POWER_WELL(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev)) | 1816 | #define HAS_POWER_WELL(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev)) |
1817 | #define HAS_FPGA_DBG_UNCLAIMED(dev) (INTEL_INFO(dev)->has_fpga_dbg) | 1817 | #define HAS_FPGA_DBG_UNCLAIMED(dev) (INTEL_INFO(dev)->has_fpga_dbg) |
1818 | #define HAS_PSR(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev)) | 1818 | #define HAS_PSR(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev)) |
1819 | #define HAS_PC8(dev) (IS_HASWELL(dev)) /* XXX HSW:ULX */ | ||
1819 | 1820 | ||
1820 | #define INTEL_PCH_DEVICE_ID_MASK 0xff00 | 1821 | #define INTEL_PCH_DEVICE_ID_MASK 0xff00 |
1821 | #define INTEL_PCH_IBX_DEVICE_ID_TYPE 0x3b00 | 1822 | #define INTEL_PCH_IBX_DEVICE_ID_TYPE 0x3b00 |
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c index 6dd622d733b9..e4fba39631a5 100644 --- a/drivers/gpu/drm/i915/intel_bios.c +++ b/drivers/gpu/drm/i915/intel_bios.c | |||
@@ -790,7 +790,12 @@ init_vbt_defaults(struct drm_i915_private *dev_priv) | |||
790 | 790 | ||
791 | /* Default to using SSC */ | 791 | /* Default to using SSC */ |
792 | dev_priv->vbt.lvds_use_ssc = 1; | 792 | dev_priv->vbt.lvds_use_ssc = 1; |
793 | dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev, 1); | 793 | /* |
794 | * Core/SandyBridge/IvyBridge use alternative (120MHz) reference | ||
795 | * clock for LVDS. | ||
796 | */ | ||
797 | dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev, | ||
798 | !HAS_PCH_SPLIT(dev)); | ||
794 | DRM_DEBUG_KMS("Set default to SSC at %dMHz\n", dev_priv->vbt.lvds_ssc_freq); | 799 | DRM_DEBUG_KMS("Set default to SSC at %dMHz\n", dev_priv->vbt.lvds_ssc_freq); |
795 | 800 | ||
796 | for (port = PORT_A; port < I915_MAX_PORTS; port++) { | 801 | for (port = PORT_A; port < I915_MAX_PORTS; port++) { |
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 1591576a6101..330077bcd0bd 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c | |||
@@ -1406,6 +1406,26 @@ void intel_ddi_get_config(struct intel_encoder *encoder, | |||
1406 | default: | 1406 | default: |
1407 | break; | 1407 | break; |
1408 | } | 1408 | } |
1409 | |||
1410 | if (encoder->type == INTEL_OUTPUT_EDP && dev_priv->vbt.edp_bpp && | ||
1411 | pipe_config->pipe_bpp > dev_priv->vbt.edp_bpp) { | ||
1412 | /* | ||
1413 | * This is a big fat ugly hack. | ||
1414 | * | ||
1415 | * Some machines in UEFI boot mode provide us a VBT that has 18 | ||
1416 | * bpp and 1.62 GHz link bandwidth for eDP, which for reasons | ||
1417 | * unknown we fail to light up. Yet the same BIOS boots up with | ||
1418 | * 24 bpp and 2.7 GHz link. Use the same bpp as the BIOS uses as | ||
1419 | * max, not what it tells us to use. | ||
1420 | * | ||
1421 | * Note: This will still be broken if the eDP panel is not lit | ||
1422 | * up by the BIOS, and thus we can't get the mode at module | ||
1423 | * load. | ||
1424 | */ | ||
1425 | DRM_DEBUG_KMS("pipe has %d bpp for eDP panel, overriding BIOS-provided max %d bpp\n", | ||
1426 | pipe_config->pipe_bpp, dev_priv->vbt.edp_bpp); | ||
1427 | dev_priv->vbt.edp_bpp = pipe_config->pipe_bpp; | ||
1428 | } | ||
1409 | } | 1429 | } |
1410 | 1430 | ||
1411 | static void intel_ddi_destroy(struct drm_encoder *encoder) | 1431 | static void intel_ddi_destroy(struct drm_encoder *encoder) |
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 3cddd508d110..7ec8b488bb1d 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -6518,6 +6518,9 @@ static void __hsw_disable_package_c8(struct drm_i915_private *dev_priv) | |||
6518 | 6518 | ||
6519 | void hsw_enable_package_c8(struct drm_i915_private *dev_priv) | 6519 | void hsw_enable_package_c8(struct drm_i915_private *dev_priv) |
6520 | { | 6520 | { |
6521 | if (!HAS_PC8(dev_priv->dev)) | ||
6522 | return; | ||
6523 | |||
6521 | mutex_lock(&dev_priv->pc8.lock); | 6524 | mutex_lock(&dev_priv->pc8.lock); |
6522 | __hsw_enable_package_c8(dev_priv); | 6525 | __hsw_enable_package_c8(dev_priv); |
6523 | mutex_unlock(&dev_priv->pc8.lock); | 6526 | mutex_unlock(&dev_priv->pc8.lock); |
@@ -6525,6 +6528,9 @@ void hsw_enable_package_c8(struct drm_i915_private *dev_priv) | |||
6525 | 6528 | ||
6526 | void hsw_disable_package_c8(struct drm_i915_private *dev_priv) | 6529 | void hsw_disable_package_c8(struct drm_i915_private *dev_priv) |
6527 | { | 6530 | { |
6531 | if (!HAS_PC8(dev_priv->dev)) | ||
6532 | return; | ||
6533 | |||
6528 | mutex_lock(&dev_priv->pc8.lock); | 6534 | mutex_lock(&dev_priv->pc8.lock); |
6529 | __hsw_disable_package_c8(dev_priv); | 6535 | __hsw_disable_package_c8(dev_priv); |
6530 | mutex_unlock(&dev_priv->pc8.lock); | 6536 | mutex_unlock(&dev_priv->pc8.lock); |
@@ -6562,6 +6568,9 @@ static void hsw_update_package_c8(struct drm_device *dev) | |||
6562 | struct drm_i915_private *dev_priv = dev->dev_private; | 6568 | struct drm_i915_private *dev_priv = dev->dev_private; |
6563 | bool allow; | 6569 | bool allow; |
6564 | 6570 | ||
6571 | if (!HAS_PC8(dev_priv->dev)) | ||
6572 | return; | ||
6573 | |||
6565 | if (!i915_enable_pc8) | 6574 | if (!i915_enable_pc8) |
6566 | return; | 6575 | return; |
6567 | 6576 | ||
@@ -6585,18 +6594,28 @@ done: | |||
6585 | 6594 | ||
6586 | static void hsw_package_c8_gpu_idle(struct drm_i915_private *dev_priv) | 6595 | static void hsw_package_c8_gpu_idle(struct drm_i915_private *dev_priv) |
6587 | { | 6596 | { |
6597 | if (!HAS_PC8(dev_priv->dev)) | ||
6598 | return; | ||
6599 | |||
6600 | mutex_lock(&dev_priv->pc8.lock); | ||
6588 | if (!dev_priv->pc8.gpu_idle) { | 6601 | if (!dev_priv->pc8.gpu_idle) { |
6589 | dev_priv->pc8.gpu_idle = true; | 6602 | dev_priv->pc8.gpu_idle = true; |
6590 | hsw_enable_package_c8(dev_priv); | 6603 | __hsw_enable_package_c8(dev_priv); |
6591 | } | 6604 | } |
6605 | mutex_unlock(&dev_priv->pc8.lock); | ||
6592 | } | 6606 | } |
6593 | 6607 | ||
6594 | static void hsw_package_c8_gpu_busy(struct drm_i915_private *dev_priv) | 6608 | static void hsw_package_c8_gpu_busy(struct drm_i915_private *dev_priv) |
6595 | { | 6609 | { |
6610 | if (!HAS_PC8(dev_priv->dev)) | ||
6611 | return; | ||
6612 | |||
6613 | mutex_lock(&dev_priv->pc8.lock); | ||
6596 | if (dev_priv->pc8.gpu_idle) { | 6614 | if (dev_priv->pc8.gpu_idle) { |
6597 | dev_priv->pc8.gpu_idle = false; | 6615 | dev_priv->pc8.gpu_idle = false; |
6598 | hsw_disable_package_c8(dev_priv); | 6616 | __hsw_disable_package_c8(dev_priv); |
6599 | } | 6617 | } |
6618 | mutex_unlock(&dev_priv->pc8.lock); | ||
6600 | } | 6619 | } |
6601 | 6620 | ||
6602 | #define for_each_power_domain(domain, mask) \ | 6621 | #define for_each_power_domain(domain, mask) \ |
@@ -7184,7 +7203,9 @@ static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base) | |||
7184 | intel_crtc->cursor_visible = visible; | 7203 | intel_crtc->cursor_visible = visible; |
7185 | } | 7204 | } |
7186 | /* and commit changes on next vblank */ | 7205 | /* and commit changes on next vblank */ |
7206 | POSTING_READ(CURCNTR(pipe)); | ||
7187 | I915_WRITE(CURBASE(pipe), base); | 7207 | I915_WRITE(CURBASE(pipe), base); |
7208 | POSTING_READ(CURBASE(pipe)); | ||
7188 | } | 7209 | } |
7189 | 7210 | ||
7190 | static void ivb_update_cursor(struct drm_crtc *crtc, u32 base) | 7211 | static void ivb_update_cursor(struct drm_crtc *crtc, u32 base) |
@@ -7213,7 +7234,9 @@ static void ivb_update_cursor(struct drm_crtc *crtc, u32 base) | |||
7213 | intel_crtc->cursor_visible = visible; | 7234 | intel_crtc->cursor_visible = visible; |
7214 | } | 7235 | } |
7215 | /* and commit changes on next vblank */ | 7236 | /* and commit changes on next vblank */ |
7237 | POSTING_READ(CURCNTR_IVB(pipe)); | ||
7216 | I915_WRITE(CURBASE_IVB(pipe), base); | 7238 | I915_WRITE(CURBASE_IVB(pipe), base); |
7239 | POSTING_READ(CURBASE_IVB(pipe)); | ||
7217 | } | 7240 | } |
7218 | 7241 | ||
7219 | /* If no-part of the cursor is visible on the framebuffer, then the GPU may hang... */ | 7242 | /* If no-part of the cursor is visible on the framebuffer, then the GPU may hang... */ |
@@ -9248,8 +9271,7 @@ check_crtc_state(struct drm_device *dev) | |||
9248 | enum pipe pipe; | 9271 | enum pipe pipe; |
9249 | if (encoder->base.crtc != &crtc->base) | 9272 | if (encoder->base.crtc != &crtc->base) |
9250 | continue; | 9273 | continue; |
9251 | if (encoder->get_config && | 9274 | if (encoder->get_hw_state(encoder, &pipe)) |
9252 | encoder->get_hw_state(encoder, &pipe)) | ||
9253 | encoder->get_config(encoder, &pipe_config); | 9275 | encoder->get_config(encoder, &pipe_config); |
9254 | } | 9276 | } |
9255 | 9277 | ||
@@ -10909,8 +10931,7 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev) | |||
10909 | if (encoder->get_hw_state(encoder, &pipe)) { | 10931 | if (encoder->get_hw_state(encoder, &pipe)) { |
10910 | crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]); | 10932 | crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]); |
10911 | encoder->base.crtc = &crtc->base; | 10933 | encoder->base.crtc = &crtc->base; |
10912 | if (encoder->get_config) | 10934 | encoder->get_config(encoder, &crtc->config); |
10913 | encoder->get_config(encoder, &crtc->config); | ||
10914 | } else { | 10935 | } else { |
10915 | encoder->base.crtc = NULL; | 10936 | encoder->base.crtc = NULL; |
10916 | } | 10937 | } |
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index eb8139da9763..0b2e842fef01 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c | |||
@@ -1774,7 +1774,7 @@ static void intel_disable_dp(struct intel_encoder *encoder) | |||
1774 | * ensure that we have vdd while we switch off the panel. */ | 1774 | * ensure that we have vdd while we switch off the panel. */ |
1775 | ironlake_edp_panel_vdd_on(intel_dp); | 1775 | ironlake_edp_panel_vdd_on(intel_dp); |
1776 | ironlake_edp_backlight_off(intel_dp); | 1776 | ironlake_edp_backlight_off(intel_dp); |
1777 | intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); | 1777 | intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF); |
1778 | ironlake_edp_panel_off(intel_dp); | 1778 | ironlake_edp_panel_off(intel_dp); |
1779 | 1779 | ||
1780 | /* cpu edp my only be disable _after_ the cpu pipe/plane is disabled. */ | 1780 | /* cpu edp my only be disable _after_ the cpu pipe/plane is disabled. */ |
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 0a07d7c9cafc..caf2ee4e5441 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c | |||
@@ -1625,7 +1625,7 @@ static void i9xx_update_wm(struct drm_crtc *unused_crtc) | |||
1625 | &to_intel_crtc(enabled)->config.adjusted_mode; | 1625 | &to_intel_crtc(enabled)->config.adjusted_mode; |
1626 | int clock = adjusted_mode->crtc_clock; | 1626 | int clock = adjusted_mode->crtc_clock; |
1627 | int htotal = adjusted_mode->htotal; | 1627 | int htotal = adjusted_mode->htotal; |
1628 | int hdisplay = to_intel_crtc(crtc)->config.pipe_src_w; | 1628 | int hdisplay = to_intel_crtc(enabled)->config.pipe_src_w; |
1629 | int pixel_size = enabled->fb->bits_per_pixel / 8; | 1629 | int pixel_size = enabled->fb->bits_per_pixel / 8; |
1630 | unsigned long line_time_us; | 1630 | unsigned long line_time_us; |
1631 | int entries; | 1631 | int entries; |
@@ -3888,7 +3888,7 @@ static void gen6_enable_rps(struct drm_device *dev) | |||
3888 | 3888 | ||
3889 | I915_WRITE(GEN6_RC_SLEEP, 0); | 3889 | I915_WRITE(GEN6_RC_SLEEP, 0); |
3890 | I915_WRITE(GEN6_RC1e_THRESHOLD, 1000); | 3890 | I915_WRITE(GEN6_RC1e_THRESHOLD, 1000); |
3891 | if (INTEL_INFO(dev)->gen <= 6 || IS_IVYBRIDGE(dev)) | 3891 | if (IS_IVYBRIDGE(dev)) |
3892 | I915_WRITE(GEN6_RC6_THRESHOLD, 125000); | 3892 | I915_WRITE(GEN6_RC6_THRESHOLD, 125000); |
3893 | else | 3893 | else |
3894 | I915_WRITE(GEN6_RC6_THRESHOLD, 50000); | 3894 | I915_WRITE(GEN6_RC6_THRESHOLD, 50000); |
diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c index 18c406246a2d..22cf0f4ba248 100644 --- a/drivers/gpu/drm/i915/intel_tv.c +++ b/drivers/gpu/drm/i915/intel_tv.c | |||
@@ -902,6 +902,13 @@ intel_tv_mode_valid(struct drm_connector *connector, | |||
902 | } | 902 | } |
903 | 903 | ||
904 | 904 | ||
905 | static void | ||
906 | intel_tv_get_config(struct intel_encoder *encoder, | ||
907 | struct intel_crtc_config *pipe_config) | ||
908 | { | ||
909 | pipe_config->adjusted_mode.crtc_clock = pipe_config->port_clock; | ||
910 | } | ||
911 | |||
905 | static bool | 912 | static bool |
906 | intel_tv_compute_config(struct intel_encoder *encoder, | 913 | intel_tv_compute_config(struct intel_encoder *encoder, |
907 | struct intel_crtc_config *pipe_config) | 914 | struct intel_crtc_config *pipe_config) |
@@ -1621,6 +1628,7 @@ intel_tv_init(struct drm_device *dev) | |||
1621 | DRM_MODE_ENCODER_TVDAC); | 1628 | DRM_MODE_ENCODER_TVDAC); |
1622 | 1629 | ||
1623 | intel_encoder->compute_config = intel_tv_compute_config; | 1630 | intel_encoder->compute_config = intel_tv_compute_config; |
1631 | intel_encoder->get_config = intel_tv_get_config; | ||
1624 | intel_encoder->mode_set = intel_tv_mode_set; | 1632 | intel_encoder->mode_set = intel_tv_mode_set; |
1625 | intel_encoder->enable = intel_enable_tv; | 1633 | intel_encoder->enable = intel_enable_tv; |
1626 | intel_encoder->disable = intel_disable_tv; | 1634 | intel_encoder->disable = intel_disable_tv; |
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index f9883ceff946..0b02078a0b84 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c | |||
@@ -217,6 +217,19 @@ static void gen6_force_wake_work(struct work_struct *work) | |||
217 | spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); | 217 | spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); |
218 | } | 218 | } |
219 | 219 | ||
220 | static void intel_uncore_forcewake_reset(struct drm_device *dev) | ||
221 | { | ||
222 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
223 | |||
224 | if (IS_VALLEYVIEW(dev)) { | ||
225 | vlv_force_wake_reset(dev_priv); | ||
226 | } else if (INTEL_INFO(dev)->gen >= 6) { | ||
227 | __gen6_gt_force_wake_reset(dev_priv); | ||
228 | if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev)) | ||
229 | __gen6_gt_force_wake_mt_reset(dev_priv); | ||
230 | } | ||
231 | } | ||
232 | |||
220 | void intel_uncore_early_sanitize(struct drm_device *dev) | 233 | void intel_uncore_early_sanitize(struct drm_device *dev) |
221 | { | 234 | { |
222 | struct drm_i915_private *dev_priv = dev->dev_private; | 235 | struct drm_i915_private *dev_priv = dev->dev_private; |
@@ -234,19 +247,8 @@ void intel_uncore_early_sanitize(struct drm_device *dev) | |||
234 | dev_priv->ellc_size = 128; | 247 | dev_priv->ellc_size = 128; |
235 | DRM_INFO("Found %zuMB of eLLC\n", dev_priv->ellc_size); | 248 | DRM_INFO("Found %zuMB of eLLC\n", dev_priv->ellc_size); |
236 | } | 249 | } |
237 | } | ||
238 | 250 | ||
239 | static void intel_uncore_forcewake_reset(struct drm_device *dev) | 251 | intel_uncore_forcewake_reset(dev); |
240 | { | ||
241 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
242 | |||
243 | if (IS_VALLEYVIEW(dev)) { | ||
244 | vlv_force_wake_reset(dev_priv); | ||
245 | } else if (INTEL_INFO(dev)->gen >= 6) { | ||
246 | __gen6_gt_force_wake_reset(dev_priv); | ||
247 | if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev)) | ||
248 | __gen6_gt_force_wake_mt_reset(dev_priv); | ||
249 | } | ||
250 | } | 252 | } |
251 | 253 | ||
252 | void intel_uncore_sanitize(struct drm_device *dev) | 254 | void intel_uncore_sanitize(struct drm_device *dev) |
diff --git a/drivers/gpu/drm/radeon/atombios_i2c.c b/drivers/gpu/drm/radeon/atombios_i2c.c index deaf98cdca3a..0652ee0a2098 100644 --- a/drivers/gpu/drm/radeon/atombios_i2c.c +++ b/drivers/gpu/drm/radeon/atombios_i2c.c | |||
@@ -56,8 +56,10 @@ static int radeon_process_i2c_ch(struct radeon_i2c_chan *chan, | |||
56 | return -EINVAL; | 56 | return -EINVAL; |
57 | } | 57 | } |
58 | args.ucRegIndex = buf[0]; | 58 | args.ucRegIndex = buf[0]; |
59 | if (num > 1) | 59 | if (num > 1) { |
60 | memcpy(&out, &buf[1], num - 1); | 60 | num--; |
61 | memcpy(&out, &buf[1], num); | ||
62 | } | ||
61 | args.lpI2CDataOut = cpu_to_le16(out); | 63 | args.lpI2CDataOut = cpu_to_le16(out); |
62 | } else { | 64 | } else { |
63 | if (num > ATOM_MAX_HW_I2C_READ) { | 65 | if (num > ATOM_MAX_HW_I2C_READ) { |
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c index ae92aa041c6a..b43a3a3c9067 100644 --- a/drivers/gpu/drm/radeon/cik.c +++ b/drivers/gpu/drm/radeon/cik.c | |||
@@ -1560,17 +1560,17 @@ u32 cik_get_xclk(struct radeon_device *rdev) | |||
1560 | * cik_mm_rdoorbell - read a doorbell dword | 1560 | * cik_mm_rdoorbell - read a doorbell dword |
1561 | * | 1561 | * |
1562 | * @rdev: radeon_device pointer | 1562 | * @rdev: radeon_device pointer |
1563 | * @offset: byte offset into the aperture | 1563 | * @index: doorbell index |
1564 | * | 1564 | * |
1565 | * Returns the value in the doorbell aperture at the | 1565 | * Returns the value in the doorbell aperture at the |
1566 | * requested offset (CIK). | 1566 | * requested doorbell index (CIK). |
1567 | */ | 1567 | */ |
1568 | u32 cik_mm_rdoorbell(struct radeon_device *rdev, u32 offset) | 1568 | u32 cik_mm_rdoorbell(struct radeon_device *rdev, u32 index) |
1569 | { | 1569 | { |
1570 | if (offset < rdev->doorbell.size) { | 1570 | if (index < rdev->doorbell.num_doorbells) { |
1571 | return readl(((void __iomem *)rdev->doorbell.ptr) + offset); | 1571 | return readl(rdev->doorbell.ptr + index); |
1572 | } else { | 1572 | } else { |
1573 | DRM_ERROR("reading beyond doorbell aperture: 0x%08x!\n", offset); | 1573 | DRM_ERROR("reading beyond doorbell aperture: 0x%08x!\n", index); |
1574 | return 0; | 1574 | return 0; |
1575 | } | 1575 | } |
1576 | } | 1576 | } |
@@ -1579,18 +1579,18 @@ u32 cik_mm_rdoorbell(struct radeon_device *rdev, u32 offset) | |||
1579 | * cik_mm_wdoorbell - write a doorbell dword | 1579 | * cik_mm_wdoorbell - write a doorbell dword |
1580 | * | 1580 | * |
1581 | * @rdev: radeon_device pointer | 1581 | * @rdev: radeon_device pointer |
1582 | * @offset: byte offset into the aperture | 1582 | * @index: doorbell index |
1583 | * @v: value to write | 1583 | * @v: value to write |
1584 | * | 1584 | * |
1585 | * Writes @v to the doorbell aperture at the | 1585 | * Writes @v to the doorbell aperture at the |
1586 | * requested offset (CIK). | 1586 | * requested doorbell index (CIK). |
1587 | */ | 1587 | */ |
1588 | void cik_mm_wdoorbell(struct radeon_device *rdev, u32 offset, u32 v) | 1588 | void cik_mm_wdoorbell(struct radeon_device *rdev, u32 index, u32 v) |
1589 | { | 1589 | { |
1590 | if (offset < rdev->doorbell.size) { | 1590 | if (index < rdev->doorbell.num_doorbells) { |
1591 | writel(v, ((void __iomem *)rdev->doorbell.ptr) + offset); | 1591 | writel(v, rdev->doorbell.ptr + index); |
1592 | } else { | 1592 | } else { |
1593 | DRM_ERROR("writing beyond doorbell aperture: 0x%08x!\n", offset); | 1593 | DRM_ERROR("writing beyond doorbell aperture: 0x%08x!\n", index); |
1594 | } | 1594 | } |
1595 | } | 1595 | } |
1596 | 1596 | ||
@@ -2427,6 +2427,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev) | |||
2427 | gb_tile_moden = 0; | 2427 | gb_tile_moden = 0; |
2428 | break; | 2428 | break; |
2429 | } | 2429 | } |
2430 | rdev->config.cik.macrotile_mode_array[reg_offset] = gb_tile_moden; | ||
2430 | WREG32(GB_MACROTILE_MODE0 + (reg_offset * 4), gb_tile_moden); | 2431 | WREG32(GB_MACROTILE_MODE0 + (reg_offset * 4), gb_tile_moden); |
2431 | } | 2432 | } |
2432 | } else if (num_pipe_configs == 4) { | 2433 | } else if (num_pipe_configs == 4) { |
@@ -2773,6 +2774,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev) | |||
2773 | gb_tile_moden = 0; | 2774 | gb_tile_moden = 0; |
2774 | break; | 2775 | break; |
2775 | } | 2776 | } |
2777 | rdev->config.cik.macrotile_mode_array[reg_offset] = gb_tile_moden; | ||
2776 | WREG32(GB_MACROTILE_MODE0 + (reg_offset * 4), gb_tile_moden); | 2778 | WREG32(GB_MACROTILE_MODE0 + (reg_offset * 4), gb_tile_moden); |
2777 | } | 2779 | } |
2778 | } else if (num_pipe_configs == 2) { | 2780 | } else if (num_pipe_configs == 2) { |
@@ -2990,6 +2992,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev) | |||
2990 | gb_tile_moden = 0; | 2992 | gb_tile_moden = 0; |
2991 | break; | 2993 | break; |
2992 | } | 2994 | } |
2995 | rdev->config.cik.macrotile_mode_array[reg_offset] = gb_tile_moden; | ||
2993 | WREG32(GB_MACROTILE_MODE0 + (reg_offset * 4), gb_tile_moden); | 2996 | WREG32(GB_MACROTILE_MODE0 + (reg_offset * 4), gb_tile_moden); |
2994 | } | 2997 | } |
2995 | } else | 2998 | } else |
@@ -3556,17 +3559,24 @@ void cik_fence_compute_ring_emit(struct radeon_device *rdev, | |||
3556 | radeon_ring_write(ring, 0); | 3559 | radeon_ring_write(ring, 0); |
3557 | } | 3560 | } |
3558 | 3561 | ||
3559 | void cik_semaphore_ring_emit(struct radeon_device *rdev, | 3562 | bool cik_semaphore_ring_emit(struct radeon_device *rdev, |
3560 | struct radeon_ring *ring, | 3563 | struct radeon_ring *ring, |
3561 | struct radeon_semaphore *semaphore, | 3564 | struct radeon_semaphore *semaphore, |
3562 | bool emit_wait) | 3565 | bool emit_wait) |
3563 | { | 3566 | { |
3567 | /* TODO: figure out why semaphore cause lockups */ | ||
3568 | #if 0 | ||
3564 | uint64_t addr = semaphore->gpu_addr; | 3569 | uint64_t addr = semaphore->gpu_addr; |
3565 | unsigned sel = emit_wait ? PACKET3_SEM_SEL_WAIT : PACKET3_SEM_SEL_SIGNAL; | 3570 | unsigned sel = emit_wait ? PACKET3_SEM_SEL_WAIT : PACKET3_SEM_SEL_SIGNAL; |
3566 | 3571 | ||
3567 | radeon_ring_write(ring, PACKET3(PACKET3_MEM_SEMAPHORE, 1)); | 3572 | radeon_ring_write(ring, PACKET3(PACKET3_MEM_SEMAPHORE, 1)); |
3568 | radeon_ring_write(ring, addr & 0xffffffff); | 3573 | radeon_ring_write(ring, addr & 0xffffffff); |
3569 | radeon_ring_write(ring, (upper_32_bits(addr) & 0xffff) | sel); | 3574 | radeon_ring_write(ring, (upper_32_bits(addr) & 0xffff) | sel); |
3575 | |||
3576 | return true; | ||
3577 | #else | ||
3578 | return false; | ||
3579 | #endif | ||
3570 | } | 3580 | } |
3571 | 3581 | ||
3572 | /** | 3582 | /** |
@@ -3609,13 +3619,8 @@ int cik_copy_cpdma(struct radeon_device *rdev, | |||
3609 | return r; | 3619 | return r; |
3610 | } | 3620 | } |
3611 | 3621 | ||
3612 | if (radeon_fence_need_sync(*fence, ring->idx)) { | 3622 | radeon_semaphore_sync_to(sem, *fence); |
3613 | radeon_semaphore_sync_rings(rdev, sem, (*fence)->ring, | 3623 | radeon_semaphore_sync_rings(rdev, sem, ring->idx); |
3614 | ring->idx); | ||
3615 | radeon_fence_note_sync(*fence, ring->idx); | ||
3616 | } else { | ||
3617 | radeon_semaphore_free(rdev, &sem, NULL); | ||
3618 | } | ||
3619 | 3624 | ||
3620 | for (i = 0; i < num_loops; i++) { | 3625 | for (i = 0; i < num_loops; i++) { |
3621 | cur_size_in_bytes = size_in_bytes; | 3626 | cur_size_in_bytes = size_in_bytes; |
@@ -4052,7 +4057,7 @@ void cik_compute_ring_set_wptr(struct radeon_device *rdev, | |||
4052 | struct radeon_ring *ring) | 4057 | struct radeon_ring *ring) |
4053 | { | 4058 | { |
4054 | rdev->wb.wb[ring->wptr_offs/4] = cpu_to_le32(ring->wptr); | 4059 | rdev->wb.wb[ring->wptr_offs/4] = cpu_to_le32(ring->wptr); |
4055 | WDOORBELL32(ring->doorbell_offset, ring->wptr); | 4060 | WDOORBELL32(ring->doorbell_index, ring->wptr); |
4056 | } | 4061 | } |
4057 | 4062 | ||
4058 | /** | 4063 | /** |
@@ -4393,10 +4398,6 @@ static int cik_cp_compute_resume(struct radeon_device *rdev) | |||
4393 | return r; | 4398 | return r; |
4394 | } | 4399 | } |
4395 | 4400 | ||
4396 | /* doorbell offset */ | ||
4397 | rdev->ring[idx].doorbell_offset = | ||
4398 | (rdev->ring[idx].doorbell_page_num * PAGE_SIZE) + 0; | ||
4399 | |||
4400 | /* init the mqd struct */ | 4401 | /* init the mqd struct */ |
4401 | memset(buf, 0, sizeof(struct bonaire_mqd)); | 4402 | memset(buf, 0, sizeof(struct bonaire_mqd)); |
4402 | 4403 | ||
@@ -4508,7 +4509,7 @@ static int cik_cp_compute_resume(struct radeon_device *rdev) | |||
4508 | RREG32(CP_HQD_PQ_DOORBELL_CONTROL); | 4509 | RREG32(CP_HQD_PQ_DOORBELL_CONTROL); |
4509 | mqd->queue_state.cp_hqd_pq_doorbell_control &= ~DOORBELL_OFFSET_MASK; | 4510 | mqd->queue_state.cp_hqd_pq_doorbell_control &= ~DOORBELL_OFFSET_MASK; |
4510 | mqd->queue_state.cp_hqd_pq_doorbell_control |= | 4511 | mqd->queue_state.cp_hqd_pq_doorbell_control |= |
4511 | DOORBELL_OFFSET(rdev->ring[idx].doorbell_offset / 4); | 4512 | DOORBELL_OFFSET(rdev->ring[idx].doorbell_index); |
4512 | mqd->queue_state.cp_hqd_pq_doorbell_control |= DOORBELL_EN; | 4513 | mqd->queue_state.cp_hqd_pq_doorbell_control |= DOORBELL_EN; |
4513 | mqd->queue_state.cp_hqd_pq_doorbell_control &= | 4514 | mqd->queue_state.cp_hqd_pq_doorbell_control &= |
4514 | ~(DOORBELL_SOURCE | DOORBELL_HIT); | 4515 | ~(DOORBELL_SOURCE | DOORBELL_HIT); |
@@ -7839,14 +7840,14 @@ int cik_init(struct radeon_device *rdev) | |||
7839 | ring = &rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX]; | 7840 | ring = &rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX]; |
7840 | ring->ring_obj = NULL; | 7841 | ring->ring_obj = NULL; |
7841 | r600_ring_init(rdev, ring, 1024 * 1024); | 7842 | r600_ring_init(rdev, ring, 1024 * 1024); |
7842 | r = radeon_doorbell_get(rdev, &ring->doorbell_page_num); | 7843 | r = radeon_doorbell_get(rdev, &ring->doorbell_index); |
7843 | if (r) | 7844 | if (r) |
7844 | return r; | 7845 | return r; |
7845 | 7846 | ||
7846 | ring = &rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX]; | 7847 | ring = &rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX]; |
7847 | ring->ring_obj = NULL; | 7848 | ring->ring_obj = NULL; |
7848 | r600_ring_init(rdev, ring, 1024 * 1024); | 7849 | r600_ring_init(rdev, ring, 1024 * 1024); |
7849 | r = radeon_doorbell_get(rdev, &ring->doorbell_page_num); | 7850 | r = radeon_doorbell_get(rdev, &ring->doorbell_index); |
7850 | if (r) | 7851 | if (r) |
7851 | return r; | 7852 | return r; |
7852 | 7853 | ||
diff --git a/drivers/gpu/drm/radeon/cik_sdma.c b/drivers/gpu/drm/radeon/cik_sdma.c index 9c9529de20ee..0300727a4f70 100644 --- a/drivers/gpu/drm/radeon/cik_sdma.c +++ b/drivers/gpu/drm/radeon/cik_sdma.c | |||
@@ -130,7 +130,7 @@ void cik_sdma_fence_ring_emit(struct radeon_device *rdev, | |||
130 | * Add a DMA semaphore packet to the ring wait on or signal | 130 | * Add a DMA semaphore packet to the ring wait on or signal |
131 | * other rings (CIK). | 131 | * other rings (CIK). |
132 | */ | 132 | */ |
133 | void cik_sdma_semaphore_ring_emit(struct radeon_device *rdev, | 133 | bool cik_sdma_semaphore_ring_emit(struct radeon_device *rdev, |
134 | struct radeon_ring *ring, | 134 | struct radeon_ring *ring, |
135 | struct radeon_semaphore *semaphore, | 135 | struct radeon_semaphore *semaphore, |
136 | bool emit_wait) | 136 | bool emit_wait) |
@@ -141,6 +141,8 @@ void cik_sdma_semaphore_ring_emit(struct radeon_device *rdev, | |||
141 | radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SEMAPHORE, 0, extra_bits)); | 141 | radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SEMAPHORE, 0, extra_bits)); |
142 | radeon_ring_write(ring, addr & 0xfffffff8); | 142 | radeon_ring_write(ring, addr & 0xfffffff8); |
143 | radeon_ring_write(ring, upper_32_bits(addr) & 0xffffffff); | 143 | radeon_ring_write(ring, upper_32_bits(addr) & 0xffffffff); |
144 | |||
145 | return true; | ||
144 | } | 146 | } |
145 | 147 | ||
146 | /** | 148 | /** |
@@ -443,13 +445,8 @@ int cik_copy_dma(struct radeon_device *rdev, | |||
443 | return r; | 445 | return r; |
444 | } | 446 | } |
445 | 447 | ||
446 | if (radeon_fence_need_sync(*fence, ring->idx)) { | 448 | radeon_semaphore_sync_to(sem, *fence); |
447 | radeon_semaphore_sync_rings(rdev, sem, (*fence)->ring, | 449 | radeon_semaphore_sync_rings(rdev, sem, ring->idx); |
448 | ring->idx); | ||
449 | radeon_fence_note_sync(*fence, ring->idx); | ||
450 | } else { | ||
451 | radeon_semaphore_free(rdev, &sem, NULL); | ||
452 | } | ||
453 | 450 | ||
454 | for (i = 0; i < num_loops; i++) { | 451 | for (i = 0; i < num_loops; i++) { |
455 | cur_size_in_bytes = size_in_bytes; | 452 | cur_size_in_bytes = size_in_bytes; |
diff --git a/drivers/gpu/drm/radeon/cypress_dpm.c b/drivers/gpu/drm/radeon/cypress_dpm.c index 91bb470de0a3..920e1e4a52c5 100644 --- a/drivers/gpu/drm/radeon/cypress_dpm.c +++ b/drivers/gpu/drm/radeon/cypress_dpm.c | |||
@@ -299,7 +299,9 @@ void cypress_program_response_times(struct radeon_device *rdev) | |||
299 | static int cypress_pcie_performance_request(struct radeon_device *rdev, | 299 | static int cypress_pcie_performance_request(struct radeon_device *rdev, |
300 | u8 perf_req, bool advertise) | 300 | u8 perf_req, bool advertise) |
301 | { | 301 | { |
302 | #if defined(CONFIG_ACPI) | ||
302 | struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); | 303 | struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); |
304 | #endif | ||
303 | u32 tmp; | 305 | u32 tmp; |
304 | 306 | ||
305 | udelay(10); | 307 | udelay(10); |
diff --git a/drivers/gpu/drm/radeon/evergreen_dma.c b/drivers/gpu/drm/radeon/evergreen_dma.c index 6a0656d00ed0..a37b54436382 100644 --- a/drivers/gpu/drm/radeon/evergreen_dma.c +++ b/drivers/gpu/drm/radeon/evergreen_dma.c | |||
@@ -131,13 +131,8 @@ int evergreen_copy_dma(struct radeon_device *rdev, | |||
131 | return r; | 131 | return r; |
132 | } | 132 | } |
133 | 133 | ||
134 | if (radeon_fence_need_sync(*fence, ring->idx)) { | 134 | radeon_semaphore_sync_to(sem, *fence); |
135 | radeon_semaphore_sync_rings(rdev, sem, (*fence)->ring, | 135 | radeon_semaphore_sync_rings(rdev, sem, ring->idx); |
136 | ring->idx); | ||
137 | radeon_fence_note_sync(*fence, ring->idx); | ||
138 | } else { | ||
139 | radeon_semaphore_free(rdev, &sem, NULL); | ||
140 | } | ||
141 | 136 | ||
142 | for (i = 0; i < num_loops; i++) { | 137 | for (i = 0; i < num_loops; i++) { |
143 | cur_size_in_dw = size_in_dw; | 138 | cur_size_in_dw = size_in_dw; |
diff --git a/drivers/gpu/drm/radeon/ni_dpm.c b/drivers/gpu/drm/radeon/ni_dpm.c index f26339028154..cdc003085a76 100644 --- a/drivers/gpu/drm/radeon/ni_dpm.c +++ b/drivers/gpu/drm/radeon/ni_dpm.c | |||
@@ -3445,9 +3445,9 @@ static int ni_enable_smc_cac(struct radeon_device *rdev, | |||
3445 | static int ni_pcie_performance_request(struct radeon_device *rdev, | 3445 | static int ni_pcie_performance_request(struct radeon_device *rdev, |
3446 | u8 perf_req, bool advertise) | 3446 | u8 perf_req, bool advertise) |
3447 | { | 3447 | { |
3448 | #if defined(CONFIG_ACPI) | ||
3448 | struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); | 3449 | struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); |
3449 | 3450 | ||
3450 | #if defined(CONFIG_ACPI) | ||
3451 | if ((perf_req == PCIE_PERF_REQ_PECI_GEN1) || | 3451 | if ((perf_req == PCIE_PERF_REQ_PECI_GEN1) || |
3452 | (perf_req == PCIE_PERF_REQ_PECI_GEN2)) { | 3452 | (perf_req == PCIE_PERF_REQ_PECI_GEN2)) { |
3453 | if (eg_pi->pcie_performance_request_registered == false) | 3453 | if (eg_pi->pcie_performance_request_registered == false) |
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index 784983d78158..10abc4d5a6cc 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c | |||
@@ -869,13 +869,14 @@ void r100_fence_ring_emit(struct radeon_device *rdev, | |||
869 | radeon_ring_write(ring, RADEON_SW_INT_FIRE); | 869 | radeon_ring_write(ring, RADEON_SW_INT_FIRE); |
870 | } | 870 | } |
871 | 871 | ||
872 | void r100_semaphore_ring_emit(struct radeon_device *rdev, | 872 | bool r100_semaphore_ring_emit(struct radeon_device *rdev, |
873 | struct radeon_ring *ring, | 873 | struct radeon_ring *ring, |
874 | struct radeon_semaphore *semaphore, | 874 | struct radeon_semaphore *semaphore, |
875 | bool emit_wait) | 875 | bool emit_wait) |
876 | { | 876 | { |
877 | /* Unused on older asics, since we don't have semaphores or multiple rings */ | 877 | /* Unused on older asics, since we don't have semaphores or multiple rings */ |
878 | BUG(); | 878 | BUG(); |
879 | return false; | ||
879 | } | 880 | } |
880 | 881 | ||
881 | int r100_copy_blit(struct radeon_device *rdev, | 882 | int r100_copy_blit(struct radeon_device *rdev, |
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index 4e609e8a8d2b..9ad06732a78b 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c | |||
@@ -2650,7 +2650,7 @@ void r600_fence_ring_emit(struct radeon_device *rdev, | |||
2650 | } | 2650 | } |
2651 | } | 2651 | } |
2652 | 2652 | ||
2653 | void r600_semaphore_ring_emit(struct radeon_device *rdev, | 2653 | bool r600_semaphore_ring_emit(struct radeon_device *rdev, |
2654 | struct radeon_ring *ring, | 2654 | struct radeon_ring *ring, |
2655 | struct radeon_semaphore *semaphore, | 2655 | struct radeon_semaphore *semaphore, |
2656 | bool emit_wait) | 2656 | bool emit_wait) |
@@ -2664,6 +2664,8 @@ void r600_semaphore_ring_emit(struct radeon_device *rdev, | |||
2664 | radeon_ring_write(ring, PACKET3(PACKET3_MEM_SEMAPHORE, 1)); | 2664 | radeon_ring_write(ring, PACKET3(PACKET3_MEM_SEMAPHORE, 1)); |
2665 | radeon_ring_write(ring, addr & 0xffffffff); | 2665 | radeon_ring_write(ring, addr & 0xffffffff); |
2666 | radeon_ring_write(ring, (upper_32_bits(addr) & 0xff) | sel); | 2666 | radeon_ring_write(ring, (upper_32_bits(addr) & 0xff) | sel); |
2667 | |||
2668 | return true; | ||
2667 | } | 2669 | } |
2668 | 2670 | ||
2669 | /** | 2671 | /** |
@@ -2706,13 +2708,8 @@ int r600_copy_cpdma(struct radeon_device *rdev, | |||
2706 | return r; | 2708 | return r; |
2707 | } | 2709 | } |
2708 | 2710 | ||
2709 | if (radeon_fence_need_sync(*fence, ring->idx)) { | 2711 | radeon_semaphore_sync_to(sem, *fence); |
2710 | radeon_semaphore_sync_rings(rdev, sem, (*fence)->ring, | 2712 | radeon_semaphore_sync_rings(rdev, sem, ring->idx); |
2711 | ring->idx); | ||
2712 | radeon_fence_note_sync(*fence, ring->idx); | ||
2713 | } else { | ||
2714 | radeon_semaphore_free(rdev, &sem, NULL); | ||
2715 | } | ||
2716 | 2713 | ||
2717 | radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); | 2714 | radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); |
2718 | radeon_ring_write(ring, (WAIT_UNTIL - PACKET3_SET_CONFIG_REG_OFFSET) >> 2); | 2715 | radeon_ring_write(ring, (WAIT_UNTIL - PACKET3_SET_CONFIG_REG_OFFSET) >> 2); |
diff --git a/drivers/gpu/drm/radeon/r600_dma.c b/drivers/gpu/drm/radeon/r600_dma.c index 3b317456512a..7844d15c139f 100644 --- a/drivers/gpu/drm/radeon/r600_dma.c +++ b/drivers/gpu/drm/radeon/r600_dma.c | |||
@@ -311,7 +311,7 @@ void r600_dma_fence_ring_emit(struct radeon_device *rdev, | |||
311 | * Add a DMA semaphore packet to the ring wait on or signal | 311 | * Add a DMA semaphore packet to the ring wait on or signal |
312 | * other rings (r6xx-SI). | 312 | * other rings (r6xx-SI). |
313 | */ | 313 | */ |
314 | void r600_dma_semaphore_ring_emit(struct radeon_device *rdev, | 314 | bool r600_dma_semaphore_ring_emit(struct radeon_device *rdev, |
315 | struct radeon_ring *ring, | 315 | struct radeon_ring *ring, |
316 | struct radeon_semaphore *semaphore, | 316 | struct radeon_semaphore *semaphore, |
317 | bool emit_wait) | 317 | bool emit_wait) |
@@ -322,6 +322,8 @@ void r600_dma_semaphore_ring_emit(struct radeon_device *rdev, | |||
322 | radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_SEMAPHORE, 0, s, 0)); | 322 | radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_SEMAPHORE, 0, s, 0)); |
323 | radeon_ring_write(ring, addr & 0xfffffffc); | 323 | radeon_ring_write(ring, addr & 0xfffffffc); |
324 | radeon_ring_write(ring, upper_32_bits(addr) & 0xff); | 324 | radeon_ring_write(ring, upper_32_bits(addr) & 0xff); |
325 | |||
326 | return true; | ||
325 | } | 327 | } |
326 | 328 | ||
327 | /** | 329 | /** |
@@ -462,13 +464,8 @@ int r600_copy_dma(struct radeon_device *rdev, | |||
462 | return r; | 464 | return r; |
463 | } | 465 | } |
464 | 466 | ||
465 | if (radeon_fence_need_sync(*fence, ring->idx)) { | 467 | radeon_semaphore_sync_to(sem, *fence); |
466 | radeon_semaphore_sync_rings(rdev, sem, (*fence)->ring, | 468 | radeon_semaphore_sync_rings(rdev, sem, ring->idx); |
467 | ring->idx); | ||
468 | radeon_fence_note_sync(*fence, ring->idx); | ||
469 | } else { | ||
470 | radeon_semaphore_free(rdev, &sem, NULL); | ||
471 | } | ||
472 | 469 | ||
473 | for (i = 0; i < num_loops; i++) { | 470 | for (i = 0; i < num_loops; i++) { |
474 | cur_size_in_dw = size_in_dw; | 471 | cur_size_in_dw = size_in_dw; |
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index b9ee99258602..ecf2a3960c07 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h | |||
@@ -348,6 +348,7 @@ int radeon_fence_emit(struct radeon_device *rdev, struct radeon_fence **fence, i | |||
348 | void radeon_fence_process(struct radeon_device *rdev, int ring); | 348 | void radeon_fence_process(struct radeon_device *rdev, int ring); |
349 | bool radeon_fence_signaled(struct radeon_fence *fence); | 349 | bool radeon_fence_signaled(struct radeon_fence *fence); |
350 | int radeon_fence_wait(struct radeon_fence *fence, bool interruptible); | 350 | int radeon_fence_wait(struct radeon_fence *fence, bool interruptible); |
351 | int radeon_fence_wait_locked(struct radeon_fence *fence); | ||
351 | int radeon_fence_wait_next_locked(struct radeon_device *rdev, int ring); | 352 | int radeon_fence_wait_next_locked(struct radeon_device *rdev, int ring); |
352 | int radeon_fence_wait_empty_locked(struct radeon_device *rdev, int ring); | 353 | int radeon_fence_wait_empty_locked(struct radeon_device *rdev, int ring); |
353 | int radeon_fence_wait_any(struct radeon_device *rdev, | 354 | int radeon_fence_wait_any(struct radeon_device *rdev, |
@@ -548,17 +549,20 @@ struct radeon_semaphore { | |||
548 | struct radeon_sa_bo *sa_bo; | 549 | struct radeon_sa_bo *sa_bo; |
549 | signed waiters; | 550 | signed waiters; |
550 | uint64_t gpu_addr; | 551 | uint64_t gpu_addr; |
552 | struct radeon_fence *sync_to[RADEON_NUM_RINGS]; | ||
551 | }; | 553 | }; |
552 | 554 | ||
553 | int radeon_semaphore_create(struct radeon_device *rdev, | 555 | int radeon_semaphore_create(struct radeon_device *rdev, |
554 | struct radeon_semaphore **semaphore); | 556 | struct radeon_semaphore **semaphore); |
555 | void radeon_semaphore_emit_signal(struct radeon_device *rdev, int ring, | 557 | bool radeon_semaphore_emit_signal(struct radeon_device *rdev, int ring, |
556 | struct radeon_semaphore *semaphore); | 558 | struct radeon_semaphore *semaphore); |
557 | void radeon_semaphore_emit_wait(struct radeon_device *rdev, int ring, | 559 | bool radeon_semaphore_emit_wait(struct radeon_device *rdev, int ring, |
558 | struct radeon_semaphore *semaphore); | 560 | struct radeon_semaphore *semaphore); |
561 | void radeon_semaphore_sync_to(struct radeon_semaphore *semaphore, | ||
562 | struct radeon_fence *fence); | ||
559 | int radeon_semaphore_sync_rings(struct radeon_device *rdev, | 563 | int radeon_semaphore_sync_rings(struct radeon_device *rdev, |
560 | struct radeon_semaphore *semaphore, | 564 | struct radeon_semaphore *semaphore, |
561 | int signaler, int waiter); | 565 | int waiting_ring); |
562 | void radeon_semaphore_free(struct radeon_device *rdev, | 566 | void radeon_semaphore_free(struct radeon_device *rdev, |
563 | struct radeon_semaphore **semaphore, | 567 | struct radeon_semaphore **semaphore, |
564 | struct radeon_fence *fence); | 568 | struct radeon_fence *fence); |
@@ -645,13 +649,15 @@ void radeon_scratch_free(struct radeon_device *rdev, uint32_t reg); | |||
645 | /* | 649 | /* |
646 | * GPU doorbell structures, functions & helpers | 650 | * GPU doorbell structures, functions & helpers |
647 | */ | 651 | */ |
652 | #define RADEON_MAX_DOORBELLS 1024 /* Reserve at most 1024 doorbell slots for radeon-owned rings. */ | ||
653 | |||
648 | struct radeon_doorbell { | 654 | struct radeon_doorbell { |
649 | u32 num_pages; | ||
650 | bool free[1024]; | ||
651 | /* doorbell mmio */ | 655 | /* doorbell mmio */ |
652 | resource_size_t base; | 656 | resource_size_t base; |
653 | resource_size_t size; | 657 | resource_size_t size; |
654 | void __iomem *ptr; | 658 | u32 __iomem *ptr; |
659 | u32 num_doorbells; /* Number of doorbells actually reserved for radeon. */ | ||
660 | unsigned long used[DIV_ROUND_UP(RADEON_MAX_DOORBELLS, BITS_PER_LONG)]; | ||
655 | }; | 661 | }; |
656 | 662 | ||
657 | int radeon_doorbell_get(struct radeon_device *rdev, u32 *page); | 663 | int radeon_doorbell_get(struct radeon_device *rdev, u32 *page); |
@@ -765,7 +771,6 @@ struct radeon_ib { | |||
765 | struct radeon_fence *fence; | 771 | struct radeon_fence *fence; |
766 | struct radeon_vm *vm; | 772 | struct radeon_vm *vm; |
767 | bool is_const_ib; | 773 | bool is_const_ib; |
768 | struct radeon_fence *sync_to[RADEON_NUM_RINGS]; | ||
769 | struct radeon_semaphore *semaphore; | 774 | struct radeon_semaphore *semaphore; |
770 | }; | 775 | }; |
771 | 776 | ||
@@ -799,8 +804,7 @@ struct radeon_ring { | |||
799 | u32 pipe; | 804 | u32 pipe; |
800 | u32 queue; | 805 | u32 queue; |
801 | struct radeon_bo *mqd_obj; | 806 | struct radeon_bo *mqd_obj; |
802 | u32 doorbell_page_num; | 807 | u32 doorbell_index; |
803 | u32 doorbell_offset; | ||
804 | unsigned wptr_offs; | 808 | unsigned wptr_offs; |
805 | }; | 809 | }; |
806 | 810 | ||
@@ -921,7 +925,6 @@ int radeon_ib_get(struct radeon_device *rdev, int ring, | |||
921 | struct radeon_ib *ib, struct radeon_vm *vm, | 925 | struct radeon_ib *ib, struct radeon_vm *vm, |
922 | unsigned size); | 926 | unsigned size); |
923 | void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib *ib); | 927 | void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib *ib); |
924 | void radeon_ib_sync_to(struct radeon_ib *ib, struct radeon_fence *fence); | ||
925 | int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib, | 928 | int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib, |
926 | struct radeon_ib *const_ib); | 929 | struct radeon_ib *const_ib); |
927 | int radeon_ib_pool_init(struct radeon_device *rdev); | 930 | int radeon_ib_pool_init(struct radeon_device *rdev); |
@@ -1638,7 +1641,7 @@ struct radeon_asic_ring { | |||
1638 | /* command emmit functions */ | 1641 | /* command emmit functions */ |
1639 | void (*ib_execute)(struct radeon_device *rdev, struct radeon_ib *ib); | 1642 | void (*ib_execute)(struct radeon_device *rdev, struct radeon_ib *ib); |
1640 | void (*emit_fence)(struct radeon_device *rdev, struct radeon_fence *fence); | 1643 | void (*emit_fence)(struct radeon_device *rdev, struct radeon_fence *fence); |
1641 | void (*emit_semaphore)(struct radeon_device *rdev, struct radeon_ring *cp, | 1644 | bool (*emit_semaphore)(struct radeon_device *rdev, struct radeon_ring *cp, |
1642 | struct radeon_semaphore *semaphore, bool emit_wait); | 1645 | struct radeon_semaphore *semaphore, bool emit_wait); |
1643 | void (*vm_flush)(struct radeon_device *rdev, int ridx, struct radeon_vm *vm); | 1646 | void (*vm_flush)(struct radeon_device *rdev, int ridx, struct radeon_vm *vm); |
1644 | 1647 | ||
@@ -1979,6 +1982,7 @@ struct cik_asic { | |||
1979 | 1982 | ||
1980 | unsigned tile_config; | 1983 | unsigned tile_config; |
1981 | uint32_t tile_mode_array[32]; | 1984 | uint32_t tile_mode_array[32]; |
1985 | uint32_t macrotile_mode_array[16]; | ||
1982 | }; | 1986 | }; |
1983 | 1987 | ||
1984 | union radeon_asic_config { | 1988 | union radeon_asic_config { |
@@ -2239,8 +2243,8 @@ void r100_mm_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v, | |||
2239 | u32 r100_io_rreg(struct radeon_device *rdev, u32 reg); | 2243 | u32 r100_io_rreg(struct radeon_device *rdev, u32 reg); |
2240 | void r100_io_wreg(struct radeon_device *rdev, u32 reg, u32 v); | 2244 | void r100_io_wreg(struct radeon_device *rdev, u32 reg, u32 v); |
2241 | 2245 | ||
2242 | u32 cik_mm_rdoorbell(struct radeon_device *rdev, u32 offset); | 2246 | u32 cik_mm_rdoorbell(struct radeon_device *rdev, u32 index); |
2243 | void cik_mm_wdoorbell(struct radeon_device *rdev, u32 offset, u32 v); | 2247 | void cik_mm_wdoorbell(struct radeon_device *rdev, u32 index, u32 v); |
2244 | 2248 | ||
2245 | /* | 2249 | /* |
2246 | * Cast helper | 2250 | * Cast helper |
@@ -2303,8 +2307,8 @@ void cik_mm_wdoorbell(struct radeon_device *rdev, u32 offset, u32 v); | |||
2303 | #define RREG32_IO(reg) r100_io_rreg(rdev, (reg)) | 2307 | #define RREG32_IO(reg) r100_io_rreg(rdev, (reg)) |
2304 | #define WREG32_IO(reg, v) r100_io_wreg(rdev, (reg), (v)) | 2308 | #define WREG32_IO(reg, v) r100_io_wreg(rdev, (reg), (v)) |
2305 | 2309 | ||
2306 | #define RDOORBELL32(offset) cik_mm_rdoorbell(rdev, (offset)) | 2310 | #define RDOORBELL32(index) cik_mm_rdoorbell(rdev, (index)) |
2307 | #define WDOORBELL32(offset, v) cik_mm_wdoorbell(rdev, (offset), (v)) | 2311 | #define WDOORBELL32(index, v) cik_mm_wdoorbell(rdev, (index), (v)) |
2308 | 2312 | ||
2309 | /* | 2313 | /* |
2310 | * Indirect registers accessor | 2314 | * Indirect registers accessor |
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c index 50853c0cb49d..e354ce94cdd1 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.c +++ b/drivers/gpu/drm/radeon/radeon_asic.c | |||
@@ -2015,6 +2015,8 @@ static struct radeon_asic ci_asic = { | |||
2015 | .bandwidth_update = &dce8_bandwidth_update, | 2015 | .bandwidth_update = &dce8_bandwidth_update, |
2016 | .get_vblank_counter = &evergreen_get_vblank_counter, | 2016 | .get_vblank_counter = &evergreen_get_vblank_counter, |
2017 | .wait_for_vblank = &dce4_wait_for_vblank, | 2017 | .wait_for_vblank = &dce4_wait_for_vblank, |
2018 | .set_backlight_level = &atombios_set_backlight_level, | ||
2019 | .get_backlight_level = &atombios_get_backlight_level, | ||
2018 | .hdmi_enable = &evergreen_hdmi_enable, | 2020 | .hdmi_enable = &evergreen_hdmi_enable, |
2019 | .hdmi_setmode = &evergreen_hdmi_setmode, | 2021 | .hdmi_setmode = &evergreen_hdmi_setmode, |
2020 | }, | 2022 | }, |
@@ -2114,6 +2116,8 @@ static struct radeon_asic kv_asic = { | |||
2114 | .bandwidth_update = &dce8_bandwidth_update, | 2116 | .bandwidth_update = &dce8_bandwidth_update, |
2115 | .get_vblank_counter = &evergreen_get_vblank_counter, | 2117 | .get_vblank_counter = &evergreen_get_vblank_counter, |
2116 | .wait_for_vblank = &dce4_wait_for_vblank, | 2118 | .wait_for_vblank = &dce4_wait_for_vblank, |
2119 | .set_backlight_level = &atombios_set_backlight_level, | ||
2120 | .get_backlight_level = &atombios_get_backlight_level, | ||
2117 | .hdmi_enable = &evergreen_hdmi_enable, | 2121 | .hdmi_enable = &evergreen_hdmi_enable, |
2118 | .hdmi_setmode = &evergreen_hdmi_setmode, | 2122 | .hdmi_setmode = &evergreen_hdmi_setmode, |
2119 | }, | 2123 | }, |
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h index f2833ee3a613..c9fd97b58076 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.h +++ b/drivers/gpu/drm/radeon/radeon_asic.h | |||
@@ -80,7 +80,7 @@ int r100_irq_set(struct radeon_device *rdev); | |||
80 | int r100_irq_process(struct radeon_device *rdev); | 80 | int r100_irq_process(struct radeon_device *rdev); |
81 | void r100_fence_ring_emit(struct radeon_device *rdev, | 81 | void r100_fence_ring_emit(struct radeon_device *rdev, |
82 | struct radeon_fence *fence); | 82 | struct radeon_fence *fence); |
83 | void r100_semaphore_ring_emit(struct radeon_device *rdev, | 83 | bool r100_semaphore_ring_emit(struct radeon_device *rdev, |
84 | struct radeon_ring *cp, | 84 | struct radeon_ring *cp, |
85 | struct radeon_semaphore *semaphore, | 85 | struct radeon_semaphore *semaphore, |
86 | bool emit_wait); | 86 | bool emit_wait); |
@@ -313,13 +313,13 @@ int r600_cs_parse(struct radeon_cs_parser *p); | |||
313 | int r600_dma_cs_parse(struct radeon_cs_parser *p); | 313 | int r600_dma_cs_parse(struct radeon_cs_parser *p); |
314 | void r600_fence_ring_emit(struct radeon_device *rdev, | 314 | void r600_fence_ring_emit(struct radeon_device *rdev, |
315 | struct radeon_fence *fence); | 315 | struct radeon_fence *fence); |
316 | void r600_semaphore_ring_emit(struct radeon_device *rdev, | 316 | bool r600_semaphore_ring_emit(struct radeon_device *rdev, |
317 | struct radeon_ring *cp, | 317 | struct radeon_ring *cp, |
318 | struct radeon_semaphore *semaphore, | 318 | struct radeon_semaphore *semaphore, |
319 | bool emit_wait); | 319 | bool emit_wait); |
320 | void r600_dma_fence_ring_emit(struct radeon_device *rdev, | 320 | void r600_dma_fence_ring_emit(struct radeon_device *rdev, |
321 | struct radeon_fence *fence); | 321 | struct radeon_fence *fence); |
322 | void r600_dma_semaphore_ring_emit(struct radeon_device *rdev, | 322 | bool r600_dma_semaphore_ring_emit(struct radeon_device *rdev, |
323 | struct radeon_ring *ring, | 323 | struct radeon_ring *ring, |
324 | struct radeon_semaphore *semaphore, | 324 | struct radeon_semaphore *semaphore, |
325 | bool emit_wait); | 325 | bool emit_wait); |
@@ -566,10 +566,6 @@ int sumo_dpm_force_performance_level(struct radeon_device *rdev, | |||
566 | */ | 566 | */ |
567 | void cayman_fence_ring_emit(struct radeon_device *rdev, | 567 | void cayman_fence_ring_emit(struct radeon_device *rdev, |
568 | struct radeon_fence *fence); | 568 | struct radeon_fence *fence); |
569 | void cayman_uvd_semaphore_emit(struct radeon_device *rdev, | ||
570 | struct radeon_ring *ring, | ||
571 | struct radeon_semaphore *semaphore, | ||
572 | bool emit_wait); | ||
573 | void cayman_pcie_gart_tlb_flush(struct radeon_device *rdev); | 569 | void cayman_pcie_gart_tlb_flush(struct radeon_device *rdev); |
574 | int cayman_init(struct radeon_device *rdev); | 570 | int cayman_init(struct radeon_device *rdev); |
575 | void cayman_fini(struct radeon_device *rdev); | 571 | void cayman_fini(struct radeon_device *rdev); |
@@ -697,7 +693,7 @@ void cik_pciep_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); | |||
697 | int cik_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); | 693 | int cik_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); |
698 | void cik_sdma_fence_ring_emit(struct radeon_device *rdev, | 694 | void cik_sdma_fence_ring_emit(struct radeon_device *rdev, |
699 | struct radeon_fence *fence); | 695 | struct radeon_fence *fence); |
700 | void cik_sdma_semaphore_ring_emit(struct radeon_device *rdev, | 696 | bool cik_sdma_semaphore_ring_emit(struct radeon_device *rdev, |
701 | struct radeon_ring *ring, | 697 | struct radeon_ring *ring, |
702 | struct radeon_semaphore *semaphore, | 698 | struct radeon_semaphore *semaphore, |
703 | bool emit_wait); | 699 | bool emit_wait); |
@@ -717,7 +713,7 @@ void cik_fence_gfx_ring_emit(struct radeon_device *rdev, | |||
717 | struct radeon_fence *fence); | 713 | struct radeon_fence *fence); |
718 | void cik_fence_compute_ring_emit(struct radeon_device *rdev, | 714 | void cik_fence_compute_ring_emit(struct radeon_device *rdev, |
719 | struct radeon_fence *fence); | 715 | struct radeon_fence *fence); |
720 | void cik_semaphore_ring_emit(struct radeon_device *rdev, | 716 | bool cik_semaphore_ring_emit(struct radeon_device *rdev, |
721 | struct radeon_ring *cp, | 717 | struct radeon_ring *cp, |
722 | struct radeon_semaphore *semaphore, | 718 | struct radeon_semaphore *semaphore, |
723 | bool emit_wait); | 719 | bool emit_wait); |
@@ -807,7 +803,7 @@ void uvd_v1_0_stop(struct radeon_device *rdev); | |||
807 | 803 | ||
808 | int uvd_v1_0_ring_test(struct radeon_device *rdev, struct radeon_ring *ring); | 804 | int uvd_v1_0_ring_test(struct radeon_device *rdev, struct radeon_ring *ring); |
809 | int uvd_v1_0_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); | 805 | int uvd_v1_0_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); |
810 | void uvd_v1_0_semaphore_emit(struct radeon_device *rdev, | 806 | bool uvd_v1_0_semaphore_emit(struct radeon_device *rdev, |
811 | struct radeon_ring *ring, | 807 | struct radeon_ring *ring, |
812 | struct radeon_semaphore *semaphore, | 808 | struct radeon_semaphore *semaphore, |
813 | bool emit_wait); | 809 | bool emit_wait); |
@@ -819,7 +815,7 @@ void uvd_v2_2_fence_emit(struct radeon_device *rdev, | |||
819 | struct radeon_fence *fence); | 815 | struct radeon_fence *fence); |
820 | 816 | ||
821 | /* uvd v3.1 */ | 817 | /* uvd v3.1 */ |
822 | void uvd_v3_1_semaphore_emit(struct radeon_device *rdev, | 818 | bool uvd_v3_1_semaphore_emit(struct radeon_device *rdev, |
823 | struct radeon_ring *ring, | 819 | struct radeon_ring *ring, |
824 | struct radeon_semaphore *semaphore, | 820 | struct radeon_semaphore *semaphore, |
825 | bool emit_wait); | 821 | bool emit_wait); |
diff --git a/drivers/gpu/drm/radeon/radeon_cs.c b/drivers/gpu/drm/radeon/radeon_cs.c index 26ca223d12d6..f41594b2eeac 100644 --- a/drivers/gpu/drm/radeon/radeon_cs.c +++ b/drivers/gpu/drm/radeon/radeon_cs.c | |||
@@ -159,7 +159,8 @@ static void radeon_cs_sync_rings(struct radeon_cs_parser *p) | |||
159 | if (!p->relocs[i].robj) | 159 | if (!p->relocs[i].robj) |
160 | continue; | 160 | continue; |
161 | 161 | ||
162 | radeon_ib_sync_to(&p->ib, p->relocs[i].robj->tbo.sync_obj); | 162 | radeon_semaphore_sync_to(p->ib.semaphore, |
163 | p->relocs[i].robj->tbo.sync_obj); | ||
163 | } | 164 | } |
164 | } | 165 | } |
165 | 166 | ||
@@ -411,9 +412,9 @@ static int radeon_cs_ib_vm_chunk(struct radeon_device *rdev, | |||
411 | goto out; | 412 | goto out; |
412 | } | 413 | } |
413 | radeon_cs_sync_rings(parser); | 414 | radeon_cs_sync_rings(parser); |
414 | radeon_ib_sync_to(&parser->ib, vm->fence); | 415 | radeon_semaphore_sync_to(parser->ib.semaphore, vm->fence); |
415 | radeon_ib_sync_to(&parser->ib, radeon_vm_grab_id( | 416 | radeon_semaphore_sync_to(parser->ib.semaphore, |
416 | rdev, vm, parser->ring)); | 417 | radeon_vm_grab_id(rdev, vm, parser->ring)); |
417 | 418 | ||
418 | if ((rdev->family >= CHIP_TAHITI) && | 419 | if ((rdev->family >= CHIP_TAHITI) && |
419 | (parser->chunk_const_ib_idx != -1)) { | 420 | (parser->chunk_const_ib_idx != -1)) { |
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index b9234c43f43d..39b033b441d2 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c | |||
@@ -251,28 +251,23 @@ void radeon_scratch_free(struct radeon_device *rdev, uint32_t reg) | |||
251 | */ | 251 | */ |
252 | int radeon_doorbell_init(struct radeon_device *rdev) | 252 | int radeon_doorbell_init(struct radeon_device *rdev) |
253 | { | 253 | { |
254 | int i; | ||
255 | |||
256 | /* doorbell bar mapping */ | 254 | /* doorbell bar mapping */ |
257 | rdev->doorbell.base = pci_resource_start(rdev->pdev, 2); | 255 | rdev->doorbell.base = pci_resource_start(rdev->pdev, 2); |
258 | rdev->doorbell.size = pci_resource_len(rdev->pdev, 2); | 256 | rdev->doorbell.size = pci_resource_len(rdev->pdev, 2); |
259 | 257 | ||
260 | /* limit to 4 MB for now */ | 258 | rdev->doorbell.num_doorbells = min_t(u32, rdev->doorbell.size / sizeof(u32), RADEON_MAX_DOORBELLS); |
261 | if (rdev->doorbell.size > (4 * 1024 * 1024)) | 259 | if (rdev->doorbell.num_doorbells == 0) |
262 | rdev->doorbell.size = 4 * 1024 * 1024; | 260 | return -EINVAL; |
263 | 261 | ||
264 | rdev->doorbell.ptr = ioremap(rdev->doorbell.base, rdev->doorbell.size); | 262 | rdev->doorbell.ptr = ioremap(rdev->doorbell.base, rdev->doorbell.num_doorbells * sizeof(u32)); |
265 | if (rdev->doorbell.ptr == NULL) { | 263 | if (rdev->doorbell.ptr == NULL) { |
266 | return -ENOMEM; | 264 | return -ENOMEM; |
267 | } | 265 | } |
268 | DRM_INFO("doorbell mmio base: 0x%08X\n", (uint32_t)rdev->doorbell.base); | 266 | DRM_INFO("doorbell mmio base: 0x%08X\n", (uint32_t)rdev->doorbell.base); |
269 | DRM_INFO("doorbell mmio size: %u\n", (unsigned)rdev->doorbell.size); | 267 | DRM_INFO("doorbell mmio size: %u\n", (unsigned)rdev->doorbell.size); |
270 | 268 | ||
271 | rdev->doorbell.num_pages = rdev->doorbell.size / PAGE_SIZE; | 269 | memset(&rdev->doorbell.used, 0, sizeof(rdev->doorbell.used)); |
272 | 270 | ||
273 | for (i = 0; i < rdev->doorbell.num_pages; i++) { | ||
274 | rdev->doorbell.free[i] = true; | ||
275 | } | ||
276 | return 0; | 271 | return 0; |
277 | } | 272 | } |
278 | 273 | ||
@@ -290,40 +285,38 @@ void radeon_doorbell_fini(struct radeon_device *rdev) | |||
290 | } | 285 | } |
291 | 286 | ||
292 | /** | 287 | /** |
293 | * radeon_doorbell_get - Allocate a doorbell page | 288 | * radeon_doorbell_get - Allocate a doorbell entry |
294 | * | 289 | * |
295 | * @rdev: radeon_device pointer | 290 | * @rdev: radeon_device pointer |
296 | * @doorbell: doorbell page number | 291 | * @doorbell: doorbell index |
297 | * | 292 | * |
298 | * Allocate a doorbell page for use by the driver (all asics). | 293 | * Allocate a doorbell for use by the driver (all asics). |
299 | * Returns 0 on success or -EINVAL on failure. | 294 | * Returns 0 on success or -EINVAL on failure. |
300 | */ | 295 | */ |
301 | int radeon_doorbell_get(struct radeon_device *rdev, u32 *doorbell) | 296 | int radeon_doorbell_get(struct radeon_device *rdev, u32 *doorbell) |
302 | { | 297 | { |
303 | int i; | 298 | unsigned long offset = find_first_zero_bit(rdev->doorbell.used, rdev->doorbell.num_doorbells); |
304 | 299 | if (offset < rdev->doorbell.num_doorbells) { | |
305 | for (i = 0; i < rdev->doorbell.num_pages; i++) { | 300 | __set_bit(offset, rdev->doorbell.used); |
306 | if (rdev->doorbell.free[i]) { | 301 | *doorbell = offset; |
307 | rdev->doorbell.free[i] = false; | 302 | return 0; |
308 | *doorbell = i; | 303 | } else { |
309 | return 0; | 304 | return -EINVAL; |
310 | } | ||
311 | } | 305 | } |
312 | return -EINVAL; | ||
313 | } | 306 | } |
314 | 307 | ||
315 | /** | 308 | /** |
316 | * radeon_doorbell_free - Free a doorbell page | 309 | * radeon_doorbell_free - Free a doorbell entry |
317 | * | 310 | * |
318 | * @rdev: radeon_device pointer | 311 | * @rdev: radeon_device pointer |
319 | * @doorbell: doorbell page number | 312 | * @doorbell: doorbell index |
320 | * | 313 | * |
321 | * Free a doorbell page allocated for use by the driver (all asics) | 314 | * Free a doorbell allocated for use by the driver (all asics) |
322 | */ | 315 | */ |
323 | void radeon_doorbell_free(struct radeon_device *rdev, u32 doorbell) | 316 | void radeon_doorbell_free(struct radeon_device *rdev, u32 doorbell) |
324 | { | 317 | { |
325 | if (doorbell < rdev->doorbell.num_pages) | 318 | if (doorbell < rdev->doorbell.num_doorbells) |
326 | rdev->doorbell.free[doorbell] = true; | 319 | __clear_bit(doorbell, rdev->doorbell.used); |
327 | } | 320 | } |
328 | 321 | ||
329 | /* | 322 | /* |
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c index 1aee32213f66..9f5ff28864f6 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.c +++ b/drivers/gpu/drm/radeon/radeon_drv.c | |||
@@ -76,9 +76,10 @@ | |||
76 | * 2.32.0 - new info request for rings working | 76 | * 2.32.0 - new info request for rings working |
77 | * 2.33.0 - Add SI tiling mode array query | 77 | * 2.33.0 - Add SI tiling mode array query |
78 | * 2.34.0 - Add CIK tiling mode array query | 78 | * 2.34.0 - Add CIK tiling mode array query |
79 | * 2.35.0 - Add CIK macrotile mode array query | ||
79 | */ | 80 | */ |
80 | #define KMS_DRIVER_MAJOR 2 | 81 | #define KMS_DRIVER_MAJOR 2 |
81 | #define KMS_DRIVER_MINOR 34 | 82 | #define KMS_DRIVER_MINOR 35 |
82 | #define KMS_DRIVER_PATCHLEVEL 0 | 83 | #define KMS_DRIVER_PATCHLEVEL 0 |
83 | int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); | 84 | int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); |
84 | int radeon_driver_unload_kms(struct drm_device *dev); | 85 | int radeon_driver_unload_kms(struct drm_device *dev); |
diff --git a/drivers/gpu/drm/radeon/radeon_fence.c b/drivers/gpu/drm/radeon/radeon_fence.c index 281d14c22a47..d3a86e43c012 100644 --- a/drivers/gpu/drm/radeon/radeon_fence.c +++ b/drivers/gpu/drm/radeon/radeon_fence.c | |||
@@ -472,6 +472,36 @@ int radeon_fence_wait_any(struct radeon_device *rdev, | |||
472 | } | 472 | } |
473 | 473 | ||
474 | /** | 474 | /** |
475 | * radeon_fence_wait_locked - wait for a fence to signal | ||
476 | * | ||
477 | * @fence: radeon fence object | ||
478 | * | ||
479 | * Wait for the requested fence to signal (all asics). | ||
480 | * Returns 0 if the fence has passed, error for all other cases. | ||
481 | */ | ||
482 | int radeon_fence_wait_locked(struct radeon_fence *fence) | ||
483 | { | ||
484 | uint64_t seq[RADEON_NUM_RINGS] = {}; | ||
485 | int r; | ||
486 | |||
487 | if (fence == NULL) { | ||
488 | WARN(1, "Querying an invalid fence : %p !\n", fence); | ||
489 | return -EINVAL; | ||
490 | } | ||
491 | |||
492 | seq[fence->ring] = fence->seq; | ||
493 | if (seq[fence->ring] == RADEON_FENCE_SIGNALED_SEQ) | ||
494 | return 0; | ||
495 | |||
496 | r = radeon_fence_wait_seq(fence->rdev, seq, false, false); | ||
497 | if (r) | ||
498 | return r; | ||
499 | |||
500 | fence->seq = RADEON_FENCE_SIGNALED_SEQ; | ||
501 | return 0; | ||
502 | } | ||
503 | |||
504 | /** | ||
475 | * radeon_fence_wait_next_locked - wait for the next fence to signal | 505 | * radeon_fence_wait_next_locked - wait for the next fence to signal |
476 | * | 506 | * |
477 | * @rdev: radeon device pointer | 507 | * @rdev: radeon device pointer |
diff --git a/drivers/gpu/drm/radeon/radeon_gart.c b/drivers/gpu/drm/radeon/radeon_gart.c index 8a83b89d4709..3044e504f4ec 100644 --- a/drivers/gpu/drm/radeon/radeon_gart.c +++ b/drivers/gpu/drm/radeon/radeon_gart.c | |||
@@ -651,7 +651,7 @@ retry: | |||
651 | radeon_asic_vm_set_page(rdev, &ib, vm->pd_gpu_addr, | 651 | radeon_asic_vm_set_page(rdev, &ib, vm->pd_gpu_addr, |
652 | 0, pd_entries, 0, 0); | 652 | 0, pd_entries, 0, 0); |
653 | 653 | ||
654 | radeon_ib_sync_to(&ib, vm->fence); | 654 | radeon_semaphore_sync_to(ib.semaphore, vm->fence); |
655 | r = radeon_ib_schedule(rdev, &ib, NULL); | 655 | r = radeon_ib_schedule(rdev, &ib, NULL); |
656 | if (r) { | 656 | if (r) { |
657 | radeon_ib_free(rdev, &ib); | 657 | radeon_ib_free(rdev, &ib); |
@@ -1209,6 +1209,8 @@ int radeon_vm_bo_update_pte(struct radeon_device *rdev, | |||
1209 | return -ENOMEM; | 1209 | return -ENOMEM; |
1210 | 1210 | ||
1211 | r = radeon_ib_get(rdev, R600_RING_TYPE_DMA_INDEX, &ib, NULL, ndw * 4); | 1211 | r = radeon_ib_get(rdev, R600_RING_TYPE_DMA_INDEX, &ib, NULL, ndw * 4); |
1212 | if (r) | ||
1213 | return r; | ||
1212 | ib.length_dw = 0; | 1214 | ib.length_dw = 0; |
1213 | 1215 | ||
1214 | r = radeon_vm_update_pdes(rdev, vm, &ib, bo_va->soffset, bo_va->eoffset); | 1216 | r = radeon_vm_update_pdes(rdev, vm, &ib, bo_va->soffset, bo_va->eoffset); |
@@ -1220,7 +1222,7 @@ int radeon_vm_bo_update_pte(struct radeon_device *rdev, | |||
1220 | radeon_vm_update_ptes(rdev, vm, &ib, bo_va->soffset, bo_va->eoffset, | 1222 | radeon_vm_update_ptes(rdev, vm, &ib, bo_va->soffset, bo_va->eoffset, |
1221 | addr, radeon_vm_page_flags(bo_va->flags)); | 1223 | addr, radeon_vm_page_flags(bo_va->flags)); |
1222 | 1224 | ||
1223 | radeon_ib_sync_to(&ib, vm->fence); | 1225 | radeon_semaphore_sync_to(ib.semaphore, vm->fence); |
1224 | r = radeon_ib_schedule(rdev, &ib, NULL); | 1226 | r = radeon_ib_schedule(rdev, &ib, NULL); |
1225 | if (r) { | 1227 | if (r) { |
1226 | radeon_ib_free(rdev, &ib); | 1228 | radeon_ib_free(rdev, &ib); |
diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c index bb8710531a1b..55d0b474bd37 100644 --- a/drivers/gpu/drm/radeon/radeon_kms.c +++ b/drivers/gpu/drm/radeon/radeon_kms.c | |||
@@ -340,7 +340,7 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) | |||
340 | break; | 340 | break; |
341 | case RADEON_INFO_BACKEND_MAP: | 341 | case RADEON_INFO_BACKEND_MAP: |
342 | if (rdev->family >= CHIP_BONAIRE) | 342 | if (rdev->family >= CHIP_BONAIRE) |
343 | return -EINVAL; | 343 | *value = rdev->config.cik.backend_map; |
344 | else if (rdev->family >= CHIP_TAHITI) | 344 | else if (rdev->family >= CHIP_TAHITI) |
345 | *value = rdev->config.si.backend_map; | 345 | *value = rdev->config.si.backend_map; |
346 | else if (rdev->family >= CHIP_CAYMAN) | 346 | else if (rdev->family >= CHIP_CAYMAN) |
@@ -449,6 +449,15 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) | |||
449 | return -EINVAL; | 449 | return -EINVAL; |
450 | } | 450 | } |
451 | break; | 451 | break; |
452 | case RADEON_INFO_CIK_MACROTILE_MODE_ARRAY: | ||
453 | if (rdev->family >= CHIP_BONAIRE) { | ||
454 | value = rdev->config.cik.macrotile_mode_array; | ||
455 | value_size = sizeof(uint32_t)*16; | ||
456 | } else { | ||
457 | DRM_DEBUG_KMS("macrotile mode array is cik+ only!\n"); | ||
458 | return -EINVAL; | ||
459 | } | ||
460 | break; | ||
452 | case RADEON_INFO_SI_CP_DMA_COMPUTE: | 461 | case RADEON_INFO_SI_CP_DMA_COMPUTE: |
453 | *value = 1; | 462 | *value = 1; |
454 | break; | 463 | break; |
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c index 0c7b8c66301b..0b158f98d287 100644 --- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c +++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c | |||
@@ -422,6 +422,7 @@ int radeon_crtc_do_set_base(struct drm_crtc *crtc, | |||
422 | /* Pin framebuffer & get tilling informations */ | 422 | /* Pin framebuffer & get tilling informations */ |
423 | obj = radeon_fb->obj; | 423 | obj = radeon_fb->obj; |
424 | rbo = gem_to_radeon_bo(obj); | 424 | rbo = gem_to_radeon_bo(obj); |
425 | retry: | ||
425 | r = radeon_bo_reserve(rbo, false); | 426 | r = radeon_bo_reserve(rbo, false); |
426 | if (unlikely(r != 0)) | 427 | if (unlikely(r != 0)) |
427 | return r; | 428 | return r; |
@@ -430,6 +431,33 @@ int radeon_crtc_do_set_base(struct drm_crtc *crtc, | |||
430 | &base); | 431 | &base); |
431 | if (unlikely(r != 0)) { | 432 | if (unlikely(r != 0)) { |
432 | radeon_bo_unreserve(rbo); | 433 | radeon_bo_unreserve(rbo); |
434 | |||
435 | /* On old GPU like RN50 with little vram pining can fails because | ||
436 | * current fb is taking all space needed. So instead of unpining | ||
437 | * the old buffer after pining the new one, first unpin old one | ||
438 | * and then retry pining new one. | ||
439 | * | ||
440 | * As only master can set mode only master can pin and it is | ||
441 | * unlikely the master client will race with itself especialy | ||
442 | * on those old gpu with single crtc. | ||
443 | * | ||
444 | * We don't shutdown the display controller because new buffer | ||
445 | * will end up in same spot. | ||
446 | */ | ||
447 | if (!atomic && fb && fb != crtc->fb) { | ||
448 | struct radeon_bo *old_rbo; | ||
449 | unsigned long nsize, osize; | ||
450 | |||
451 | old_rbo = gem_to_radeon_bo(to_radeon_framebuffer(fb)->obj); | ||
452 | osize = radeon_bo_size(old_rbo); | ||
453 | nsize = radeon_bo_size(rbo); | ||
454 | if (nsize <= osize && !radeon_bo_reserve(old_rbo, false)) { | ||
455 | radeon_bo_unpin(old_rbo); | ||
456 | radeon_bo_unreserve(old_rbo); | ||
457 | fb = NULL; | ||
458 | goto retry; | ||
459 | } | ||
460 | } | ||
433 | return -EINVAL; | 461 | return -EINVAL; |
434 | } | 462 | } |
435 | radeon_bo_get_tiling_flags(rbo, &tiling_flags, NULL); | 463 | radeon_bo_get_tiling_flags(rbo, &tiling_flags, NULL); |
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c index 866ace070b91..d1385ccc672c 100644 --- a/drivers/gpu/drm/radeon/radeon_pm.c +++ b/drivers/gpu/drm/radeon/radeon_pm.c | |||
@@ -1252,7 +1252,6 @@ int radeon_pm_init(struct radeon_device *rdev) | |||
1252 | case CHIP_RS780: | 1252 | case CHIP_RS780: |
1253 | case CHIP_RS880: | 1253 | case CHIP_RS880: |
1254 | case CHIP_CAYMAN: | 1254 | case CHIP_CAYMAN: |
1255 | case CHIP_ARUBA: | ||
1256 | case CHIP_BONAIRE: | 1255 | case CHIP_BONAIRE: |
1257 | case CHIP_KABINI: | 1256 | case CHIP_KABINI: |
1258 | case CHIP_KAVERI: | 1257 | case CHIP_KAVERI: |
@@ -1284,6 +1283,7 @@ int radeon_pm_init(struct radeon_device *rdev) | |||
1284 | case CHIP_BARTS: | 1283 | case CHIP_BARTS: |
1285 | case CHIP_TURKS: | 1284 | case CHIP_TURKS: |
1286 | case CHIP_CAICOS: | 1285 | case CHIP_CAICOS: |
1286 | case CHIP_ARUBA: | ||
1287 | case CHIP_TAHITI: | 1287 | case CHIP_TAHITI: |
1288 | case CHIP_PITCAIRN: | 1288 | case CHIP_PITCAIRN: |
1289 | case CHIP_VERDE: | 1289 | case CHIP_VERDE: |
diff --git a/drivers/gpu/drm/radeon/radeon_ring.c b/drivers/gpu/drm/radeon/radeon_ring.c index 18254e1c3e71..9214403ae173 100644 --- a/drivers/gpu/drm/radeon/radeon_ring.c +++ b/drivers/gpu/drm/radeon/radeon_ring.c | |||
@@ -61,7 +61,7 @@ int radeon_ib_get(struct radeon_device *rdev, int ring, | |||
61 | struct radeon_ib *ib, struct radeon_vm *vm, | 61 | struct radeon_ib *ib, struct radeon_vm *vm, |
62 | unsigned size) | 62 | unsigned size) |
63 | { | 63 | { |
64 | int i, r; | 64 | int r; |
65 | 65 | ||
66 | r = radeon_sa_bo_new(rdev, &rdev->ring_tmp_bo, &ib->sa_bo, size, 256, true); | 66 | r = radeon_sa_bo_new(rdev, &rdev->ring_tmp_bo, &ib->sa_bo, size, 256, true); |
67 | if (r) { | 67 | if (r) { |
@@ -87,8 +87,6 @@ int radeon_ib_get(struct radeon_device *rdev, int ring, | |||
87 | ib->gpu_addr = radeon_sa_bo_gpu_addr(ib->sa_bo); | 87 | ib->gpu_addr = radeon_sa_bo_gpu_addr(ib->sa_bo); |
88 | } | 88 | } |
89 | ib->is_const_ib = false; | 89 | ib->is_const_ib = false; |
90 | for (i = 0; i < RADEON_NUM_RINGS; ++i) | ||
91 | ib->sync_to[i] = NULL; | ||
92 | 90 | ||
93 | return 0; | 91 | return 0; |
94 | } | 92 | } |
@@ -109,25 +107,6 @@ void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib *ib) | |||
109 | } | 107 | } |
110 | 108 | ||
111 | /** | 109 | /** |
112 | * radeon_ib_sync_to - sync to fence before executing the IB | ||
113 | * | ||
114 | * @ib: IB object to add fence to | ||
115 | * @fence: fence to sync to | ||
116 | * | ||
117 | * Sync to the fence before executing the IB | ||
118 | */ | ||
119 | void radeon_ib_sync_to(struct radeon_ib *ib, struct radeon_fence *fence) | ||
120 | { | ||
121 | struct radeon_fence *other; | ||
122 | |||
123 | if (!fence) | ||
124 | return; | ||
125 | |||
126 | other = ib->sync_to[fence->ring]; | ||
127 | ib->sync_to[fence->ring] = radeon_fence_later(fence, other); | ||
128 | } | ||
129 | |||
130 | /** | ||
131 | * radeon_ib_schedule - schedule an IB (Indirect Buffer) on the ring | 110 | * radeon_ib_schedule - schedule an IB (Indirect Buffer) on the ring |
132 | * | 111 | * |
133 | * @rdev: radeon_device pointer | 112 | * @rdev: radeon_device pointer |
@@ -151,8 +130,7 @@ int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib, | |||
151 | struct radeon_ib *const_ib) | 130 | struct radeon_ib *const_ib) |
152 | { | 131 | { |
153 | struct radeon_ring *ring = &rdev->ring[ib->ring]; | 132 | struct radeon_ring *ring = &rdev->ring[ib->ring]; |
154 | bool need_sync = false; | 133 | int r = 0; |
155 | int i, r = 0; | ||
156 | 134 | ||
157 | if (!ib->length_dw || !ring->ready) { | 135 | if (!ib->length_dw || !ring->ready) { |
158 | /* TODO: Nothings in the ib we should report. */ | 136 | /* TODO: Nothings in the ib we should report. */ |
@@ -166,19 +144,15 @@ int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib, | |||
166 | dev_err(rdev->dev, "scheduling IB failed (%d).\n", r); | 144 | dev_err(rdev->dev, "scheduling IB failed (%d).\n", r); |
167 | return r; | 145 | return r; |
168 | } | 146 | } |
169 | for (i = 0; i < RADEON_NUM_RINGS; ++i) { | 147 | |
170 | struct radeon_fence *fence = ib->sync_to[i]; | 148 | /* sync with other rings */ |
171 | if (radeon_fence_need_sync(fence, ib->ring)) { | 149 | r = radeon_semaphore_sync_rings(rdev, ib->semaphore, ib->ring); |
172 | need_sync = true; | 150 | if (r) { |
173 | radeon_semaphore_sync_rings(rdev, ib->semaphore, | 151 | dev_err(rdev->dev, "failed to sync rings (%d)\n", r); |
174 | fence->ring, ib->ring); | 152 | radeon_ring_unlock_undo(rdev, ring); |
175 | radeon_fence_note_sync(fence, ib->ring); | 153 | return r; |
176 | } | ||
177 | } | ||
178 | /* immediately free semaphore when we don't need to sync */ | ||
179 | if (!need_sync) { | ||
180 | radeon_semaphore_free(rdev, &ib->semaphore, NULL); | ||
181 | } | 154 | } |
155 | |||
182 | /* if we can't remember our last VM flush then flush now! */ | 156 | /* if we can't remember our last VM flush then flush now! */ |
183 | /* XXX figure out why we have to flush for every IB */ | 157 | /* XXX figure out why we have to flush for every IB */ |
184 | if (ib->vm /*&& !ib->vm->last_flush*/) { | 158 | if (ib->vm /*&& !ib->vm->last_flush*/) { |
diff --git a/drivers/gpu/drm/radeon/radeon_semaphore.c b/drivers/gpu/drm/radeon/radeon_semaphore.c index 8dcc20f53d73..2b42aa1914f2 100644 --- a/drivers/gpu/drm/radeon/radeon_semaphore.c +++ b/drivers/gpu/drm/radeon/radeon_semaphore.c | |||
@@ -29,12 +29,12 @@ | |||
29 | */ | 29 | */ |
30 | #include <drm/drmP.h> | 30 | #include <drm/drmP.h> |
31 | #include "radeon.h" | 31 | #include "radeon.h" |
32 | 32 | #include "radeon_trace.h" | |
33 | 33 | ||
34 | int radeon_semaphore_create(struct radeon_device *rdev, | 34 | int radeon_semaphore_create(struct radeon_device *rdev, |
35 | struct radeon_semaphore **semaphore) | 35 | struct radeon_semaphore **semaphore) |
36 | { | 36 | { |
37 | int r; | 37 | int i, r; |
38 | 38 | ||
39 | *semaphore = kmalloc(sizeof(struct radeon_semaphore), GFP_KERNEL); | 39 | *semaphore = kmalloc(sizeof(struct radeon_semaphore), GFP_KERNEL); |
40 | if (*semaphore == NULL) { | 40 | if (*semaphore == NULL) { |
@@ -50,54 +50,121 @@ int radeon_semaphore_create(struct radeon_device *rdev, | |||
50 | (*semaphore)->waiters = 0; | 50 | (*semaphore)->waiters = 0; |
51 | (*semaphore)->gpu_addr = radeon_sa_bo_gpu_addr((*semaphore)->sa_bo); | 51 | (*semaphore)->gpu_addr = radeon_sa_bo_gpu_addr((*semaphore)->sa_bo); |
52 | *((uint64_t*)radeon_sa_bo_cpu_addr((*semaphore)->sa_bo)) = 0; | 52 | *((uint64_t*)radeon_sa_bo_cpu_addr((*semaphore)->sa_bo)) = 0; |
53 | |||
54 | for (i = 0; i < RADEON_NUM_RINGS; ++i) | ||
55 | (*semaphore)->sync_to[i] = NULL; | ||
56 | |||
53 | return 0; | 57 | return 0; |
54 | } | 58 | } |
55 | 59 | ||
56 | void radeon_semaphore_emit_signal(struct radeon_device *rdev, int ring, | 60 | bool radeon_semaphore_emit_signal(struct radeon_device *rdev, int ridx, |
57 | struct radeon_semaphore *semaphore) | 61 | struct radeon_semaphore *semaphore) |
58 | { | 62 | { |
59 | --semaphore->waiters; | 63 | struct radeon_ring *ring = &rdev->ring[ridx]; |
60 | radeon_semaphore_ring_emit(rdev, ring, &rdev->ring[ring], semaphore, false); | 64 | |
65 | trace_radeon_semaphore_signale(ridx, semaphore); | ||
66 | |||
67 | if (radeon_semaphore_ring_emit(rdev, ridx, ring, semaphore, false)) { | ||
68 | --semaphore->waiters; | ||
69 | |||
70 | /* for debugging lockup only, used by sysfs debug files */ | ||
71 | ring->last_semaphore_signal_addr = semaphore->gpu_addr; | ||
72 | return true; | ||
73 | } | ||
74 | return false; | ||
61 | } | 75 | } |
62 | 76 | ||
63 | void radeon_semaphore_emit_wait(struct radeon_device *rdev, int ring, | 77 | bool radeon_semaphore_emit_wait(struct radeon_device *rdev, int ridx, |
64 | struct radeon_semaphore *semaphore) | 78 | struct radeon_semaphore *semaphore) |
65 | { | 79 | { |
66 | ++semaphore->waiters; | 80 | struct radeon_ring *ring = &rdev->ring[ridx]; |
67 | radeon_semaphore_ring_emit(rdev, ring, &rdev->ring[ring], semaphore, true); | 81 | |
82 | trace_radeon_semaphore_wait(ridx, semaphore); | ||
83 | |||
84 | if (radeon_semaphore_ring_emit(rdev, ridx, ring, semaphore, true)) { | ||
85 | ++semaphore->waiters; | ||
86 | |||
87 | /* for debugging lockup only, used by sysfs debug files */ | ||
88 | ring->last_semaphore_wait_addr = semaphore->gpu_addr; | ||
89 | return true; | ||
90 | } | ||
91 | return false; | ||
92 | } | ||
93 | |||
94 | /** | ||
95 | * radeon_semaphore_sync_to - use the semaphore to sync to a fence | ||
96 | * | ||
97 | * @semaphore: semaphore object to add fence to | ||
98 | * @fence: fence to sync to | ||
99 | * | ||
100 | * Sync to the fence using this semaphore object | ||
101 | */ | ||
102 | void radeon_semaphore_sync_to(struct radeon_semaphore *semaphore, | ||
103 | struct radeon_fence *fence) | ||
104 | { | ||
105 | struct radeon_fence *other; | ||
106 | |||
107 | if (!fence) | ||
108 | return; | ||
109 | |||
110 | other = semaphore->sync_to[fence->ring]; | ||
111 | semaphore->sync_to[fence->ring] = radeon_fence_later(fence, other); | ||
68 | } | 112 | } |
69 | 113 | ||
70 | /* caller must hold ring lock */ | 114 | /** |
115 | * radeon_semaphore_sync_rings - sync ring to all registered fences | ||
116 | * | ||
117 | * @rdev: radeon_device pointer | ||
118 | * @semaphore: semaphore object to use for sync | ||
119 | * @ring: ring that needs sync | ||
120 | * | ||
121 | * Ensure that all registered fences are signaled before letting | ||
122 | * the ring continue. The caller must hold the ring lock. | ||
123 | */ | ||
71 | int radeon_semaphore_sync_rings(struct radeon_device *rdev, | 124 | int radeon_semaphore_sync_rings(struct radeon_device *rdev, |
72 | struct radeon_semaphore *semaphore, | 125 | struct radeon_semaphore *semaphore, |
73 | int signaler, int waiter) | 126 | int ring) |
74 | { | 127 | { |
75 | int r; | 128 | int i, r; |
76 | 129 | ||
77 | /* no need to signal and wait on the same ring */ | 130 | for (i = 0; i < RADEON_NUM_RINGS; ++i) { |
78 | if (signaler == waiter) { | 131 | struct radeon_fence *fence = semaphore->sync_to[i]; |
79 | return 0; | ||
80 | } | ||
81 | 132 | ||
82 | /* prevent GPU deadlocks */ | 133 | /* check if we really need to sync */ |
83 | if (!rdev->ring[signaler].ready) { | 134 | if (!radeon_fence_need_sync(fence, ring)) |
84 | dev_err(rdev->dev, "Trying to sync to a disabled ring!"); | 135 | continue; |
85 | return -EINVAL; | ||
86 | } | ||
87 | 136 | ||
88 | r = radeon_ring_alloc(rdev, &rdev->ring[signaler], 8); | 137 | /* prevent GPU deadlocks */ |
89 | if (r) { | 138 | if (!rdev->ring[i].ready) { |
90 | return r; | 139 | dev_err(rdev->dev, "Syncing to a disabled ring!"); |
91 | } | 140 | return -EINVAL; |
92 | radeon_semaphore_emit_signal(rdev, signaler, semaphore); | 141 | } |
93 | radeon_ring_commit(rdev, &rdev->ring[signaler]); | ||
94 | 142 | ||
95 | /* we assume caller has already allocated space on waiters ring */ | 143 | /* allocate enough space for sync command */ |
96 | radeon_semaphore_emit_wait(rdev, waiter, semaphore); | 144 | r = radeon_ring_alloc(rdev, &rdev->ring[i], 16); |
145 | if (r) { | ||
146 | return r; | ||
147 | } | ||
97 | 148 | ||
98 | /* for debugging lockup only, used by sysfs debug files */ | 149 | /* emit the signal semaphore */ |
99 | rdev->ring[signaler].last_semaphore_signal_addr = semaphore->gpu_addr; | 150 | if (!radeon_semaphore_emit_signal(rdev, i, semaphore)) { |
100 | rdev->ring[waiter].last_semaphore_wait_addr = semaphore->gpu_addr; | 151 | /* signaling wasn't successful wait manually */ |
152 | radeon_ring_undo(&rdev->ring[i]); | ||
153 | radeon_fence_wait_locked(fence); | ||
154 | continue; | ||
155 | } | ||
156 | |||
157 | /* we assume caller has already allocated space on waiters ring */ | ||
158 | if (!radeon_semaphore_emit_wait(rdev, ring, semaphore)) { | ||
159 | /* waiting wasn't successful wait manually */ | ||
160 | radeon_ring_undo(&rdev->ring[i]); | ||
161 | radeon_fence_wait_locked(fence); | ||
162 | continue; | ||
163 | } | ||
164 | |||
165 | radeon_ring_commit(rdev, &rdev->ring[i]); | ||
166 | radeon_fence_note_sync(fence, ring); | ||
167 | } | ||
101 | 168 | ||
102 | return 0; | 169 | return 0; |
103 | } | 170 | } |
diff --git a/drivers/gpu/drm/radeon/radeon_trace.h b/drivers/gpu/drm/radeon/radeon_trace.h index 811bca691b36..9f0e18172b6e 100644 --- a/drivers/gpu/drm/radeon/radeon_trace.h +++ b/drivers/gpu/drm/radeon/radeon_trace.h | |||
@@ -111,6 +111,42 @@ DEFINE_EVENT(radeon_fence_request, radeon_fence_wait_end, | |||
111 | TP_ARGS(dev, seqno) | 111 | TP_ARGS(dev, seqno) |
112 | ); | 112 | ); |
113 | 113 | ||
114 | DECLARE_EVENT_CLASS(radeon_semaphore_request, | ||
115 | |||
116 | TP_PROTO(int ring, struct radeon_semaphore *sem), | ||
117 | |||
118 | TP_ARGS(ring, sem), | ||
119 | |||
120 | TP_STRUCT__entry( | ||
121 | __field(int, ring) | ||
122 | __field(signed, waiters) | ||
123 | __field(uint64_t, gpu_addr) | ||
124 | ), | ||
125 | |||
126 | TP_fast_assign( | ||
127 | __entry->ring = ring; | ||
128 | __entry->waiters = sem->waiters; | ||
129 | __entry->gpu_addr = sem->gpu_addr; | ||
130 | ), | ||
131 | |||
132 | TP_printk("ring=%u, waiters=%d, addr=%010Lx", __entry->ring, | ||
133 | __entry->waiters, __entry->gpu_addr) | ||
134 | ); | ||
135 | |||
136 | DEFINE_EVENT(radeon_semaphore_request, radeon_semaphore_signale, | ||
137 | |||
138 | TP_PROTO(int ring, struct radeon_semaphore *sem), | ||
139 | |||
140 | TP_ARGS(ring, sem) | ||
141 | ); | ||
142 | |||
143 | DEFINE_EVENT(radeon_semaphore_request, radeon_semaphore_wait, | ||
144 | |||
145 | TP_PROTO(int ring, struct radeon_semaphore *sem), | ||
146 | |||
147 | TP_ARGS(ring, sem) | ||
148 | ); | ||
149 | |||
114 | #endif | 150 | #endif |
115 | 151 | ||
116 | /* This part must be outside protection */ | 152 | /* This part must be outside protection */ |
diff --git a/drivers/gpu/drm/radeon/rv770_dma.c b/drivers/gpu/drm/radeon/rv770_dma.c index f9b02e3d6830..aca8cbe8a335 100644 --- a/drivers/gpu/drm/radeon/rv770_dma.c +++ b/drivers/gpu/drm/radeon/rv770_dma.c | |||
@@ -66,13 +66,8 @@ int rv770_copy_dma(struct radeon_device *rdev, | |||
66 | return r; | 66 | return r; |
67 | } | 67 | } |
68 | 68 | ||
69 | if (radeon_fence_need_sync(*fence, ring->idx)) { | 69 | radeon_semaphore_sync_to(sem, *fence); |
70 | radeon_semaphore_sync_rings(rdev, sem, (*fence)->ring, | 70 | radeon_semaphore_sync_rings(rdev, sem, ring->idx); |
71 | ring->idx); | ||
72 | radeon_fence_note_sync(*fence, ring->idx); | ||
73 | } else { | ||
74 | radeon_semaphore_free(rdev, &sem, NULL); | ||
75 | } | ||
76 | 71 | ||
77 | for (i = 0; i < num_loops; i++) { | 72 | for (i = 0; i < num_loops; i++) { |
78 | cur_size_in_dw = size_in_dw; | 73 | cur_size_in_dw = size_in_dw; |
diff --git a/drivers/gpu/drm/radeon/si_dma.c b/drivers/gpu/drm/radeon/si_dma.c index 8e8f46133532..59be2cfcbb47 100644 --- a/drivers/gpu/drm/radeon/si_dma.c +++ b/drivers/gpu/drm/radeon/si_dma.c | |||
@@ -195,13 +195,8 @@ int si_copy_dma(struct radeon_device *rdev, | |||
195 | return r; | 195 | return r; |
196 | } | 196 | } |
197 | 197 | ||
198 | if (radeon_fence_need_sync(*fence, ring->idx)) { | 198 | radeon_semaphore_sync_to(sem, *fence); |
199 | radeon_semaphore_sync_rings(rdev, sem, (*fence)->ring, | 199 | radeon_semaphore_sync_rings(rdev, sem, ring->idx); |
200 | ring->idx); | ||
201 | radeon_fence_note_sync(*fence, ring->idx); | ||
202 | } else { | ||
203 | radeon_semaphore_free(rdev, &sem, NULL); | ||
204 | } | ||
205 | 200 | ||
206 | for (i = 0; i < num_loops; i++) { | 201 | for (i = 0; i < num_loops; i++) { |
207 | cur_size_in_bytes = size_in_bytes; | 202 | cur_size_in_bytes = size_in_bytes; |
diff --git a/drivers/gpu/drm/radeon/trinity_dpm.c b/drivers/gpu/drm/radeon/trinity_dpm.c index 9364129ba292..d700698a1f22 100644 --- a/drivers/gpu/drm/radeon/trinity_dpm.c +++ b/drivers/gpu/drm/radeon/trinity_dpm.c | |||
@@ -1873,9 +1873,9 @@ int trinity_dpm_init(struct radeon_device *rdev) | |||
1873 | pi->enable_sclk_ds = true; | 1873 | pi->enable_sclk_ds = true; |
1874 | pi->enable_gfx_power_gating = true; | 1874 | pi->enable_gfx_power_gating = true; |
1875 | pi->enable_gfx_clock_gating = true; | 1875 | pi->enable_gfx_clock_gating = true; |
1876 | pi->enable_mg_clock_gating = true; | 1876 | pi->enable_mg_clock_gating = false; |
1877 | pi->enable_gfx_dynamic_mgpg = true; /* ??? */ | 1877 | pi->enable_gfx_dynamic_mgpg = false; |
1878 | pi->override_dynamic_mgpg = true; | 1878 | pi->override_dynamic_mgpg = false; |
1879 | pi->enable_auto_thermal_throttling = true; | 1879 | pi->enable_auto_thermal_throttling = true; |
1880 | pi->voltage_drop_in_dce = false; /* need to restructure dpm/modeset interaction */ | 1880 | pi->voltage_drop_in_dce = false; /* need to restructure dpm/modeset interaction */ |
1881 | pi->uvd_dpm = true; /* ??? */ | 1881 | pi->uvd_dpm = true; /* ??? */ |
diff --git a/drivers/gpu/drm/radeon/uvd_v1_0.c b/drivers/gpu/drm/radeon/uvd_v1_0.c index 7266805d9786..d4a68af1a279 100644 --- a/drivers/gpu/drm/radeon/uvd_v1_0.c +++ b/drivers/gpu/drm/radeon/uvd_v1_0.c | |||
@@ -357,7 +357,7 @@ int uvd_v1_0_ring_test(struct radeon_device *rdev, struct radeon_ring *ring) | |||
357 | * | 357 | * |
358 | * Emit a semaphore command (either wait or signal) to the UVD ring. | 358 | * Emit a semaphore command (either wait or signal) to the UVD ring. |
359 | */ | 359 | */ |
360 | void uvd_v1_0_semaphore_emit(struct radeon_device *rdev, | 360 | bool uvd_v1_0_semaphore_emit(struct radeon_device *rdev, |
361 | struct radeon_ring *ring, | 361 | struct radeon_ring *ring, |
362 | struct radeon_semaphore *semaphore, | 362 | struct radeon_semaphore *semaphore, |
363 | bool emit_wait) | 363 | bool emit_wait) |
@@ -372,6 +372,8 @@ void uvd_v1_0_semaphore_emit(struct radeon_device *rdev, | |||
372 | 372 | ||
373 | radeon_ring_write(ring, PACKET0(UVD_SEMA_CMD, 0)); | 373 | radeon_ring_write(ring, PACKET0(UVD_SEMA_CMD, 0)); |
374 | radeon_ring_write(ring, emit_wait ? 1 : 0); | 374 | radeon_ring_write(ring, emit_wait ? 1 : 0); |
375 | |||
376 | return true; | ||
375 | } | 377 | } |
376 | 378 | ||
377 | /** | 379 | /** |
diff --git a/drivers/gpu/drm/radeon/uvd_v3_1.c b/drivers/gpu/drm/radeon/uvd_v3_1.c index 5b6fa1f62d4e..d722db2cf340 100644 --- a/drivers/gpu/drm/radeon/uvd_v3_1.c +++ b/drivers/gpu/drm/radeon/uvd_v3_1.c | |||
@@ -37,7 +37,7 @@ | |||
37 | * | 37 | * |
38 | * Emit a semaphore command (either wait or signal) to the UVD ring. | 38 | * Emit a semaphore command (either wait or signal) to the UVD ring. |
39 | */ | 39 | */ |
40 | void uvd_v3_1_semaphore_emit(struct radeon_device *rdev, | 40 | bool uvd_v3_1_semaphore_emit(struct radeon_device *rdev, |
41 | struct radeon_ring *ring, | 41 | struct radeon_ring *ring, |
42 | struct radeon_semaphore *semaphore, | 42 | struct radeon_semaphore *semaphore, |
43 | bool emit_wait) | 43 | bool emit_wait) |
@@ -52,4 +52,6 @@ void uvd_v3_1_semaphore_emit(struct radeon_device *rdev, | |||
52 | 52 | ||
53 | radeon_ring_write(ring, PACKET0(UVD_SEMA_CMD, 0)); | 53 | radeon_ring_write(ring, PACKET0(UVD_SEMA_CMD, 0)); |
54 | radeon_ring_write(ring, 0x80 | (emit_wait ? 1 : 0)); | 54 | radeon_ring_write(ring, 0x80 | (emit_wait ? 1 : 0)); |
55 | |||
56 | return true; | ||
55 | } | 57 | } |
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c index 8d5a646ebe6a..07e02c4bf5a8 100644 --- a/drivers/gpu/drm/ttm/ttm_bo.c +++ b/drivers/gpu/drm/ttm/ttm_bo.c | |||
@@ -151,7 +151,7 @@ static void ttm_bo_release_list(struct kref *list_kref) | |||
151 | atomic_dec(&bo->glob->bo_count); | 151 | atomic_dec(&bo->glob->bo_count); |
152 | if (bo->resv == &bo->ttm_resv) | 152 | if (bo->resv == &bo->ttm_resv) |
153 | reservation_object_fini(&bo->ttm_resv); | 153 | reservation_object_fini(&bo->ttm_resv); |
154 | 154 | mutex_destroy(&bo->wu_mutex); | |
155 | if (bo->destroy) | 155 | if (bo->destroy) |
156 | bo->destroy(bo); | 156 | bo->destroy(bo); |
157 | else { | 157 | else { |
@@ -1123,6 +1123,7 @@ int ttm_bo_init(struct ttm_bo_device *bdev, | |||
1123 | INIT_LIST_HEAD(&bo->ddestroy); | 1123 | INIT_LIST_HEAD(&bo->ddestroy); |
1124 | INIT_LIST_HEAD(&bo->swap); | 1124 | INIT_LIST_HEAD(&bo->swap); |
1125 | INIT_LIST_HEAD(&bo->io_reserve_lru); | 1125 | INIT_LIST_HEAD(&bo->io_reserve_lru); |
1126 | mutex_init(&bo->wu_mutex); | ||
1126 | bo->bdev = bdev; | 1127 | bo->bdev = bdev; |
1127 | bo->glob = bdev->glob; | 1128 | bo->glob = bdev->glob; |
1128 | bo->type = type; | 1129 | bo->type = type; |
@@ -1704,3 +1705,35 @@ void ttm_bo_swapout_all(struct ttm_bo_device *bdev) | |||
1704 | ; | 1705 | ; |
1705 | } | 1706 | } |
1706 | EXPORT_SYMBOL(ttm_bo_swapout_all); | 1707 | EXPORT_SYMBOL(ttm_bo_swapout_all); |
1708 | |||
1709 | /** | ||
1710 | * ttm_bo_wait_unreserved - interruptible wait for a buffer object to become | ||
1711 | * unreserved | ||
1712 | * | ||
1713 | * @bo: Pointer to buffer | ||
1714 | */ | ||
1715 | int ttm_bo_wait_unreserved(struct ttm_buffer_object *bo) | ||
1716 | { | ||
1717 | int ret; | ||
1718 | |||
1719 | /* | ||
1720 | * In the absense of a wait_unlocked API, | ||
1721 | * Use the bo::wu_mutex to avoid triggering livelocks due to | ||
1722 | * concurrent use of this function. Note that this use of | ||
1723 | * bo::wu_mutex can go away if we change locking order to | ||
1724 | * mmap_sem -> bo::reserve. | ||
1725 | */ | ||
1726 | ret = mutex_lock_interruptible(&bo->wu_mutex); | ||
1727 | if (unlikely(ret != 0)) | ||
1728 | return -ERESTARTSYS; | ||
1729 | if (!ww_mutex_is_locked(&bo->resv->lock)) | ||
1730 | goto out_unlock; | ||
1731 | ret = ttm_bo_reserve_nolru(bo, true, false, false, NULL); | ||
1732 | if (unlikely(ret != 0)) | ||
1733 | goto out_unlock; | ||
1734 | ww_mutex_unlock(&bo->resv->lock); | ||
1735 | |||
1736 | out_unlock: | ||
1737 | mutex_unlock(&bo->wu_mutex); | ||
1738 | return ret; | ||
1739 | } | ||
diff --git a/drivers/gpu/drm/ttm/ttm_bo_util.c b/drivers/gpu/drm/ttm/ttm_bo_util.c index 4834c463c38b..15b86a94949d 100644 --- a/drivers/gpu/drm/ttm/ttm_bo_util.c +++ b/drivers/gpu/drm/ttm/ttm_bo_util.c | |||
@@ -350,10 +350,13 @@ int ttm_bo_move_memcpy(struct ttm_buffer_object *bo, | |||
350 | goto out2; | 350 | goto out2; |
351 | 351 | ||
352 | /* | 352 | /* |
353 | * Move nonexistent data. NOP. | 353 | * Don't move nonexistent data. Clear destination instead. |
354 | */ | 354 | */ |
355 | if (old_iomap == NULL && ttm == NULL) | 355 | if (old_iomap == NULL && |
356 | (ttm == NULL || ttm->state == tt_unpopulated)) { | ||
357 | memset_io(new_iomap, 0, new_mem->num_pages*PAGE_SIZE); | ||
356 | goto out2; | 358 | goto out2; |
359 | } | ||
357 | 360 | ||
358 | /* | 361 | /* |
359 | * TTM might be null for moves within the same region. | 362 | * TTM might be null for moves within the same region. |
diff --git a/drivers/gpu/drm/ttm/ttm_bo_vm.c b/drivers/gpu/drm/ttm/ttm_bo_vm.c index ac617f3ecd0c..b249ab9b1eb2 100644 --- a/drivers/gpu/drm/ttm/ttm_bo_vm.c +++ b/drivers/gpu/drm/ttm/ttm_bo_vm.c | |||
@@ -107,13 +107,28 @@ static int ttm_bo_vm_fault(struct vm_area_struct *vma, struct vm_fault *vmf) | |||
107 | /* | 107 | /* |
108 | * Work around locking order reversal in fault / nopfn | 108 | * Work around locking order reversal in fault / nopfn |
109 | * between mmap_sem and bo_reserve: Perform a trylock operation | 109 | * between mmap_sem and bo_reserve: Perform a trylock operation |
110 | * for reserve, and if it fails, retry the fault after scheduling. | 110 | * for reserve, and if it fails, retry the fault after waiting |
111 | * for the buffer to become unreserved. | ||
111 | */ | 112 | */ |
112 | 113 | ret = ttm_bo_reserve(bo, true, true, false, NULL); | |
113 | ret = ttm_bo_reserve(bo, true, true, false, 0); | ||
114 | if (unlikely(ret != 0)) { | 114 | if (unlikely(ret != 0)) { |
115 | if (ret == -EBUSY) | 115 | if (ret != -EBUSY) |
116 | set_need_resched(); | 116 | return VM_FAULT_NOPAGE; |
117 | |||
118 | if (vmf->flags & FAULT_FLAG_ALLOW_RETRY) { | ||
119 | if (!(vmf->flags & FAULT_FLAG_RETRY_NOWAIT)) { | ||
120 | up_read(&vma->vm_mm->mmap_sem); | ||
121 | (void) ttm_bo_wait_unreserved(bo); | ||
122 | } | ||
123 | |||
124 | return VM_FAULT_RETRY; | ||
125 | } | ||
126 | |||
127 | /* | ||
128 | * If we'd want to change locking order to | ||
129 | * mmap_sem -> bo::reserve, we'd use a blocking reserve here | ||
130 | * instead of retrying the fault... | ||
131 | */ | ||
117 | return VM_FAULT_NOPAGE; | 132 | return VM_FAULT_NOPAGE; |
118 | } | 133 | } |
119 | 134 | ||
@@ -123,7 +138,6 @@ static int ttm_bo_vm_fault(struct vm_area_struct *vma, struct vm_fault *vmf) | |||
123 | case 0: | 138 | case 0: |
124 | break; | 139 | break; |
125 | case -EBUSY: | 140 | case -EBUSY: |
126 | set_need_resched(); | ||
127 | case -ERESTARTSYS: | 141 | case -ERESTARTSYS: |
128 | retval = VM_FAULT_NOPAGE; | 142 | retval = VM_FAULT_NOPAGE; |
129 | goto out_unlock; | 143 | goto out_unlock; |
diff --git a/drivers/gpu/drm/ttm/ttm_execbuf_util.c b/drivers/gpu/drm/ttm/ttm_execbuf_util.c index 6c911789ae5c..479e9418e3d7 100644 --- a/drivers/gpu/drm/ttm/ttm_execbuf_util.c +++ b/drivers/gpu/drm/ttm/ttm_execbuf_util.c | |||
@@ -32,8 +32,7 @@ | |||
32 | #include <linux/sched.h> | 32 | #include <linux/sched.h> |
33 | #include <linux/module.h> | 33 | #include <linux/module.h> |
34 | 34 | ||
35 | static void ttm_eu_backoff_reservation_locked(struct list_head *list, | 35 | static void ttm_eu_backoff_reservation_locked(struct list_head *list) |
36 | struct ww_acquire_ctx *ticket) | ||
37 | { | 36 | { |
38 | struct ttm_validate_buffer *entry; | 37 | struct ttm_validate_buffer *entry; |
39 | 38 | ||
@@ -93,8 +92,9 @@ void ttm_eu_backoff_reservation(struct ww_acquire_ctx *ticket, | |||
93 | entry = list_first_entry(list, struct ttm_validate_buffer, head); | 92 | entry = list_first_entry(list, struct ttm_validate_buffer, head); |
94 | glob = entry->bo->glob; | 93 | glob = entry->bo->glob; |
95 | spin_lock(&glob->lru_lock); | 94 | spin_lock(&glob->lru_lock); |
96 | ttm_eu_backoff_reservation_locked(list, ticket); | 95 | ttm_eu_backoff_reservation_locked(list); |
97 | ww_acquire_fini(ticket); | 96 | if (ticket) |
97 | ww_acquire_fini(ticket); | ||
98 | spin_unlock(&glob->lru_lock); | 98 | spin_unlock(&glob->lru_lock); |
99 | } | 99 | } |
100 | EXPORT_SYMBOL(ttm_eu_backoff_reservation); | 100 | EXPORT_SYMBOL(ttm_eu_backoff_reservation); |
@@ -130,7 +130,8 @@ int ttm_eu_reserve_buffers(struct ww_acquire_ctx *ticket, | |||
130 | entry = list_first_entry(list, struct ttm_validate_buffer, head); | 130 | entry = list_first_entry(list, struct ttm_validate_buffer, head); |
131 | glob = entry->bo->glob; | 131 | glob = entry->bo->glob; |
132 | 132 | ||
133 | ww_acquire_init(ticket, &reservation_ww_class); | 133 | if (ticket) |
134 | ww_acquire_init(ticket, &reservation_ww_class); | ||
134 | retry: | 135 | retry: |
135 | list_for_each_entry(entry, list, head) { | 136 | list_for_each_entry(entry, list, head) { |
136 | struct ttm_buffer_object *bo = entry->bo; | 137 | struct ttm_buffer_object *bo = entry->bo; |
@@ -139,16 +140,17 @@ retry: | |||
139 | if (entry->reserved) | 140 | if (entry->reserved) |
140 | continue; | 141 | continue; |
141 | 142 | ||
142 | 143 | ret = ttm_bo_reserve_nolru(bo, true, (ticket == NULL), true, | |
143 | ret = ttm_bo_reserve_nolru(bo, true, false, true, ticket); | 144 | ticket); |
144 | 145 | ||
145 | if (ret == -EDEADLK) { | 146 | if (ret == -EDEADLK) { |
146 | /* uh oh, we lost out, drop every reservation and try | 147 | /* uh oh, we lost out, drop every reservation and try |
147 | * to only reserve this buffer, then start over if | 148 | * to only reserve this buffer, then start over if |
148 | * this succeeds. | 149 | * this succeeds. |
149 | */ | 150 | */ |
151 | BUG_ON(ticket == NULL); | ||
150 | spin_lock(&glob->lru_lock); | 152 | spin_lock(&glob->lru_lock); |
151 | ttm_eu_backoff_reservation_locked(list, ticket); | 153 | ttm_eu_backoff_reservation_locked(list); |
152 | spin_unlock(&glob->lru_lock); | 154 | spin_unlock(&glob->lru_lock); |
153 | ttm_eu_list_ref_sub(list); | 155 | ttm_eu_list_ref_sub(list); |
154 | ret = ww_mutex_lock_slow_interruptible(&bo->resv->lock, | 156 | ret = ww_mutex_lock_slow_interruptible(&bo->resv->lock, |
@@ -175,7 +177,8 @@ retry: | |||
175 | } | 177 | } |
176 | } | 178 | } |
177 | 179 | ||
178 | ww_acquire_done(ticket); | 180 | if (ticket) |
181 | ww_acquire_done(ticket); | ||
179 | spin_lock(&glob->lru_lock); | 182 | spin_lock(&glob->lru_lock); |
180 | ttm_eu_del_from_lru_locked(list); | 183 | ttm_eu_del_from_lru_locked(list); |
181 | spin_unlock(&glob->lru_lock); | 184 | spin_unlock(&glob->lru_lock); |
@@ -184,12 +187,14 @@ retry: | |||
184 | 187 | ||
185 | err: | 188 | err: |
186 | spin_lock(&glob->lru_lock); | 189 | spin_lock(&glob->lru_lock); |
187 | ttm_eu_backoff_reservation_locked(list, ticket); | 190 | ttm_eu_backoff_reservation_locked(list); |
188 | spin_unlock(&glob->lru_lock); | 191 | spin_unlock(&glob->lru_lock); |
189 | ttm_eu_list_ref_sub(list); | 192 | ttm_eu_list_ref_sub(list); |
190 | err_fini: | 193 | err_fini: |
191 | ww_acquire_done(ticket); | 194 | if (ticket) { |
192 | ww_acquire_fini(ticket); | 195 | ww_acquire_done(ticket); |
196 | ww_acquire_fini(ticket); | ||
197 | } | ||
193 | return ret; | 198 | return ret; |
194 | } | 199 | } |
195 | EXPORT_SYMBOL(ttm_eu_reserve_buffers); | 200 | EXPORT_SYMBOL(ttm_eu_reserve_buffers); |
@@ -224,7 +229,8 @@ void ttm_eu_fence_buffer_objects(struct ww_acquire_ctx *ticket, | |||
224 | } | 229 | } |
225 | spin_unlock(&bdev->fence_lock); | 230 | spin_unlock(&bdev->fence_lock); |
226 | spin_unlock(&glob->lru_lock); | 231 | spin_unlock(&glob->lru_lock); |
227 | ww_acquire_fini(ticket); | 232 | if (ticket) |
233 | ww_acquire_fini(ticket); | ||
228 | 234 | ||
229 | list_for_each_entry(entry, list, head) { | 235 | list_for_each_entry(entry, list, head) { |
230 | if (entry->old_sync_obj) | 236 | if (entry->old_sync_obj) |
diff --git a/drivers/gpu/drm/ttm/ttm_object.c b/drivers/gpu/drm/ttm/ttm_object.c index a868176c258a..6fe7b92a82d1 100644 --- a/drivers/gpu/drm/ttm/ttm_object.c +++ b/drivers/gpu/drm/ttm/ttm_object.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /************************************************************************** | 1 | /************************************************************************** |
2 | * | 2 | * |
3 | * Copyright (c) 2009 VMware, Inc., Palo Alto, CA., USA | 3 | * Copyright (c) 2009-2013 VMware, Inc., Palo Alto, CA., USA |
4 | * All Rights Reserved. | 4 | * All Rights Reserved. |
5 | * | 5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
@@ -26,6 +26,12 @@ | |||
26 | **************************************************************************/ | 26 | **************************************************************************/ |
27 | /* | 27 | /* |
28 | * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com> | 28 | * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com> |
29 | * | ||
30 | * While no substantial code is shared, the prime code is inspired by | ||
31 | * drm_prime.c, with | ||
32 | * Authors: | ||
33 | * Dave Airlie <airlied@redhat.com> | ||
34 | * Rob Clark <rob.clark@linaro.org> | ||
29 | */ | 35 | */ |
30 | /** @file ttm_ref_object.c | 36 | /** @file ttm_ref_object.c |
31 | * | 37 | * |
@@ -34,6 +40,7 @@ | |||
34 | * and release on file close. | 40 | * and release on file close. |
35 | */ | 41 | */ |
36 | 42 | ||
43 | |||
37 | /** | 44 | /** |
38 | * struct ttm_object_file | 45 | * struct ttm_object_file |
39 | * | 46 | * |
@@ -84,6 +91,9 @@ struct ttm_object_device { | |||
84 | struct drm_open_hash object_hash; | 91 | struct drm_open_hash object_hash; |
85 | atomic_t object_count; | 92 | atomic_t object_count; |
86 | struct ttm_mem_global *mem_glob; | 93 | struct ttm_mem_global *mem_glob; |
94 | struct dma_buf_ops ops; | ||
95 | void (*dmabuf_release)(struct dma_buf *dma_buf); | ||
96 | size_t dma_buf_size; | ||
87 | }; | 97 | }; |
88 | 98 | ||
89 | /** | 99 | /** |
@@ -116,6 +126,8 @@ struct ttm_ref_object { | |||
116 | struct ttm_object_file *tfile; | 126 | struct ttm_object_file *tfile; |
117 | }; | 127 | }; |
118 | 128 | ||
129 | static void ttm_prime_dmabuf_release(struct dma_buf *dma_buf); | ||
130 | |||
119 | static inline struct ttm_object_file * | 131 | static inline struct ttm_object_file * |
120 | ttm_object_file_ref(struct ttm_object_file *tfile) | 132 | ttm_object_file_ref(struct ttm_object_file *tfile) |
121 | { | 133 | { |
@@ -416,9 +428,10 @@ out_err: | |||
416 | } | 428 | } |
417 | EXPORT_SYMBOL(ttm_object_file_init); | 429 | EXPORT_SYMBOL(ttm_object_file_init); |
418 | 430 | ||
419 | struct ttm_object_device *ttm_object_device_init(struct ttm_mem_global | 431 | struct ttm_object_device * |
420 | *mem_glob, | 432 | ttm_object_device_init(struct ttm_mem_global *mem_glob, |
421 | unsigned int hash_order) | 433 | unsigned int hash_order, |
434 | const struct dma_buf_ops *ops) | ||
422 | { | 435 | { |
423 | struct ttm_object_device *tdev = kmalloc(sizeof(*tdev), GFP_KERNEL); | 436 | struct ttm_object_device *tdev = kmalloc(sizeof(*tdev), GFP_KERNEL); |
424 | int ret; | 437 | int ret; |
@@ -430,10 +443,17 @@ struct ttm_object_device *ttm_object_device_init(struct ttm_mem_global | |||
430 | spin_lock_init(&tdev->object_lock); | 443 | spin_lock_init(&tdev->object_lock); |
431 | atomic_set(&tdev->object_count, 0); | 444 | atomic_set(&tdev->object_count, 0); |
432 | ret = drm_ht_create(&tdev->object_hash, hash_order); | 445 | ret = drm_ht_create(&tdev->object_hash, hash_order); |
446 | if (ret != 0) | ||
447 | goto out_no_object_hash; | ||
433 | 448 | ||
434 | if (likely(ret == 0)) | 449 | tdev->ops = *ops; |
435 | return tdev; | 450 | tdev->dmabuf_release = tdev->ops.release; |
451 | tdev->ops.release = ttm_prime_dmabuf_release; | ||
452 | tdev->dma_buf_size = ttm_round_pot(sizeof(struct dma_buf)) + | ||
453 | ttm_round_pot(sizeof(struct file)); | ||
454 | return tdev; | ||
436 | 455 | ||
456 | out_no_object_hash: | ||
437 | kfree(tdev); | 457 | kfree(tdev); |
438 | return NULL; | 458 | return NULL; |
439 | } | 459 | } |
@@ -452,3 +472,225 @@ void ttm_object_device_release(struct ttm_object_device **p_tdev) | |||
452 | kfree(tdev); | 472 | kfree(tdev); |
453 | } | 473 | } |
454 | EXPORT_SYMBOL(ttm_object_device_release); | 474 | EXPORT_SYMBOL(ttm_object_device_release); |
475 | |||
476 | /** | ||
477 | * get_dma_buf_unless_doomed - get a dma_buf reference if possible. | ||
478 | * | ||
479 | * @dma_buf: Non-refcounted pointer to a struct dma-buf. | ||
480 | * | ||
481 | * Obtain a file reference from a lookup structure that doesn't refcount | ||
482 | * the file, but synchronizes with its release method to make sure it has | ||
483 | * not been freed yet. See for example kref_get_unless_zero documentation. | ||
484 | * Returns true if refcounting succeeds, false otherwise. | ||
485 | * | ||
486 | * Nobody really wants this as a public API yet, so let it mature here | ||
487 | * for some time... | ||
488 | */ | ||
489 | static bool __must_check get_dma_buf_unless_doomed(struct dma_buf *dmabuf) | ||
490 | { | ||
491 | return atomic_long_inc_not_zero(&dmabuf->file->f_count) != 0L; | ||
492 | } | ||
493 | |||
494 | /** | ||
495 | * ttm_prime_refcount_release - refcount release method for a prime object. | ||
496 | * | ||
497 | * @p_base: Pointer to ttm_base_object pointer. | ||
498 | * | ||
499 | * This is a wrapper that calls the refcount_release founction of the | ||
500 | * underlying object. At the same time it cleans up the prime object. | ||
501 | * This function is called when all references to the base object we | ||
502 | * derive from are gone. | ||
503 | */ | ||
504 | static void ttm_prime_refcount_release(struct ttm_base_object **p_base) | ||
505 | { | ||
506 | struct ttm_base_object *base = *p_base; | ||
507 | struct ttm_prime_object *prime; | ||
508 | |||
509 | *p_base = NULL; | ||
510 | prime = container_of(base, struct ttm_prime_object, base); | ||
511 | BUG_ON(prime->dma_buf != NULL); | ||
512 | mutex_destroy(&prime->mutex); | ||
513 | if (prime->refcount_release) | ||
514 | prime->refcount_release(&base); | ||
515 | } | ||
516 | |||
517 | /** | ||
518 | * ttm_prime_dmabuf_release - Release method for the dma-bufs we export | ||
519 | * | ||
520 | * @dma_buf: | ||
521 | * | ||
522 | * This function first calls the dma_buf release method the driver | ||
523 | * provides. Then it cleans up our dma_buf pointer used for lookup, | ||
524 | * and finally releases the reference the dma_buf has on our base | ||
525 | * object. | ||
526 | */ | ||
527 | static void ttm_prime_dmabuf_release(struct dma_buf *dma_buf) | ||
528 | { | ||
529 | struct ttm_prime_object *prime = | ||
530 | (struct ttm_prime_object *) dma_buf->priv; | ||
531 | struct ttm_base_object *base = &prime->base; | ||
532 | struct ttm_object_device *tdev = base->tfile->tdev; | ||
533 | |||
534 | if (tdev->dmabuf_release) | ||
535 | tdev->dmabuf_release(dma_buf); | ||
536 | mutex_lock(&prime->mutex); | ||
537 | if (prime->dma_buf == dma_buf) | ||
538 | prime->dma_buf = NULL; | ||
539 | mutex_unlock(&prime->mutex); | ||
540 | ttm_mem_global_free(tdev->mem_glob, tdev->dma_buf_size); | ||
541 | ttm_base_object_unref(&base); | ||
542 | } | ||
543 | |||
544 | /** | ||
545 | * ttm_prime_fd_to_handle - Get a base object handle from a prime fd | ||
546 | * | ||
547 | * @tfile: A struct ttm_object_file identifying the caller. | ||
548 | * @fd: The prime / dmabuf fd. | ||
549 | * @handle: The returned handle. | ||
550 | * | ||
551 | * This function returns a handle to an object that previously exported | ||
552 | * a dma-buf. Note that we don't handle imports yet, because we simply | ||
553 | * have no consumers of that implementation. | ||
554 | */ | ||
555 | int ttm_prime_fd_to_handle(struct ttm_object_file *tfile, | ||
556 | int fd, u32 *handle) | ||
557 | { | ||
558 | struct ttm_object_device *tdev = tfile->tdev; | ||
559 | struct dma_buf *dma_buf; | ||
560 | struct ttm_prime_object *prime; | ||
561 | struct ttm_base_object *base; | ||
562 | int ret; | ||
563 | |||
564 | dma_buf = dma_buf_get(fd); | ||
565 | if (IS_ERR(dma_buf)) | ||
566 | return PTR_ERR(dma_buf); | ||
567 | |||
568 | if (dma_buf->ops != &tdev->ops) | ||
569 | return -ENOSYS; | ||
570 | |||
571 | prime = (struct ttm_prime_object *) dma_buf->priv; | ||
572 | base = &prime->base; | ||
573 | *handle = base->hash.key; | ||
574 | ret = ttm_ref_object_add(tfile, base, TTM_REF_USAGE, NULL); | ||
575 | |||
576 | dma_buf_put(dma_buf); | ||
577 | |||
578 | return ret; | ||
579 | } | ||
580 | EXPORT_SYMBOL_GPL(ttm_prime_fd_to_handle); | ||
581 | |||
582 | /** | ||
583 | * ttm_prime_handle_to_fd - Return a dma_buf fd from a ttm prime object | ||
584 | * | ||
585 | * @tfile: Struct ttm_object_file identifying the caller. | ||
586 | * @handle: Handle to the object we're exporting from. | ||
587 | * @flags: flags for dma-buf creation. We just pass them on. | ||
588 | * @prime_fd: The returned file descriptor. | ||
589 | * | ||
590 | */ | ||
591 | int ttm_prime_handle_to_fd(struct ttm_object_file *tfile, | ||
592 | uint32_t handle, uint32_t flags, | ||
593 | int *prime_fd) | ||
594 | { | ||
595 | struct ttm_object_device *tdev = tfile->tdev; | ||
596 | struct ttm_base_object *base; | ||
597 | struct dma_buf *dma_buf; | ||
598 | struct ttm_prime_object *prime; | ||
599 | int ret; | ||
600 | |||
601 | base = ttm_base_object_lookup(tfile, handle); | ||
602 | if (unlikely(base == NULL || | ||
603 | base->object_type != ttm_prime_type)) { | ||
604 | ret = -ENOENT; | ||
605 | goto out_unref; | ||
606 | } | ||
607 | |||
608 | prime = container_of(base, struct ttm_prime_object, base); | ||
609 | if (unlikely(!base->shareable)) { | ||
610 | ret = -EPERM; | ||
611 | goto out_unref; | ||
612 | } | ||
613 | |||
614 | ret = mutex_lock_interruptible(&prime->mutex); | ||
615 | if (unlikely(ret != 0)) { | ||
616 | ret = -ERESTARTSYS; | ||
617 | goto out_unref; | ||
618 | } | ||
619 | |||
620 | dma_buf = prime->dma_buf; | ||
621 | if (!dma_buf || !get_dma_buf_unless_doomed(dma_buf)) { | ||
622 | |||
623 | /* | ||
624 | * Need to create a new dma_buf, with memory accounting. | ||
625 | */ | ||
626 | ret = ttm_mem_global_alloc(tdev->mem_glob, tdev->dma_buf_size, | ||
627 | false, true); | ||
628 | if (unlikely(ret != 0)) { | ||
629 | mutex_unlock(&prime->mutex); | ||
630 | goto out_unref; | ||
631 | } | ||
632 | |||
633 | dma_buf = dma_buf_export(prime, &tdev->ops, | ||
634 | prime->size, flags); | ||
635 | if (IS_ERR(dma_buf)) { | ||
636 | ret = PTR_ERR(dma_buf); | ||
637 | ttm_mem_global_free(tdev->mem_glob, | ||
638 | tdev->dma_buf_size); | ||
639 | mutex_unlock(&prime->mutex); | ||
640 | goto out_unref; | ||
641 | } | ||
642 | |||
643 | /* | ||
644 | * dma_buf has taken the base object reference | ||
645 | */ | ||
646 | base = NULL; | ||
647 | prime->dma_buf = dma_buf; | ||
648 | } | ||
649 | mutex_unlock(&prime->mutex); | ||
650 | |||
651 | ret = dma_buf_fd(dma_buf, flags); | ||
652 | if (ret >= 0) { | ||
653 | *prime_fd = ret; | ||
654 | ret = 0; | ||
655 | } else | ||
656 | dma_buf_put(dma_buf); | ||
657 | |||
658 | out_unref: | ||
659 | if (base) | ||
660 | ttm_base_object_unref(&base); | ||
661 | return ret; | ||
662 | } | ||
663 | EXPORT_SYMBOL_GPL(ttm_prime_handle_to_fd); | ||
664 | |||
665 | /** | ||
666 | * ttm_prime_object_init - Initialize a ttm_prime_object | ||
667 | * | ||
668 | * @tfile: struct ttm_object_file identifying the caller | ||
669 | * @size: The size of the dma_bufs we export. | ||
670 | * @prime: The object to be initialized. | ||
671 | * @shareable: See ttm_base_object_init | ||
672 | * @type: See ttm_base_object_init | ||
673 | * @refcount_release: See ttm_base_object_init | ||
674 | * @ref_obj_release: See ttm_base_object_init | ||
675 | * | ||
676 | * Initializes an object which is compatible with the drm_prime model | ||
677 | * for data sharing between processes and devices. | ||
678 | */ | ||
679 | int ttm_prime_object_init(struct ttm_object_file *tfile, size_t size, | ||
680 | struct ttm_prime_object *prime, bool shareable, | ||
681 | enum ttm_object_type type, | ||
682 | void (*refcount_release) (struct ttm_base_object **), | ||
683 | void (*ref_obj_release) (struct ttm_base_object *, | ||
684 | enum ttm_ref_type ref_type)) | ||
685 | { | ||
686 | mutex_init(&prime->mutex); | ||
687 | prime->size = PAGE_ALIGN(size); | ||
688 | prime->real_type = type; | ||
689 | prime->dma_buf = NULL; | ||
690 | prime->refcount_release = refcount_release; | ||
691 | return ttm_base_object_init(tfile, &prime->base, shareable, | ||
692 | ttm_prime_type, | ||
693 | ttm_prime_refcount_release, | ||
694 | ref_obj_release); | ||
695 | } | ||
696 | EXPORT_SYMBOL(ttm_prime_object_init); | ||
diff --git a/drivers/gpu/drm/vmwgfx/Makefile b/drivers/gpu/drm/vmwgfx/Makefile index 2cc6cd91ac11..9f8b690bcf52 100644 --- a/drivers/gpu/drm/vmwgfx/Makefile +++ b/drivers/gpu/drm/vmwgfx/Makefile | |||
@@ -6,6 +6,6 @@ vmwgfx-y := vmwgfx_execbuf.o vmwgfx_gmr.o vmwgfx_kms.o vmwgfx_drv.o \ | |||
6 | vmwgfx_fifo.o vmwgfx_irq.o vmwgfx_ldu.o vmwgfx_ttm_glue.o \ | 6 | vmwgfx_fifo.o vmwgfx_irq.o vmwgfx_ldu.o vmwgfx_ttm_glue.o \ |
7 | vmwgfx_overlay.o vmwgfx_marker.o vmwgfx_gmrid_manager.o \ | 7 | vmwgfx_overlay.o vmwgfx_marker.o vmwgfx_gmrid_manager.o \ |
8 | vmwgfx_fence.o vmwgfx_dmabuf.o vmwgfx_scrn.o vmwgfx_context.o \ | 8 | vmwgfx_fence.o vmwgfx_dmabuf.o vmwgfx_scrn.o vmwgfx_context.o \ |
9 | vmwgfx_surface.o | 9 | vmwgfx_surface.o vmwgfx_prime.o |
10 | 10 | ||
11 | obj-$(CONFIG_DRM_VMWGFX) := vmwgfx.o | 11 | obj-$(CONFIG_DRM_VMWGFX) := vmwgfx.o |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c index 20d5485eaf98..c7a549694e59 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | |||
@@ -677,7 +677,7 @@ static int vmw_driver_load(struct drm_device *dev, unsigned long chipset) | |||
677 | } | 677 | } |
678 | 678 | ||
679 | dev_priv->tdev = ttm_object_device_init | 679 | dev_priv->tdev = ttm_object_device_init |
680 | (dev_priv->mem_global_ref.object, 12); | 680 | (dev_priv->mem_global_ref.object, 12, &vmw_prime_dmabuf_ops); |
681 | 681 | ||
682 | if (unlikely(dev_priv->tdev == NULL)) { | 682 | if (unlikely(dev_priv->tdev == NULL)) { |
683 | DRM_ERROR("Unable to initialize TTM object management.\n"); | 683 | DRM_ERROR("Unable to initialize TTM object management.\n"); |
@@ -1210,7 +1210,7 @@ static const struct file_operations vmwgfx_driver_fops = { | |||
1210 | 1210 | ||
1211 | static struct drm_driver driver = { | 1211 | static struct drm_driver driver = { |
1212 | .driver_features = DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | | 1212 | .driver_features = DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | |
1213 | DRIVER_MODESET, | 1213 | DRIVER_MODESET | DRIVER_PRIME, |
1214 | .load = vmw_driver_load, | 1214 | .load = vmw_driver_load, |
1215 | .unload = vmw_driver_unload, | 1215 | .unload = vmw_driver_unload, |
1216 | .lastclose = vmw_lastclose, | 1216 | .lastclose = vmw_lastclose, |
@@ -1235,6 +1235,9 @@ static struct drm_driver driver = { | |||
1235 | .dumb_map_offset = vmw_dumb_map_offset, | 1235 | .dumb_map_offset = vmw_dumb_map_offset, |
1236 | .dumb_destroy = vmw_dumb_destroy, | 1236 | .dumb_destroy = vmw_dumb_destroy, |
1237 | 1237 | ||
1238 | .prime_fd_to_handle = vmw_prime_fd_to_handle, | ||
1239 | .prime_handle_to_fd = vmw_prime_handle_to_fd, | ||
1240 | |||
1238 | .fops = &vmwgfx_driver_fops, | 1241 | .fops = &vmwgfx_driver_fops, |
1239 | .name = VMWGFX_DRIVER_NAME, | 1242 | .name = VMWGFX_DRIVER_NAME, |
1240 | .desc = VMWGFX_DRIVER_DESC, | 1243 | .desc = VMWGFX_DRIVER_DESC, |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h index e401d5dbcb96..db85985c7086 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h | |||
@@ -819,6 +819,20 @@ int vmw_overlay_num_free_overlays(struct vmw_private *dev_priv); | |||
819 | extern const struct ttm_mem_type_manager_func vmw_gmrid_manager_func; | 819 | extern const struct ttm_mem_type_manager_func vmw_gmrid_manager_func; |
820 | 820 | ||
821 | /** | 821 | /** |
822 | * Prime - vmwgfx_prime.c | ||
823 | */ | ||
824 | |||
825 | extern const struct dma_buf_ops vmw_prime_dmabuf_ops; | ||
826 | extern int vmw_prime_fd_to_handle(struct drm_device *dev, | ||
827 | struct drm_file *file_priv, | ||
828 | int fd, u32 *handle); | ||
829 | extern int vmw_prime_handle_to_fd(struct drm_device *dev, | ||
830 | struct drm_file *file_priv, | ||
831 | uint32_t handle, uint32_t flags, | ||
832 | int *prime_fd); | ||
833 | |||
834 | |||
835 | /** | ||
822 | * Inline helper functions | 836 | * Inline helper functions |
823 | */ | 837 | */ |
824 | 838 | ||
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_prime.c b/drivers/gpu/drm/vmwgfx/vmwgfx_prime.c new file mode 100644 index 000000000000..31fe32d8d65a --- /dev/null +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_prime.c | |||
@@ -0,0 +1,137 @@ | |||
1 | /************************************************************************** | ||
2 | * | ||
3 | * Copyright © 2013 VMware, Inc., Palo Alto, CA., USA | ||
4 | * All Rights Reserved. | ||
5 | * | ||
6 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
7 | * copy of this software and associated documentation files (the | ||
8 | * "Software"), to deal in the Software without restriction, including | ||
9 | * without limitation the rights to use, copy, modify, merge, publish, | ||
10 | * distribute, sub license, and/or sell copies of the Software, and to | ||
11 | * permit persons to whom the Software is furnished to do so, subject to | ||
12 | * the following conditions: | ||
13 | * | ||
14 | * The above copyright notice and this permission notice (including the | ||
15 | * next paragraph) shall be included in all copies or substantial portions | ||
16 | * of the Software. | ||
17 | * | ||
18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
20 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL | ||
21 | * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, | ||
22 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR | ||
23 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE | ||
24 | * USE OR OTHER DEALINGS IN THE SOFTWARE. | ||
25 | * | ||
26 | **************************************************************************/ | ||
27 | /* | ||
28 | * Authors: | ||
29 | * Thomas Hellstrom <thellstrom@vmware.com> | ||
30 | * | ||
31 | */ | ||
32 | |||
33 | #include "vmwgfx_drv.h" | ||
34 | #include <linux/dma-buf.h> | ||
35 | #include <drm/ttm/ttm_object.h> | ||
36 | |||
37 | /* | ||
38 | * DMA-BUF attach- and mapping methods. No need to implement | ||
39 | * these until we have other virtual devices use them. | ||
40 | */ | ||
41 | |||
42 | static int vmw_prime_map_attach(struct dma_buf *dma_buf, | ||
43 | struct device *target_dev, | ||
44 | struct dma_buf_attachment *attach) | ||
45 | { | ||
46 | return -ENOSYS; | ||
47 | } | ||
48 | |||
49 | static void vmw_prime_map_detach(struct dma_buf *dma_buf, | ||
50 | struct dma_buf_attachment *attach) | ||
51 | { | ||
52 | } | ||
53 | |||
54 | static struct sg_table *vmw_prime_map_dma_buf(struct dma_buf_attachment *attach, | ||
55 | enum dma_data_direction dir) | ||
56 | { | ||
57 | return ERR_PTR(-ENOSYS); | ||
58 | } | ||
59 | |||
60 | static void vmw_prime_unmap_dma_buf(struct dma_buf_attachment *attach, | ||
61 | struct sg_table *sgb, | ||
62 | enum dma_data_direction dir) | ||
63 | { | ||
64 | } | ||
65 | |||
66 | static void *vmw_prime_dmabuf_vmap(struct dma_buf *dma_buf) | ||
67 | { | ||
68 | return NULL; | ||
69 | } | ||
70 | |||
71 | static void vmw_prime_dmabuf_vunmap(struct dma_buf *dma_buf, void *vaddr) | ||
72 | { | ||
73 | } | ||
74 | |||
75 | static void *vmw_prime_dmabuf_kmap_atomic(struct dma_buf *dma_buf, | ||
76 | unsigned long page_num) | ||
77 | { | ||
78 | return NULL; | ||
79 | } | ||
80 | |||
81 | static void vmw_prime_dmabuf_kunmap_atomic(struct dma_buf *dma_buf, | ||
82 | unsigned long page_num, void *addr) | ||
83 | { | ||
84 | |||
85 | } | ||
86 | static void *vmw_prime_dmabuf_kmap(struct dma_buf *dma_buf, | ||
87 | unsigned long page_num) | ||
88 | { | ||
89 | return NULL; | ||
90 | } | ||
91 | |||
92 | static void vmw_prime_dmabuf_kunmap(struct dma_buf *dma_buf, | ||
93 | unsigned long page_num, void *addr) | ||
94 | { | ||
95 | |||
96 | } | ||
97 | |||
98 | static int vmw_prime_dmabuf_mmap(struct dma_buf *dma_buf, | ||
99 | struct vm_area_struct *vma) | ||
100 | { | ||
101 | WARN_ONCE(true, "Attempted use of dmabuf mmap. Bad.\n"); | ||
102 | return -ENOSYS; | ||
103 | } | ||
104 | |||
105 | const struct dma_buf_ops vmw_prime_dmabuf_ops = { | ||
106 | .attach = vmw_prime_map_attach, | ||
107 | .detach = vmw_prime_map_detach, | ||
108 | .map_dma_buf = vmw_prime_map_dma_buf, | ||
109 | .unmap_dma_buf = vmw_prime_unmap_dma_buf, | ||
110 | .release = NULL, | ||
111 | .kmap = vmw_prime_dmabuf_kmap, | ||
112 | .kmap_atomic = vmw_prime_dmabuf_kmap_atomic, | ||
113 | .kunmap = vmw_prime_dmabuf_kunmap, | ||
114 | .kunmap_atomic = vmw_prime_dmabuf_kunmap_atomic, | ||
115 | .mmap = vmw_prime_dmabuf_mmap, | ||
116 | .vmap = vmw_prime_dmabuf_vmap, | ||
117 | .vunmap = vmw_prime_dmabuf_vunmap, | ||
118 | }; | ||
119 | |||
120 | int vmw_prime_fd_to_handle(struct drm_device *dev, | ||
121 | struct drm_file *file_priv, | ||
122 | int fd, u32 *handle) | ||
123 | { | ||
124 | struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile; | ||
125 | |||
126 | return ttm_prime_fd_to_handle(tfile, fd, handle); | ||
127 | } | ||
128 | |||
129 | int vmw_prime_handle_to_fd(struct drm_device *dev, | ||
130 | struct drm_file *file_priv, | ||
131 | uint32_t handle, uint32_t flags, | ||
132 | int *prime_fd) | ||
133 | { | ||
134 | struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile; | ||
135 | |||
136 | return ttm_prime_handle_to_fd(tfile, handle, flags, prime_fd); | ||
137 | } | ||
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c index 252501a54def..efe2b74c5eb1 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c | |||
@@ -35,7 +35,7 @@ | |||
35 | #define VMW_RES_EVICT_ERR_COUNT 10 | 35 | #define VMW_RES_EVICT_ERR_COUNT 10 |
36 | 36 | ||
37 | struct vmw_user_dma_buffer { | 37 | struct vmw_user_dma_buffer { |
38 | struct ttm_base_object base; | 38 | struct ttm_prime_object prime; |
39 | struct vmw_dma_buffer dma; | 39 | struct vmw_dma_buffer dma; |
40 | }; | 40 | }; |
41 | 41 | ||
@@ -297,7 +297,7 @@ int vmw_user_resource_lookup_handle(struct vmw_private *dev_priv, | |||
297 | if (unlikely(base == NULL)) | 297 | if (unlikely(base == NULL)) |
298 | return -EINVAL; | 298 | return -EINVAL; |
299 | 299 | ||
300 | if (unlikely(base->object_type != converter->object_type)) | 300 | if (unlikely(ttm_base_object_type(base) != converter->object_type)) |
301 | goto out_bad_resource; | 301 | goto out_bad_resource; |
302 | 302 | ||
303 | res = converter->base_obj_to_res(base); | 303 | res = converter->base_obj_to_res(base); |
@@ -387,7 +387,7 @@ static void vmw_user_dmabuf_destroy(struct ttm_buffer_object *bo) | |||
387 | { | 387 | { |
388 | struct vmw_user_dma_buffer *vmw_user_bo = vmw_user_dma_buffer(bo); | 388 | struct vmw_user_dma_buffer *vmw_user_bo = vmw_user_dma_buffer(bo); |
389 | 389 | ||
390 | ttm_base_object_kfree(vmw_user_bo, base); | 390 | ttm_prime_object_kfree(vmw_user_bo, prime); |
391 | } | 391 | } |
392 | 392 | ||
393 | static void vmw_user_dmabuf_release(struct ttm_base_object **p_base) | 393 | static void vmw_user_dmabuf_release(struct ttm_base_object **p_base) |
@@ -401,7 +401,8 @@ static void vmw_user_dmabuf_release(struct ttm_base_object **p_base) | |||
401 | if (unlikely(base == NULL)) | 401 | if (unlikely(base == NULL)) |
402 | return; | 402 | return; |
403 | 403 | ||
404 | vmw_user_bo = container_of(base, struct vmw_user_dma_buffer, base); | 404 | vmw_user_bo = container_of(base, struct vmw_user_dma_buffer, |
405 | prime.base); | ||
405 | bo = &vmw_user_bo->dma.base; | 406 | bo = &vmw_user_bo->dma.base; |
406 | ttm_bo_unref(&bo); | 407 | ttm_bo_unref(&bo); |
407 | } | 408 | } |
@@ -442,18 +443,19 @@ int vmw_user_dmabuf_alloc(struct vmw_private *dev_priv, | |||
442 | return ret; | 443 | return ret; |
443 | 444 | ||
444 | tmp = ttm_bo_reference(&user_bo->dma.base); | 445 | tmp = ttm_bo_reference(&user_bo->dma.base); |
445 | ret = ttm_base_object_init(tfile, | 446 | ret = ttm_prime_object_init(tfile, |
446 | &user_bo->base, | 447 | size, |
447 | shareable, | 448 | &user_bo->prime, |
448 | ttm_buffer_type, | 449 | shareable, |
449 | &vmw_user_dmabuf_release, NULL); | 450 | ttm_buffer_type, |
451 | &vmw_user_dmabuf_release, NULL); | ||
450 | if (unlikely(ret != 0)) { | 452 | if (unlikely(ret != 0)) { |
451 | ttm_bo_unref(&tmp); | 453 | ttm_bo_unref(&tmp); |
452 | goto out_no_base_object; | 454 | goto out_no_base_object; |
453 | } | 455 | } |
454 | 456 | ||
455 | *p_dma_buf = &user_bo->dma; | 457 | *p_dma_buf = &user_bo->dma; |
456 | *handle = user_bo->base.hash.key; | 458 | *handle = user_bo->prime.base.hash.key; |
457 | 459 | ||
458 | out_no_base_object: | 460 | out_no_base_object: |
459 | return ret; | 461 | return ret; |
@@ -475,8 +477,8 @@ int vmw_user_dmabuf_verify_access(struct ttm_buffer_object *bo, | |||
475 | return -EPERM; | 477 | return -EPERM; |
476 | 478 | ||
477 | vmw_user_bo = vmw_user_dma_buffer(bo); | 479 | vmw_user_bo = vmw_user_dma_buffer(bo); |
478 | return (vmw_user_bo->base.tfile == tfile || | 480 | return (vmw_user_bo->prime.base.tfile == tfile || |
479 | vmw_user_bo->base.shareable) ? 0 : -EPERM; | 481 | vmw_user_bo->prime.base.shareable) ? 0 : -EPERM; |
480 | } | 482 | } |
481 | 483 | ||
482 | int vmw_dmabuf_alloc_ioctl(struct drm_device *dev, void *data, | 484 | int vmw_dmabuf_alloc_ioctl(struct drm_device *dev, void *data, |
@@ -538,14 +540,15 @@ int vmw_user_dmabuf_lookup(struct ttm_object_file *tfile, | |||
538 | return -ESRCH; | 540 | return -ESRCH; |
539 | } | 541 | } |
540 | 542 | ||
541 | if (unlikely(base->object_type != ttm_buffer_type)) { | 543 | if (unlikely(ttm_base_object_type(base) != ttm_buffer_type)) { |
542 | ttm_base_object_unref(&base); | 544 | ttm_base_object_unref(&base); |
543 | printk(KERN_ERR "Invalid buffer object handle 0x%08lx.\n", | 545 | printk(KERN_ERR "Invalid buffer object handle 0x%08lx.\n", |
544 | (unsigned long)handle); | 546 | (unsigned long)handle); |
545 | return -EINVAL; | 547 | return -EINVAL; |
546 | } | 548 | } |
547 | 549 | ||
548 | vmw_user_bo = container_of(base, struct vmw_user_dma_buffer, base); | 550 | vmw_user_bo = container_of(base, struct vmw_user_dma_buffer, |
551 | prime.base); | ||
549 | (void)ttm_bo_reference(&vmw_user_bo->dma.base); | 552 | (void)ttm_bo_reference(&vmw_user_bo->dma.base); |
550 | ttm_base_object_unref(&base); | 553 | ttm_base_object_unref(&base); |
551 | *out = &vmw_user_bo->dma; | 554 | *out = &vmw_user_bo->dma; |
@@ -562,7 +565,8 @@ int vmw_user_dmabuf_reference(struct ttm_object_file *tfile, | |||
562 | return -EINVAL; | 565 | return -EINVAL; |
563 | 566 | ||
564 | user_bo = container_of(dma_buf, struct vmw_user_dma_buffer, dma); | 567 | user_bo = container_of(dma_buf, struct vmw_user_dma_buffer, dma); |
565 | return ttm_ref_object_add(tfile, &user_bo->base, TTM_REF_USAGE, NULL); | 568 | return ttm_ref_object_add(tfile, &user_bo->prime.base, |
569 | TTM_REF_USAGE, NULL); | ||
566 | } | 570 | } |
567 | 571 | ||
568 | /* | 572 | /* |
@@ -807,15 +811,16 @@ int vmw_dumb_create(struct drm_file *file_priv, | |||
807 | goto out_no_dmabuf; | 811 | goto out_no_dmabuf; |
808 | 812 | ||
809 | tmp = ttm_bo_reference(&vmw_user_bo->dma.base); | 813 | tmp = ttm_bo_reference(&vmw_user_bo->dma.base); |
810 | ret = ttm_base_object_init(vmw_fpriv(file_priv)->tfile, | 814 | ret = ttm_prime_object_init(vmw_fpriv(file_priv)->tfile, |
811 | &vmw_user_bo->base, | 815 | args->size, |
812 | false, | 816 | &vmw_user_bo->prime, |
813 | ttm_buffer_type, | 817 | false, |
814 | &vmw_user_dmabuf_release, NULL); | 818 | ttm_buffer_type, |
819 | &vmw_user_dmabuf_release, NULL); | ||
815 | if (unlikely(ret != 0)) | 820 | if (unlikely(ret != 0)) |
816 | goto out_no_base_object; | 821 | goto out_no_base_object; |
817 | 822 | ||
818 | args->handle = vmw_user_bo->base.hash.key; | 823 | args->handle = vmw_user_bo->prime.base.hash.key; |
819 | 824 | ||
820 | out_no_base_object: | 825 | out_no_base_object: |
821 | ttm_bo_unref(&tmp); | 826 | ttm_bo_unref(&tmp); |
@@ -994,7 +999,6 @@ void vmw_resource_unreserve(struct vmw_resource *res, | |||
994 | */ | 999 | */ |
995 | static int | 1000 | static int |
996 | vmw_resource_check_buffer(struct vmw_resource *res, | 1001 | vmw_resource_check_buffer(struct vmw_resource *res, |
997 | struct ww_acquire_ctx *ticket, | ||
998 | bool interruptible, | 1002 | bool interruptible, |
999 | struct ttm_validate_buffer *val_buf) | 1003 | struct ttm_validate_buffer *val_buf) |
1000 | { | 1004 | { |
@@ -1011,7 +1015,7 @@ vmw_resource_check_buffer(struct vmw_resource *res, | |||
1011 | INIT_LIST_HEAD(&val_list); | 1015 | INIT_LIST_HEAD(&val_list); |
1012 | val_buf->bo = ttm_bo_reference(&res->backup->base); | 1016 | val_buf->bo = ttm_bo_reference(&res->backup->base); |
1013 | list_add_tail(&val_buf->head, &val_list); | 1017 | list_add_tail(&val_buf->head, &val_list); |
1014 | ret = ttm_eu_reserve_buffers(ticket, &val_list); | 1018 | ret = ttm_eu_reserve_buffers(NULL, &val_list); |
1015 | if (unlikely(ret != 0)) | 1019 | if (unlikely(ret != 0)) |
1016 | goto out_no_reserve; | 1020 | goto out_no_reserve; |
1017 | 1021 | ||
@@ -1029,7 +1033,7 @@ vmw_resource_check_buffer(struct vmw_resource *res, | |||
1029 | return 0; | 1033 | return 0; |
1030 | 1034 | ||
1031 | out_no_validate: | 1035 | out_no_validate: |
1032 | ttm_eu_backoff_reservation(ticket, &val_list); | 1036 | ttm_eu_backoff_reservation(NULL, &val_list); |
1033 | out_no_reserve: | 1037 | out_no_reserve: |
1034 | ttm_bo_unref(&val_buf->bo); | 1038 | ttm_bo_unref(&val_buf->bo); |
1035 | if (backup_dirty) | 1039 | if (backup_dirty) |
@@ -1074,8 +1078,7 @@ int vmw_resource_reserve(struct vmw_resource *res, bool no_backup) | |||
1074 | * @val_buf: Backup buffer information. | 1078 | * @val_buf: Backup buffer information. |
1075 | */ | 1079 | */ |
1076 | static void | 1080 | static void |
1077 | vmw_resource_backoff_reservation(struct ww_acquire_ctx *ticket, | 1081 | vmw_resource_backoff_reservation(struct ttm_validate_buffer *val_buf) |
1078 | struct ttm_validate_buffer *val_buf) | ||
1079 | { | 1082 | { |
1080 | struct list_head val_list; | 1083 | struct list_head val_list; |
1081 | 1084 | ||
@@ -1084,7 +1087,7 @@ vmw_resource_backoff_reservation(struct ww_acquire_ctx *ticket, | |||
1084 | 1087 | ||
1085 | INIT_LIST_HEAD(&val_list); | 1088 | INIT_LIST_HEAD(&val_list); |
1086 | list_add_tail(&val_buf->head, &val_list); | 1089 | list_add_tail(&val_buf->head, &val_list); |
1087 | ttm_eu_backoff_reservation(ticket, &val_list); | 1090 | ttm_eu_backoff_reservation(NULL, &val_list); |
1088 | ttm_bo_unref(&val_buf->bo); | 1091 | ttm_bo_unref(&val_buf->bo); |
1089 | } | 1092 | } |
1090 | 1093 | ||
@@ -1099,14 +1102,12 @@ int vmw_resource_do_evict(struct vmw_resource *res, bool interruptible) | |||
1099 | { | 1102 | { |
1100 | struct ttm_validate_buffer val_buf; | 1103 | struct ttm_validate_buffer val_buf; |
1101 | const struct vmw_res_func *func = res->func; | 1104 | const struct vmw_res_func *func = res->func; |
1102 | struct ww_acquire_ctx ticket; | ||
1103 | int ret; | 1105 | int ret; |
1104 | 1106 | ||
1105 | BUG_ON(!func->may_evict); | 1107 | BUG_ON(!func->may_evict); |
1106 | 1108 | ||
1107 | val_buf.bo = NULL; | 1109 | val_buf.bo = NULL; |
1108 | ret = vmw_resource_check_buffer(res, &ticket, interruptible, | 1110 | ret = vmw_resource_check_buffer(res, interruptible, &val_buf); |
1109 | &val_buf); | ||
1110 | if (unlikely(ret != 0)) | 1111 | if (unlikely(ret != 0)) |
1111 | return ret; | 1112 | return ret; |
1112 | 1113 | ||
@@ -1121,7 +1122,7 @@ int vmw_resource_do_evict(struct vmw_resource *res, bool interruptible) | |||
1121 | res->backup_dirty = true; | 1122 | res->backup_dirty = true; |
1122 | res->res_dirty = false; | 1123 | res->res_dirty = false; |
1123 | out_no_unbind: | 1124 | out_no_unbind: |
1124 | vmw_resource_backoff_reservation(&ticket, &val_buf); | 1125 | vmw_resource_backoff_reservation(&val_buf); |
1125 | 1126 | ||
1126 | return ret; | 1127 | return ret; |
1127 | } | 1128 | } |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c b/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c index 582814339748..7de2ea8bd553 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c | |||
@@ -38,7 +38,7 @@ | |||
38 | * @size: TTM accounting size for the surface. | 38 | * @size: TTM accounting size for the surface. |
39 | */ | 39 | */ |
40 | struct vmw_user_surface { | 40 | struct vmw_user_surface { |
41 | struct ttm_base_object base; | 41 | struct ttm_prime_object prime; |
42 | struct vmw_surface srf; | 42 | struct vmw_surface srf; |
43 | uint32_t size; | 43 | uint32_t size; |
44 | uint32_t backup_handle; | 44 | uint32_t backup_handle; |
@@ -580,7 +580,8 @@ static int vmw_surface_init(struct vmw_private *dev_priv, | |||
580 | static struct vmw_resource * | 580 | static struct vmw_resource * |
581 | vmw_user_surface_base_to_res(struct ttm_base_object *base) | 581 | vmw_user_surface_base_to_res(struct ttm_base_object *base) |
582 | { | 582 | { |
583 | return &(container_of(base, struct vmw_user_surface, base)->srf.res); | 583 | return &(container_of(base, struct vmw_user_surface, |
584 | prime.base)->srf.res); | ||
584 | } | 585 | } |
585 | 586 | ||
586 | /** | 587 | /** |
@@ -599,7 +600,7 @@ static void vmw_user_surface_free(struct vmw_resource *res) | |||
599 | kfree(srf->offsets); | 600 | kfree(srf->offsets); |
600 | kfree(srf->sizes); | 601 | kfree(srf->sizes); |
601 | kfree(srf->snooper.image); | 602 | kfree(srf->snooper.image); |
602 | ttm_base_object_kfree(user_srf, base); | 603 | ttm_prime_object_kfree(user_srf, prime); |
603 | ttm_mem_global_free(vmw_mem_glob(dev_priv), size); | 604 | ttm_mem_global_free(vmw_mem_glob(dev_priv), size); |
604 | } | 605 | } |
605 | 606 | ||
@@ -616,7 +617,7 @@ static void vmw_user_surface_base_release(struct ttm_base_object **p_base) | |||
616 | { | 617 | { |
617 | struct ttm_base_object *base = *p_base; | 618 | struct ttm_base_object *base = *p_base; |
618 | struct vmw_user_surface *user_srf = | 619 | struct vmw_user_surface *user_srf = |
619 | container_of(base, struct vmw_user_surface, base); | 620 | container_of(base, struct vmw_user_surface, prime.base); |
620 | struct vmw_resource *res = &user_srf->srf.res; | 621 | struct vmw_resource *res = &user_srf->srf.res; |
621 | 622 | ||
622 | *p_base = NULL; | 623 | *p_base = NULL; |
@@ -790,8 +791,8 @@ int vmw_surface_define_ioctl(struct drm_device *dev, void *data, | |||
790 | } | 791 | } |
791 | srf->snooper.crtc = NULL; | 792 | srf->snooper.crtc = NULL; |
792 | 793 | ||
793 | user_srf->base.shareable = false; | 794 | user_srf->prime.base.shareable = false; |
794 | user_srf->base.tfile = NULL; | 795 | user_srf->prime.base.tfile = NULL; |
795 | 796 | ||
796 | /** | 797 | /** |
797 | * From this point, the generic resource management functions | 798 | * From this point, the generic resource management functions |
@@ -803,9 +804,9 @@ int vmw_surface_define_ioctl(struct drm_device *dev, void *data, | |||
803 | goto out_unlock; | 804 | goto out_unlock; |
804 | 805 | ||
805 | tmp = vmw_resource_reference(&srf->res); | 806 | tmp = vmw_resource_reference(&srf->res); |
806 | ret = ttm_base_object_init(tfile, &user_srf->base, | 807 | ret = ttm_prime_object_init(tfile, res->backup_size, &user_srf->prime, |
807 | req->shareable, VMW_RES_SURFACE, | 808 | req->shareable, VMW_RES_SURFACE, |
808 | &vmw_user_surface_base_release, NULL); | 809 | &vmw_user_surface_base_release, NULL); |
809 | 810 | ||
810 | if (unlikely(ret != 0)) { | 811 | if (unlikely(ret != 0)) { |
811 | vmw_resource_unreference(&tmp); | 812 | vmw_resource_unreference(&tmp); |
@@ -813,7 +814,7 @@ int vmw_surface_define_ioctl(struct drm_device *dev, void *data, | |||
813 | goto out_unlock; | 814 | goto out_unlock; |
814 | } | 815 | } |
815 | 816 | ||
816 | rep->sid = user_srf->base.hash.key; | 817 | rep->sid = user_srf->prime.base.hash.key; |
817 | vmw_resource_unreference(&res); | 818 | vmw_resource_unreference(&res); |
818 | 819 | ||
819 | ttm_read_unlock(&vmaster->lock); | 820 | ttm_read_unlock(&vmaster->lock); |
@@ -823,7 +824,7 @@ out_no_copy: | |||
823 | out_no_offsets: | 824 | out_no_offsets: |
824 | kfree(srf->sizes); | 825 | kfree(srf->sizes); |
825 | out_no_sizes: | 826 | out_no_sizes: |
826 | ttm_base_object_kfree(user_srf, base); | 827 | ttm_prime_object_kfree(user_srf, prime); |
827 | out_no_user_srf: | 828 | out_no_user_srf: |
828 | ttm_mem_global_free(vmw_mem_glob(dev_priv), size); | 829 | ttm_mem_global_free(vmw_mem_glob(dev_priv), size); |
829 | out_unlock: | 830 | out_unlock: |
@@ -859,13 +860,14 @@ int vmw_surface_reference_ioctl(struct drm_device *dev, void *data, | |||
859 | return -EINVAL; | 860 | return -EINVAL; |
860 | } | 861 | } |
861 | 862 | ||
862 | if (unlikely(base->object_type != VMW_RES_SURFACE)) | 863 | if (unlikely(ttm_base_object_type(base) != VMW_RES_SURFACE)) |
863 | goto out_bad_resource; | 864 | goto out_bad_resource; |
864 | 865 | ||
865 | user_srf = container_of(base, struct vmw_user_surface, base); | 866 | user_srf = container_of(base, struct vmw_user_surface, prime.base); |
866 | srf = &user_srf->srf; | 867 | srf = &user_srf->srf; |
867 | 868 | ||
868 | ret = ttm_ref_object_add(tfile, &user_srf->base, TTM_REF_USAGE, NULL); | 869 | ret = ttm_ref_object_add(tfile, &user_srf->prime.base, |
870 | TTM_REF_USAGE, NULL); | ||
869 | if (unlikely(ret != 0)) { | 871 | if (unlikely(ret != 0)) { |
870 | DRM_ERROR("Could not add a reference to a surface.\n"); | 872 | DRM_ERROR("Could not add a reference to a surface.\n"); |
871 | goto out_no_reference; | 873 | goto out_no_reference; |
diff --git a/include/drm/ttm/ttm_bo_api.h b/include/drm/ttm/ttm_bo_api.h index 751eaffbf0d5..ee127ec33c60 100644 --- a/include/drm/ttm/ttm_bo_api.h +++ b/include/drm/ttm/ttm_bo_api.h | |||
@@ -169,6 +169,7 @@ struct ttm_tt; | |||
169 | * @offset: The current GPU offset, which can have different meanings | 169 | * @offset: The current GPU offset, which can have different meanings |
170 | * depending on the memory type. For SYSTEM type memory, it should be 0. | 170 | * depending on the memory type. For SYSTEM type memory, it should be 0. |
171 | * @cur_placement: Hint of current placement. | 171 | * @cur_placement: Hint of current placement. |
172 | * @wu_mutex: Wait unreserved mutex. | ||
172 | * | 173 | * |
173 | * Base class for TTM buffer object, that deals with data placement and CPU | 174 | * Base class for TTM buffer object, that deals with data placement and CPU |
174 | * mappings. GPU mappings are really up to the driver, but for simpler GPUs | 175 | * mappings. GPU mappings are really up to the driver, but for simpler GPUs |
@@ -250,6 +251,7 @@ struct ttm_buffer_object { | |||
250 | 251 | ||
251 | struct reservation_object *resv; | 252 | struct reservation_object *resv; |
252 | struct reservation_object ttm_resv; | 253 | struct reservation_object ttm_resv; |
254 | struct mutex wu_mutex; | ||
253 | }; | 255 | }; |
254 | 256 | ||
255 | /** | 257 | /** |
@@ -702,5 +704,5 @@ extern ssize_t ttm_bo_io(struct ttm_bo_device *bdev, struct file *filp, | |||
702 | size_t count, loff_t *f_pos, bool write); | 704 | size_t count, loff_t *f_pos, bool write); |
703 | 705 | ||
704 | extern void ttm_bo_swapout_all(struct ttm_bo_device *bdev); | 706 | extern void ttm_bo_swapout_all(struct ttm_bo_device *bdev); |
705 | 707 | extern int ttm_bo_wait_unreserved(struct ttm_buffer_object *bo); | |
706 | #endif | 708 | #endif |
diff --git a/include/drm/ttm/ttm_execbuf_util.h b/include/drm/ttm/ttm_execbuf_util.h index ec8a1d306510..16db7d01a336 100644 --- a/include/drm/ttm/ttm_execbuf_util.h +++ b/include/drm/ttm/ttm_execbuf_util.h | |||
@@ -70,7 +70,8 @@ extern void ttm_eu_backoff_reservation(struct ww_acquire_ctx *ticket, | |||
70 | /** | 70 | /** |
71 | * function ttm_eu_reserve_buffers | 71 | * function ttm_eu_reserve_buffers |
72 | * | 72 | * |
73 | * @ticket: [out] ww_acquire_ctx returned by call. | 73 | * @ticket: [out] ww_acquire_ctx filled in by call, or NULL if only |
74 | * non-blocking reserves should be tried. | ||
74 | * @list: thread private list of ttm_validate_buffer structs. | 75 | * @list: thread private list of ttm_validate_buffer structs. |
75 | * | 76 | * |
76 | * Tries to reserve bos pointed to by the list entries for validation. | 77 | * Tries to reserve bos pointed to by the list entries for validation. |
diff --git a/include/drm/ttm/ttm_object.h b/include/drm/ttm/ttm_object.h index fc0cf0649901..58b029894eb3 100644 --- a/include/drm/ttm/ttm_object.h +++ b/include/drm/ttm/ttm_object.h | |||
@@ -41,6 +41,7 @@ | |||
41 | #include <drm/drm_hashtab.h> | 41 | #include <drm/drm_hashtab.h> |
42 | #include <linux/kref.h> | 42 | #include <linux/kref.h> |
43 | #include <linux/rcupdate.h> | 43 | #include <linux/rcupdate.h> |
44 | #include <linux/dma-buf.h> | ||
44 | #include <ttm/ttm_memory.h> | 45 | #include <ttm/ttm_memory.h> |
45 | 46 | ||
46 | /** | 47 | /** |
@@ -77,6 +78,7 @@ enum ttm_object_type { | |||
77 | ttm_fence_type, | 78 | ttm_fence_type, |
78 | ttm_buffer_type, | 79 | ttm_buffer_type, |
79 | ttm_lock_type, | 80 | ttm_lock_type, |
81 | ttm_prime_type, | ||
80 | ttm_driver_type0 = 256, | 82 | ttm_driver_type0 = 256, |
81 | ttm_driver_type1, | 83 | ttm_driver_type1, |
82 | ttm_driver_type2, | 84 | ttm_driver_type2, |
@@ -132,6 +134,30 @@ struct ttm_base_object { | |||
132 | enum ttm_ref_type ref_type); | 134 | enum ttm_ref_type ref_type); |
133 | }; | 135 | }; |
134 | 136 | ||
137 | |||
138 | /** | ||
139 | * struct ttm_prime_object - Modified base object that is prime-aware | ||
140 | * | ||
141 | * @base: struct ttm_base_object that we derive from | ||
142 | * @mutex: Mutex protecting the @dma_buf member. | ||
143 | * @size: Size of the dma_buf associated with this object | ||
144 | * @real_type: Type of the underlying object. Needed since we're setting | ||
145 | * the value of @base::object_type to ttm_prime_type | ||
146 | * @dma_buf: Non ref-coutned pointer to a struct dma_buf created from this | ||
147 | * object. | ||
148 | * @refcount_release: The underlying object's release method. Needed since | ||
149 | * we set @base::refcount_release to our own release method. | ||
150 | */ | ||
151 | |||
152 | struct ttm_prime_object { | ||
153 | struct ttm_base_object base; | ||
154 | struct mutex mutex; | ||
155 | size_t size; | ||
156 | enum ttm_object_type real_type; | ||
157 | struct dma_buf *dma_buf; | ||
158 | void (*refcount_release) (struct ttm_base_object **); | ||
159 | }; | ||
160 | |||
135 | /** | 161 | /** |
136 | * ttm_base_object_init | 162 | * ttm_base_object_init |
137 | * | 163 | * |
@@ -248,14 +274,18 @@ extern void ttm_object_file_release(struct ttm_object_file **p_tfile); | |||
248 | /** | 274 | /** |
249 | * ttm_object device init - initialize a struct ttm_object_device | 275 | * ttm_object device init - initialize a struct ttm_object_device |
250 | * | 276 | * |
277 | * @mem_glob: struct ttm_mem_global for memory accounting. | ||
251 | * @hash_order: Order of hash table used to hash the base objects. | 278 | * @hash_order: Order of hash table used to hash the base objects. |
279 | * @ops: DMA buf ops for prime objects of this device. | ||
252 | * | 280 | * |
253 | * This function is typically called on device initialization to prepare | 281 | * This function is typically called on device initialization to prepare |
254 | * data structures needed for ttm base and ref objects. | 282 | * data structures needed for ttm base and ref objects. |
255 | */ | 283 | */ |
256 | 284 | ||
257 | extern struct ttm_object_device *ttm_object_device_init | 285 | extern struct ttm_object_device * |
258 | (struct ttm_mem_global *mem_glob, unsigned int hash_order); | 286 | ttm_object_device_init(struct ttm_mem_global *mem_glob, |
287 | unsigned int hash_order, | ||
288 | const struct dma_buf_ops *ops); | ||
259 | 289 | ||
260 | /** | 290 | /** |
261 | * ttm_object_device_release - release data held by a ttm_object_device | 291 | * ttm_object_device_release - release data held by a ttm_object_device |
@@ -272,4 +302,31 @@ extern void ttm_object_device_release(struct ttm_object_device **p_tdev); | |||
272 | 302 | ||
273 | #define ttm_base_object_kfree(__object, __base)\ | 303 | #define ttm_base_object_kfree(__object, __base)\ |
274 | kfree_rcu(__object, __base.rhead) | 304 | kfree_rcu(__object, __base.rhead) |
305 | |||
306 | extern int ttm_prime_object_init(struct ttm_object_file *tfile, | ||
307 | size_t size, | ||
308 | struct ttm_prime_object *prime, | ||
309 | bool shareable, | ||
310 | enum ttm_object_type type, | ||
311 | void (*refcount_release) | ||
312 | (struct ttm_base_object **), | ||
313 | void (*ref_obj_release) | ||
314 | (struct ttm_base_object *, | ||
315 | enum ttm_ref_type ref_type)); | ||
316 | |||
317 | static inline enum ttm_object_type | ||
318 | ttm_base_object_type(struct ttm_base_object *base) | ||
319 | { | ||
320 | return (base->object_type == ttm_prime_type) ? | ||
321 | container_of(base, struct ttm_prime_object, base)->real_type : | ||
322 | base->object_type; | ||
323 | } | ||
324 | extern int ttm_prime_fd_to_handle(struct ttm_object_file *tfile, | ||
325 | int fd, u32 *handle); | ||
326 | extern int ttm_prime_handle_to_fd(struct ttm_object_file *tfile, | ||
327 | uint32_t handle, uint32_t flags, | ||
328 | int *prime_fd); | ||
329 | |||
330 | #define ttm_prime_object_kfree(__obj, __prime) \ | ||
331 | kfree_rcu(__obj, __prime.base.rhead) | ||
275 | #endif | 332 | #endif |
diff --git a/include/uapi/drm/radeon_drm.h b/include/uapi/drm/radeon_drm.h index 46d41e8b0dcc..2f3f7ea8c77b 100644 --- a/include/uapi/drm/radeon_drm.h +++ b/include/uapi/drm/radeon_drm.h | |||
@@ -981,6 +981,8 @@ struct drm_radeon_cs { | |||
981 | #define RADEON_INFO_SI_TILE_MODE_ARRAY 0x16 | 981 | #define RADEON_INFO_SI_TILE_MODE_ARRAY 0x16 |
982 | /* query if CP DMA is supported on the compute ring */ | 982 | /* query if CP DMA is supported on the compute ring */ |
983 | #define RADEON_INFO_SI_CP_DMA_COMPUTE 0x17 | 983 | #define RADEON_INFO_SI_CP_DMA_COMPUTE 0x17 |
984 | /* CIK macrotile mode array */ | ||
985 | #define RADEON_INFO_CIK_MACROTILE_MODE_ARRAY 0x18 | ||
984 | 986 | ||
985 | 987 | ||
986 | struct drm_radeon_info { | 988 | struct drm_radeon_info { |