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authorShinya Kuribayashi <shinya.kuribayashi@necel.com>2009-11-06 07:49:39 -0500
committerBen Dooks <ben-linux@fluff.org>2009-12-08 19:19:11 -0500
commitae72222d03fea3ff561e2a3aee483ef7bd1a2bbb (patch)
treee08e9e5d81fbbec97d2c6b47a09c1e7bf4be24b5
parent26ea15b1f584de02bc85e9c3968d523386332f65 (diff)
i2c-designware: Initialize byte count variables just prior to being used
As the driver and hardware always process the given data in parallel, then it would be better to initialize tx_limit, rx_limit and rx_valid variables just prior to being used. This will help us to send / receive as much data as possible. Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com> Acked-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
-rw-r--r--drivers/i2c/busses/i2c-designware.c10
1 files changed, 7 insertions, 3 deletions
diff --git a/drivers/i2c/busses/i2c-designware.c b/drivers/i2c/busses/i2c-designware.c
index e8e2212d576e..c3702a8647cb 100644
--- a/drivers/i2c/busses/i2c-designware.c
+++ b/drivers/i2c/busses/i2c-designware.c
@@ -360,8 +360,7 @@ i2c_dw_xfer_msg(struct dw_i2c_dev *dev)
360{ 360{
361 struct i2c_msg *msgs = dev->msgs; 361 struct i2c_msg *msgs = dev->msgs;
362 u32 intr_mask; 362 u32 intr_mask;
363 int tx_limit = dev->tx_fifo_depth - readl(dev->base + DW_IC_TXFLR); 363 int tx_limit, rx_limit;
364 int rx_limit = dev->rx_fifo_depth - readl(dev->base + DW_IC_RXFLR);
365 u32 addr = msgs[dev->msg_write_idx].addr; 364 u32 addr = msgs[dev->msg_write_idx].addr;
366 u32 buf_len = dev->tx_buf_len; 365 u32 buf_len = dev->tx_buf_len;
367 u8 *buf = dev->tx_buf;; 366 u8 *buf = dev->tx_buf;;
@@ -389,6 +388,9 @@ i2c_dw_xfer_msg(struct dw_i2c_dev *dev)
389 buf_len = msgs[dev->msg_write_idx].len; 388 buf_len = msgs[dev->msg_write_idx].len;
390 } 389 }
391 390
391 tx_limit = dev->tx_fifo_depth - readl(dev->base + DW_IC_TXFLR);
392 rx_limit = dev->rx_fifo_depth - readl(dev->base + DW_IC_RXFLR);
393
392 while (buf_len > 0 && tx_limit > 0 && rx_limit > 0) { 394 while (buf_len > 0 && tx_limit > 0 && rx_limit > 0) {
393 if (msgs[dev->msg_write_idx].flags & I2C_M_RD) { 395 if (msgs[dev->msg_write_idx].flags & I2C_M_RD) {
394 writel(0x100, dev->base + DW_IC_DATA_CMD); 396 writel(0x100, dev->base + DW_IC_DATA_CMD);
@@ -418,7 +420,7 @@ i2c_dw_read(struct dw_i2c_dev *dev)
418{ 420{
419 struct i2c_msg *msgs = dev->msgs; 421 struct i2c_msg *msgs = dev->msgs;
420 u32 addr = msgs[dev->msg_read_idx].addr; 422 u32 addr = msgs[dev->msg_read_idx].addr;
421 int rx_valid = readl(dev->base + DW_IC_RXFLR); 423 int rx_valid;
422 424
423 for (; dev->msg_read_idx < dev->msgs_num; dev->msg_read_idx++) { 425 for (; dev->msg_read_idx < dev->msgs_num; dev->msg_read_idx++) {
424 u32 len; 426 u32 len;
@@ -439,6 +441,8 @@ i2c_dw_read(struct dw_i2c_dev *dev)
439 buf = dev->rx_buf; 441 buf = dev->rx_buf;
440 } 442 }
441 443
444 rx_valid = readl(dev->base + DW_IC_RXFLR);
445
442 for (; len > 0 && rx_valid > 0; len--, rx_valid--) 446 for (; len > 0 && rx_valid > 0; len--, rx_valid--)
443 *buf++ = readl(dev->base + DW_IC_DATA_CMD); 447 *buf++ = readl(dev->base + DW_IC_DATA_CMD);
444 448