diff options
| author | Brian Norris <computersforpeace@gmail.com> | 2015-02-28 04:06:08 -0500 |
|---|---|---|
| committer | Brian Norris <computersforpeace@gmail.com> | 2015-02-28 04:06:08 -0500 |
| commit | adf716d2f3e62820cc86cdb08c277516c7012352 (patch) | |
| tree | e0b7b5e6869922eb6672af2dffad449533594261 | |
| parent | 46aad84190d9f2ea2f9e8c251e1b971519306044 (diff) | |
| parent | 8dad0386b97c4bd6edd56752ca7f2e735fe5beb4 (diff) | |
Merge MTD updates into -next
| -rw-r--r-- | drivers/mtd/nand/pxa3xx_nand.c | 48 |
1 files changed, 42 insertions, 6 deletions
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c index 96b0b1d27df1..bc677362bc73 100644 --- a/drivers/mtd/nand/pxa3xx_nand.c +++ b/drivers/mtd/nand/pxa3xx_nand.c | |||
| @@ -480,6 +480,42 @@ static void disable_int(struct pxa3xx_nand_info *info, uint32_t int_mask) | |||
| 480 | nand_writel(info, NDCR, ndcr | int_mask); | 480 | nand_writel(info, NDCR, ndcr | int_mask); |
| 481 | } | 481 | } |
| 482 | 482 | ||
| 483 | static void drain_fifo(struct pxa3xx_nand_info *info, void *data, int len) | ||
| 484 | { | ||
| 485 | if (info->ecc_bch) { | ||
| 486 | int timeout; | ||
| 487 | |||
| 488 | /* | ||
| 489 | * According to the datasheet, when reading from NDDB | ||
| 490 | * with BCH enabled, after each 32 bytes reads, we | ||
| 491 | * have to make sure that the NDSR.RDDREQ bit is set. | ||
| 492 | * | ||
| 493 | * Drain the FIFO 8 32 bits reads at a time, and skip | ||
| 494 | * the polling on the last read. | ||
| 495 | */ | ||
| 496 | while (len > 8) { | ||
| 497 | __raw_readsl(info->mmio_base + NDDB, data, 8); | ||
| 498 | |||
| 499 | for (timeout = 0; | ||
| 500 | !(nand_readl(info, NDSR) & NDSR_RDDREQ); | ||
| 501 | timeout++) { | ||
| 502 | if (timeout >= 5) { | ||
| 503 | dev_err(&info->pdev->dev, | ||
| 504 | "Timeout on RDDREQ while draining the FIFO\n"); | ||
| 505 | return; | ||
| 506 | } | ||
| 507 | |||
| 508 | mdelay(1); | ||
| 509 | } | ||
| 510 | |||
| 511 | data += 32; | ||
| 512 | len -= 8; | ||
| 513 | } | ||
| 514 | } | ||
| 515 | |||
| 516 | __raw_readsl(info->mmio_base + NDDB, data, len); | ||
| 517 | } | ||
| 518 | |||
| 483 | static void handle_data_pio(struct pxa3xx_nand_info *info) | 519 | static void handle_data_pio(struct pxa3xx_nand_info *info) |
| 484 | { | 520 | { |
| 485 | unsigned int do_bytes = min(info->data_size, info->chunk_size); | 521 | unsigned int do_bytes = min(info->data_size, info->chunk_size); |
| @@ -496,14 +532,14 @@ static void handle_data_pio(struct pxa3xx_nand_info *info) | |||
| 496 | DIV_ROUND_UP(info->oob_size, 4)); | 532 | DIV_ROUND_UP(info->oob_size, 4)); |
| 497 | break; | 533 | break; |
| 498 | case STATE_PIO_READING: | 534 | case STATE_PIO_READING: |
| 499 | __raw_readsl(info->mmio_base + NDDB, | 535 | drain_fifo(info, |
| 500 | info->data_buff + info->data_buff_pos, | 536 | info->data_buff + info->data_buff_pos, |
| 501 | DIV_ROUND_UP(do_bytes, 4)); | 537 | DIV_ROUND_UP(do_bytes, 4)); |
| 502 | 538 | ||
| 503 | if (info->oob_size > 0) | 539 | if (info->oob_size > 0) |
| 504 | __raw_readsl(info->mmio_base + NDDB, | 540 | drain_fifo(info, |
| 505 | info->oob_buff + info->oob_buff_pos, | 541 | info->oob_buff + info->oob_buff_pos, |
| 506 | DIV_ROUND_UP(info->oob_size, 4)); | 542 | DIV_ROUND_UP(info->oob_size, 4)); |
| 507 | break; | 543 | break; |
| 508 | default: | 544 | default: |
| 509 | dev_err(&info->pdev->dev, "%s: invalid state %d\n", __func__, | 545 | dev_err(&info->pdev->dev, "%s: invalid state %d\n", __func__, |
