drm/i915: Fix Sink CRC

In some cases like when PSR just got enabled the panel need more vblank
times to calculate CRC. I figured that out with the new PSR test cases
facing some cases that I had a green screen but a blank CRC. Even with
2 vblank waits on kernel + 2 vblank waits on test case.

So let's give up to 6 vblank wait time. However we now check for
TEST_CRC_COUNT that shows when panel finished to calculate CRC and
has it ready.

v2: Jani pointed out attempts decrements was wrong and should never reach
the error condition. And Daniel pointed out that EIO is more appropriated than
EGAIN. Also I realized that I have to read test_crc_count after setting
test_sink

v3: Rebase and adding error message

Cc: Todd Previte <tprevite@gmail.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Todd Previte <tprevite@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

2 files changed, 20 insertions, 8 deletions

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 6f42d9568049..3caac0f01265 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -3807,21 +3807,32 @@ int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc)
         struct drm_device *dev = intel_dig_port->base.base.dev;
         struct intel_crtc *intel_crtc =
                 to_intel_crtc(intel_dig_port->base.base.crtc);
-        u8 buf[1];
+        u8 buf;
+        int test_crc_count;
+        int attempts = 6;
 
-        if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, buf) < 0)
+        if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, &buf) < 0)
                 return -EIO;
 
-        if (!(buf[0] & DP_TEST_CRC_SUPPORTED))
+        if (!(buf & DP_TEST_CRC_SUPPORTED))
                 return -ENOTTY;
 
         if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_SINK,
                                DP_TEST_SINK_START) < 0)
                 return -EIO;
 
-        /* Wait 2 vblanks to be sure we will have the correct CRC value */
-        intel_wait_for_vblank(dev, intel_crtc->pipe);
-        intel_wait_for_vblank(dev, intel_crtc->pipe);
+        drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, &buf);
+        test_crc_count = buf & DP_TEST_COUNT_MASK;
+
+        do {
+                drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, &buf);
+                intel_wait_for_vblank(dev, intel_crtc->pipe);
+        } while (--attempts && (buf & DP_TEST_COUNT_MASK) == test_crc_count);
+
+        if (attempts == 0) {
+                DRM_ERROR("Panel is unable to calculate CRC after 6 vblanks\n");
+                return -EIO;
+        }
 
         if (drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_CRC_R_CR, crc, 6) < 0)
                 return -EIO;
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 9305c718d789..8edeed00c082 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -303,7 +303,8 @@
 #define DP_TEST_CRC_B_CB                    0x244
 
 #define DP_TEST_SINK_MISC                   0x246
-#define DP_TEST_CRC_SUPPORTED               (1 << 5)
+# define DP_TEST_CRC_SUPPORTED              (1 << 5)
+# define DP_TEST_COUNT_MASK                 0x7
 
 #define DP_TEST_RESPONSE                    0x260
 # define DP_TEST_ACK                        (1 << 0)
@@ -313,7 +314,7 @@
 #define DP_TEST_EDID_CHECKSUM               0x261
 
 #define DP_TEST_SINK                        0x270
-#define DP_TEST_SINK_START          (1 << 0)
+# define DP_TEST_SINK_START                 (1 << 0)
 
 #define DP_PAYLOAD_TABLE_UPDATE_STATUS      0x2c0   /* 1.2 MST */
 # define DP_PAYLOAD_TABLE_UPDATED           (1 << 0)