diff options
author | Jonathan Austin <jonathan.austin@arm.com> | 2013-02-21 10:21:34 -0500 |
---|---|---|
committer | Jonathan Austin <jonathan.austin@arm.com> | 2013-06-07 12:02:49 -0400 |
commit | aca7e5920c8e80a2a49c1e37664675d78b23398b (patch) | |
tree | e1aac98fbd9531a864189670c02a50c412e91b7a | |
parent | ed18bdc875328921114139e17ade1d2569e82c85 (diff) |
ARM: mpu: add PMSA related registers and bitfields to existing headers
This patch adds the following definitions relevant to the PMSA:
Add SCTLR bit 17, (CR_BR - Background Region bit) to the list of CR_*
bitfields. This bit determines whether to use the architecturally defined
memory map
Add the MPUIR to the available registers when using read_cpuid macro. The
MPUIR is the MPU type register.
Signed-off-by: Jonathan Austin <jonathan.austin@arm.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
CC:"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>
-rw-r--r-- | arch/arm/include/asm/cp15.h | 5 | ||||
-rw-r--r-- | arch/arm/include/asm/cputype.h | 1 |
2 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/include/asm/cp15.h b/arch/arm/include/asm/cp15.h index 1f3262e99d81..a524a23d8627 100644 --- a/arch/arm/include/asm/cp15.h +++ b/arch/arm/include/asm/cp15.h | |||
@@ -23,6 +23,11 @@ | |||
23 | #define CR_RR (1 << 14) /* Round Robin cache replacement */ | 23 | #define CR_RR (1 << 14) /* Round Robin cache replacement */ |
24 | #define CR_L4 (1 << 15) /* LDR pc can set T bit */ | 24 | #define CR_L4 (1 << 15) /* LDR pc can set T bit */ |
25 | #define CR_DT (1 << 16) | 25 | #define CR_DT (1 << 16) |
26 | #ifdef CONFIG_MMU | ||
27 | #define CR_HA (1 << 17) /* Hardware management of Access Flag */ | ||
28 | #else | ||
29 | #define CR_BR (1 << 17) /* MPU Background region enable (PMSA) */ | ||
30 | #endif | ||
26 | #define CR_IT (1 << 18) | 31 | #define CR_IT (1 << 18) |
27 | #define CR_ST (1 << 19) | 32 | #define CR_ST (1 << 19) |
28 | #define CR_FI (1 << 21) /* Fast interrupt (lower latency mode) */ | 33 | #define CR_FI (1 << 21) /* Fast interrupt (lower latency mode) */ |
diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h index ec635ff32f49..3b704dfb6c58 100644 --- a/arch/arm/include/asm/cputype.h +++ b/arch/arm/include/asm/cputype.h | |||
@@ -8,6 +8,7 @@ | |||
8 | #define CPUID_CACHETYPE 1 | 8 | #define CPUID_CACHETYPE 1 |
9 | #define CPUID_TCM 2 | 9 | #define CPUID_TCM 2 |
10 | #define CPUID_TLBTYPE 3 | 10 | #define CPUID_TLBTYPE 3 |
11 | #define CPUID_MPUIR 4 | ||
11 | #define CPUID_MPIDR 5 | 12 | #define CPUID_MPIDR 5 |
12 | 13 | ||
13 | #ifdef CONFIG_CPU_V7M | 14 | #ifdef CONFIG_CPU_V7M |