powerpc/8xx: Const for TLB RPN forced value

Value 0x00f0 is used to force bits in TLB level 2 entry. This value is linked
to the page size and will vary when we change the page size. Lets define a const
for it in order to have it at only one place.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Scott Wood <scottwood@freescale.com>

1 files changed, 13 insertions, 6 deletions

diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index e126adf15528..38efa8622176 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -40,6 +40,13 @@
 #else
 #define DO_8xx_CPU6(val, reg)
 #endif
+
+/*
+ * Value for the bits that have fixed value in RPN entries.
+ * Also used for tagging DAR for DTLBerror.
+ */
+#define RPN_PATTERN     0x00f0
+
         __HEAD
 _ENTRY(_stext);
 _ENTRY(_start);
@@ -211,7 +218,7 @@ MachineCheck:
         EXCEPTION_PROLOG
         mfspr r4,SPRN_DAR
         stw r4,_DAR(r11)
-        li r5,0x00f0
+        li r5,RPN_PATTERN
         mtspr SPRN_DAR,r5       /* Tag DAR, to be used in DTLB Error */
         mfspr r5,SPRN_DSISR
         stw r5,_DSISR(r11)
@@ -239,7 +246,7 @@ Alignment:
         EXCEPTION_PROLOG
         mfspr   r4,SPRN_DAR
         stw     r4,_DAR(r11)
-        li      r5,0x00f0
+        li      r5,RPN_PATTERN
         mtspr   SPRN_DAR,r5     /* Tag DAR, to be used in DTLB Error */
         mfspr   r5,SPRN_DSISR
         stw     r5,_DSISR(r11)
@@ -343,7 +350,7 @@ InstructionTLBMiss:
          * set.  All other Linux PTE bits control the behavior
          * of the MMU.
          */
-        li      r11, 0x00f0
+        li      r11, RPN_PATTERN
         rlwimi  r10, r11, 0, 0x07f8     /* Set 24-27, clear 21-23,28 */
         DO_8xx_CPU6(0x2d80, r3)
         mtspr   SPRN_MI_RPN, r10        /* Update TLB entry */
@@ -447,7 +454,7 @@ DataStoreTLBMiss:
          * set.  All other Linux PTE bits control the behavior
          * of the MMU.
          */
-2:      li      r11, 0x00f0
+2:      li      r11, RPN_PATTERN
         rlwimi  r10, r11, 0, 24, 28     /* Set 24-27, clear 28 */
         DO_8xx_CPU6(0x3d80, r3)
         mtspr   SPRN_MD_RPN, r10        /* Update TLB entry */
@@ -482,7 +489,7 @@ DataTLBError:
         EXCEPTION_PROLOG_0
 
         mfspr   r11, SPRN_DAR
-        cmpwi   cr0, r11, 0x00f0
+        cmpwi   cr0, r11, RPN_PATTERN
         beq-    FixupDAR        /* must be a buggy dcbX, icbi insn. */
 DARFixed:/* Return from dcbx instruction bug workaround */
         EXCEPTION_PROLOG_1
@@ -491,7 +498,7 @@ DARFixed:/* Return from dcbx instruction bug workaround */
         stw     r10,_DSISR(r11)
         mr      r5,r10
         mfspr   r4,SPRN_DAR
-        li      r10,0x00f0
+        li      r10,RPN_PATTERN
         mtspr   SPRN_DAR,r10    /* Tag DAR, to be used in DTLB Error */
         /* 0x300 is DataAccess exception, needed by bad_page_fault() */
         EXC_XFER_LITE(0x300, handle_page_fault)