diff options
author | Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> | 2014-11-28 09:57:52 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-12-03 11:07:34 -0500 |
commit | ab71f99fd70b3ff6f74928612778f553836fb1c0 (patch) | |
tree | 4ea6803fbdaf1c48096246860db800a4b74f6078 | |
parent | 1eeec6af0dbb978743de7ffd7224dfe9a695699f (diff) |
ARM: 8234/1: sa1100: reorder IRQ handling code
This patch just reorders functions/data inside sa1100 irq driver to be
able to merge functions that have the same code after converting to
irqdomains and hwirq. No real code changes.
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r-- | arch/arm/mach-sa1100/irq.c | 155 |
1 files changed, 66 insertions, 89 deletions
diff --git a/arch/arm/mach-sa1100/irq.c b/arch/arm/mach-sa1100/irq.c index 981db9878b27..63e2901db416 100644 --- a/arch/arm/mach-sa1100/irq.c +++ b/arch/arm/mach-sa1100/irq.c | |||
@@ -27,6 +27,60 @@ | |||
27 | 27 | ||
28 | 28 | ||
29 | /* | 29 | /* |
30 | * We don't need to ACK IRQs on the SA1100 unless they're GPIOs | ||
31 | * this is for internal IRQs i.e. from IRQ LCD to RTCAlrm. | ||
32 | */ | ||
33 | static void sa1100_mask_irq(struct irq_data *d) | ||
34 | { | ||
35 | ICMR &= ~BIT(d->hwirq); | ||
36 | } | ||
37 | |||
38 | static void sa1100_unmask_irq(struct irq_data *d) | ||
39 | { | ||
40 | ICMR |= BIT(d->hwirq); | ||
41 | } | ||
42 | |||
43 | /* | ||
44 | * Apart form GPIOs, only the RTC alarm can be a wakeup event. | ||
45 | */ | ||
46 | static int sa1100_set_wake(struct irq_data *d, unsigned int on) | ||
47 | { | ||
48 | if (BIT(d->hwirq) == IC_RTCAlrm) { | ||
49 | if (on) | ||
50 | PWER |= PWER_RTC; | ||
51 | else | ||
52 | PWER &= ~PWER_RTC; | ||
53 | return 0; | ||
54 | } | ||
55 | return -EINVAL; | ||
56 | } | ||
57 | |||
58 | static struct irq_chip sa1100_normal_chip = { | ||
59 | .name = "SC", | ||
60 | .irq_ack = sa1100_mask_irq, | ||
61 | .irq_mask = sa1100_mask_irq, | ||
62 | .irq_unmask = sa1100_unmask_irq, | ||
63 | .irq_set_wake = sa1100_set_wake, | ||
64 | }; | ||
65 | |||
66 | static int sa1100_normal_irqdomain_map(struct irq_domain *d, | ||
67 | unsigned int irq, irq_hw_number_t hwirq) | ||
68 | { | ||
69 | irq_set_chip_and_handler(irq, &sa1100_normal_chip, | ||
70 | handle_level_irq); | ||
71 | set_irq_flags(irq, IRQF_VALID); | ||
72 | |||
73 | return 0; | ||
74 | } | ||
75 | |||
76 | static struct irq_domain_ops sa1100_normal_irqdomain_ops = { | ||
77 | .map = sa1100_normal_irqdomain_map, | ||
78 | .xlate = irq_domain_xlate_onetwocell, | ||
79 | }; | ||
80 | |||
81 | static struct irq_domain *sa1100_normal_irqdomain; | ||
82 | |||
83 | /* | ||
30 | * SA1100 GPIO edge detection for IRQs: | 84 | * SA1100 GPIO edge detection for IRQs: |
31 | * IRQs are generated on Falling-Edge, Rising-Edge, or both. | 85 | * IRQs are generated on Falling-Edge, Rising-Edge, or both. |
32 | * Use this instead of directly setting GRER/GFER. | 86 | * Use this instead of directly setting GRER/GFER. |
@@ -63,24 +117,14 @@ static int sa1100_gpio_type(struct irq_data *d, unsigned int type) | |||
63 | } | 117 | } |
64 | 118 | ||
65 | /* | 119 | /* |
66 | * GPIO IRQs must be acknowledged. This is for IRQs from GPIO0 to 10. | 120 | * GPIO IRQs must be acknowledged. |
67 | */ | 121 | */ |
68 | static void sa1100_low_gpio_ack(struct irq_data *d) | 122 | static void sa1100_gpio_ack(struct irq_data *d) |
69 | { | 123 | { |
70 | GEDR = BIT(d->hwirq); | 124 | GEDR = BIT(d->hwirq); |
71 | } | 125 | } |
72 | 126 | ||
73 | static void sa1100_low_gpio_mask(struct irq_data *d) | 127 | static int sa1100_gpio_wake(struct irq_data *d, unsigned int on) |
74 | { | ||
75 | ICMR &= ~BIT(d->hwirq); | ||
76 | } | ||
77 | |||
78 | static void sa1100_low_gpio_unmask(struct irq_data *d) | ||
79 | { | ||
80 | ICMR |= BIT(d->hwirq); | ||
81 | } | ||
82 | |||
83 | static int sa1100_low_gpio_wake(struct irq_data *d, unsigned int on) | ||
84 | { | 128 | { |
85 | if (on) | 129 | if (on) |
86 | PWER |= BIT(d->hwirq); | 130 | PWER |= BIT(d->hwirq); |
@@ -89,13 +133,16 @@ static int sa1100_low_gpio_wake(struct irq_data *d, unsigned int on) | |||
89 | return 0; | 133 | return 0; |
90 | } | 134 | } |
91 | 135 | ||
136 | /* | ||
137 | * This is for IRQs from 0 to 10. | ||
138 | */ | ||
92 | static struct irq_chip sa1100_low_gpio_chip = { | 139 | static struct irq_chip sa1100_low_gpio_chip = { |
93 | .name = "GPIO-l", | 140 | .name = "GPIO-l", |
94 | .irq_ack = sa1100_low_gpio_ack, | 141 | .irq_ack = sa1100_gpio_ack, |
95 | .irq_mask = sa1100_low_gpio_mask, | 142 | .irq_mask = sa1100_mask_irq, |
96 | .irq_unmask = sa1100_low_gpio_unmask, | 143 | .irq_unmask = sa1100_unmask_irq, |
97 | .irq_set_type = sa1100_gpio_type, | 144 | .irq_set_type = sa1100_gpio_type, |
98 | .irq_set_wake = sa1100_low_gpio_wake, | 145 | .irq_set_wake = sa1100_gpio_wake, |
99 | }; | 146 | }; |
100 | 147 | ||
101 | static int sa1100_low_gpio_irqdomain_map(struct irq_domain *d, | 148 | static int sa1100_low_gpio_irqdomain_map(struct irq_domain *d, |
@@ -151,13 +198,6 @@ sa1100_high_gpio_handler(unsigned int irq, struct irq_desc *desc) | |||
151 | * In addition, the IRQs are all collected up into one bit in the | 198 | * In addition, the IRQs are all collected up into one bit in the |
152 | * interrupt controller registers. | 199 | * interrupt controller registers. |
153 | */ | 200 | */ |
154 | static void sa1100_high_gpio_ack(struct irq_data *d) | ||
155 | { | ||
156 | unsigned int mask = BIT(d->hwirq); | ||
157 | |||
158 | GEDR = mask; | ||
159 | } | ||
160 | |||
161 | static void sa1100_high_gpio_mask(struct irq_data *d) | 201 | static void sa1100_high_gpio_mask(struct irq_data *d) |
162 | { | 202 | { |
163 | unsigned int mask = BIT(d->hwirq); | 203 | unsigned int mask = BIT(d->hwirq); |
@@ -178,22 +218,13 @@ static void sa1100_high_gpio_unmask(struct irq_data *d) | |||
178 | GFER = GPIO_IRQ_falling_edge & GPIO_IRQ_mask; | 218 | GFER = GPIO_IRQ_falling_edge & GPIO_IRQ_mask; |
179 | } | 219 | } |
180 | 220 | ||
181 | static int sa1100_high_gpio_wake(struct irq_data *d, unsigned int on) | ||
182 | { | ||
183 | if (on) | ||
184 | PWER |= BIT(d->hwirq); | ||
185 | else | ||
186 | PWER &= ~BIT(d->hwirq); | ||
187 | return 0; | ||
188 | } | ||
189 | |||
190 | static struct irq_chip sa1100_high_gpio_chip = { | 221 | static struct irq_chip sa1100_high_gpio_chip = { |
191 | .name = "GPIO-h", | 222 | .name = "GPIO-h", |
192 | .irq_ack = sa1100_high_gpio_ack, | 223 | .irq_ack = sa1100_gpio_ack, |
193 | .irq_mask = sa1100_high_gpio_mask, | 224 | .irq_mask = sa1100_high_gpio_mask, |
194 | .irq_unmask = sa1100_high_gpio_unmask, | 225 | .irq_unmask = sa1100_high_gpio_unmask, |
195 | .irq_set_type = sa1100_gpio_type, | 226 | .irq_set_type = sa1100_gpio_type, |
196 | .irq_set_wake = sa1100_high_gpio_wake, | 227 | .irq_set_wake = sa1100_gpio_wake, |
197 | }; | 228 | }; |
198 | 229 | ||
199 | static int sa1100_high_gpio_irqdomain_map(struct irq_domain *d, | 230 | static int sa1100_high_gpio_irqdomain_map(struct irq_domain *d, |
@@ -213,60 +244,6 @@ static struct irq_domain_ops sa1100_high_gpio_irqdomain_ops = { | |||
213 | 244 | ||
214 | static struct irq_domain *sa1100_high_gpio_irqdomain; | 245 | static struct irq_domain *sa1100_high_gpio_irqdomain; |
215 | 246 | ||
216 | /* | ||
217 | * We don't need to ACK IRQs on the SA1100 unless they're GPIOs | ||
218 | * this is for internal IRQs i.e. from IRQ LCD to RTCAlrm. | ||
219 | */ | ||
220 | static void sa1100_mask_irq(struct irq_data *d) | ||
221 | { | ||
222 | ICMR &= ~BIT(d->hwirq); | ||
223 | } | ||
224 | |||
225 | static void sa1100_unmask_irq(struct irq_data *d) | ||
226 | { | ||
227 | ICMR |= BIT(d->hwirq); | ||
228 | } | ||
229 | |||
230 | /* | ||
231 | * Apart form GPIOs, only the RTC alarm can be a wakeup event. | ||
232 | */ | ||
233 | static int sa1100_set_wake(struct irq_data *d, unsigned int on) | ||
234 | { | ||
235 | if (BIT(d->hwirq) == IC_RTCAlrm) { | ||
236 | if (on) | ||
237 | PWER |= PWER_RTC; | ||
238 | else | ||
239 | PWER &= ~PWER_RTC; | ||
240 | return 0; | ||
241 | } | ||
242 | return -EINVAL; | ||
243 | } | ||
244 | |||
245 | static struct irq_chip sa1100_normal_chip = { | ||
246 | .name = "SC", | ||
247 | .irq_ack = sa1100_mask_irq, | ||
248 | .irq_mask = sa1100_mask_irq, | ||
249 | .irq_unmask = sa1100_unmask_irq, | ||
250 | .irq_set_wake = sa1100_set_wake, | ||
251 | }; | ||
252 | |||
253 | static int sa1100_normal_irqdomain_map(struct irq_domain *d, | ||
254 | unsigned int irq, irq_hw_number_t hwirq) | ||
255 | { | ||
256 | irq_set_chip_and_handler(irq, &sa1100_normal_chip, | ||
257 | handle_level_irq); | ||
258 | set_irq_flags(irq, IRQF_VALID); | ||
259 | |||
260 | return 0; | ||
261 | } | ||
262 | |||
263 | static struct irq_domain_ops sa1100_normal_irqdomain_ops = { | ||
264 | .map = sa1100_normal_irqdomain_map, | ||
265 | .xlate = irq_domain_xlate_onetwocell, | ||
266 | }; | ||
267 | |||
268 | static struct irq_domain *sa1100_normal_irqdomain; | ||
269 | |||
270 | static struct resource irq_resource = | 247 | static struct resource irq_resource = |
271 | DEFINE_RES_MEM_NAMED(0x90050000, SZ_64K, "irqs"); | 248 | DEFINE_RES_MEM_NAMED(0x90050000, SZ_64K, "irqs"); |
272 | 249 | ||